sparc_arch.h 3.4 KB

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  1. #ifndef __SPARC_ARCH_H__
  2. # define __SPARC_ARCH_H__
  3. # define SPARCV9_TICK_PRIVILEGED (1<<0)
  4. # define SPARCV9_PREFER_FPU (1<<1)
  5. # define SPARCV9_VIS1 (1<<2)
  6. # define SPARCV9_VIS2 (1<<3)/* reserved */
  7. # define SPARCV9_FMADD (1<<4)/* reserved for SPARC64 V */
  8. # define SPARCV9_BLK (1<<5)/* VIS1 block copy */
  9. # define SPARCV9_VIS3 (1<<6)
  10. # define SPARCV9_RANDOM (1<<7)
  11. # define SPARCV9_64BIT_STACK (1<<8)
  12. /*
  13. * OPENSSL_sparcv9cap_P[1] is copy of Compatibility Feature Register,
  14. * %asr26, SPARC-T4 and later. There is no SPARCV9_CFR bit in
  15. * OPENSSL_sparcv9cap_P[0], as %cfr copy is sufficient...
  16. */
  17. # define CFR_AES 0x00000001/* Supports AES opcodes */
  18. # define CFR_DES 0x00000002/* Supports DES opcodes */
  19. # define CFR_KASUMI 0x00000004/* Supports KASUMI opcodes */
  20. # define CFR_CAMELLIA 0x00000008/* Supports CAMELLIA opcodes */
  21. # define CFR_MD5 0x00000010/* Supports MD5 opcodes */
  22. # define CFR_SHA1 0x00000020/* Supports SHA1 opcodes */
  23. # define CFR_SHA256 0x00000040/* Supports SHA256 opcodes */
  24. # define CFR_SHA512 0x00000080/* Supports SHA512 opcodes */
  25. # define CFR_MPMUL 0x00000100/* Supports MPMUL opcodes */
  26. # define CFR_MONTMUL 0x00000200/* Supports MONTMUL opcodes */
  27. # define CFR_MONTSQR 0x00000400/* Supports MONTSQR opcodes */
  28. # define CFR_CRC32C 0x00000800/* Supports CRC32C opcodes */
  29. # if defined(OPENSSL_PIC) && !defined(__PIC__)
  30. # define __PIC__
  31. # endif
  32. # if defined(__SUNPRO_C) && defined(__sparcv9) && !defined(__arch64__)
  33. # define __arch64__
  34. # endif
  35. # define SPARC_PIC_THUNK(reg) \
  36. .align 32; \
  37. .Lpic_thunk: \
  38. jmp %o7 + 8; \
  39. add %o7, reg, reg;
  40. # define SPARC_PIC_THUNK_CALL(reg) \
  41. sethi %hi(_GLOBAL_OFFSET_TABLE_-4), reg; \
  42. call .Lpic_thunk; \
  43. or reg, %lo(_GLOBAL_OFFSET_TABLE_+4), reg;
  44. # if 1
  45. # define SPARC_SETUP_GOT_REG(reg) SPARC_PIC_THUNK_CALL(reg)
  46. # else
  47. # define SPARC_SETUP_GOT_REG(reg) \
  48. sethi %hi(_GLOBAL_OFFSET_TABLE_-4), reg; \
  49. call .+8; \
  50. or reg,%lo(_GLOBAL_OFFSET_TABLE_+4), reg; \
  51. add %o7, reg, reg
  52. # endif
  53. # if defined(__arch64__)
  54. # define SPARC_LOAD_ADDRESS(SYM, reg) \
  55. setx SYM, %o7, reg;
  56. # define LDPTR ldx
  57. # define SIZE_T_CC %xcc
  58. # define STACK_FRAME 192
  59. # define STACK_BIAS 2047
  60. # define STACK_7thARG (STACK_BIAS+176)
  61. # else
  62. # define SPARC_LOAD_ADDRESS(SYM, reg) \
  63. set SYM, reg;
  64. # define LDPTR ld
  65. # define SIZE_T_CC %icc
  66. # define STACK_FRAME 112
  67. # define STACK_BIAS 0
  68. # define STACK_7thARG 92
  69. # define SPARC_LOAD_ADDRESS_LEAF(SYM,reg,tmp) SPARC_LOAD_ADDRESS(SYM,reg)
  70. # endif
  71. # ifdef __PIC__
  72. # undef SPARC_LOAD_ADDRESS
  73. # undef SPARC_LOAD_ADDRESS_LEAF
  74. # define SPARC_LOAD_ADDRESS(SYM, reg) \
  75. SPARC_SETUP_GOT_REG(reg); \
  76. sethi %hi(SYM), %o7; \
  77. or %o7, %lo(SYM), %o7; \
  78. LDPTR [reg + %o7], reg;
  79. # endif
  80. # ifndef SPARC_LOAD_ADDRESS_LEAF
  81. # define SPARC_LOAD_ADDRESS_LEAF(SYM, reg, tmp) \
  82. mov %o7, tmp; \
  83. SPARC_LOAD_ADDRESS(SYM, reg) \
  84. mov tmp, %o7;
  85. # endif
  86. #endif /* __SPARC_ARCH_H__ */