Cronologia Commit

Autore SHA1 Messaggio Data
  Sagar Acharya 72fb842564 Moved towards Riscy-SoC based on rv64 and added some datasheets 1 anno fa
  Sagar Acharya 0529cb76e1 first working code, got a blinking cursor! 2 anni fa
  Sagar Acharya 78a7595bbc corrected pcf hsync, vsync, modified my_bitgen.sh to speed up times, saves every autogenerated file now in autogen folder. 2 anni fa
  Sagar Acharya 6bb6c3b953 Tweaked everything except vt52.v 2 anni fa
  Sagar Acharya 0d3eb161eb added incomplete vt52, removed olimex ps2 and vga based codes 2 anni fa
  Sagar Acharya 7cc603961d Updated initial README, spirit of contributing to swarajya, and some guideline verilog files from olimex. 3 anni fa
  Sagar Acharya 98693b33b6 Added scripts, to convert verilog to bitstream and flash it to hx8k olimex board 3 anni fa