 Sagar Acharya
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72fb842564
Moved towards Riscy-SoC based on rv64 and added some datasheets
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%!s(int64=2) %!d(string=hai) anos |
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Sagar Acharya
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0529cb76e1
first working code, got a blinking cursor!
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%!s(int64=3) %!d(string=hai) anos |
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Sagar Acharya
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78a7595bbc
corrected pcf hsync, vsync, modified my_bitgen.sh to speed up times, saves every autogenerated file now in autogen folder.
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%!s(int64=3) %!d(string=hai) anos |
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Sagar Acharya
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6bb6c3b953
Tweaked everything except vt52.v
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%!s(int64=3) %!d(string=hai) anos |
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Sagar Acharya
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0d3eb161eb
added incomplete vt52, removed olimex ps2 and vga based codes
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%!s(int64=3) %!d(string=hai) anos |
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Sagar Acharya
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7cc603961d
Updated initial README, spirit of contributing to swarajya, and some guideline verilog files from olimex.
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%!s(int64=3) %!d(string=hai) anos |
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Sagar Acharya
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98693b33b6
Added scripts, to convert verilog to bitstream and flash it to hx8k olimex board
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%!s(int64=4) %!d(string=hai) anos |
