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- * Mediatek Thermal
- This describes the device tree binding for the Mediatek thermal controller
- which measures the on-SoC temperatures. This device does not have its own ADC,
- instead it directly controls the AUXADC via AHB bus accesses. For this reason
- this device needs phandles to the AUXADC. Also it controls a mux in the
- apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
- is also needed.
- Required properties:
- - compatible:
- - "mediatek,mt8173-thermal" : For MT8173 family of SoCs
- - "mediatek,mt2701-thermal" : For MT2701 family of SoCs
- - reg: Address range of the thermal controller
- - interrupts: IRQ for the thermal controller
- - clocks, clock-names: Clocks needed for the thermal controller. required
- clocks are:
- "therm": Main clock needed for register access
- "auxadc": The AUXADC clock
- - resets: Reference to the reset controller controlling the thermal controller.
- - mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
- - mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
- - #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
- Optional properties:
- - nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
- unspecified default values shall be used.
- - nvmem-cell-names: Should be "calibration-data"
- Example:
- thermal: thermal@1100b000 {
- #thermal-sensor-cells = <1>;
- compatible = "mediatek,mt8173-thermal";
- reg = <0 0x1100b000 0 0x1000>;
- interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
- clock-names = "therm", "auxadc";
- resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
- reset-names = "therm";
- mediatek,auxadc = <&auxadc>;
- mediatek,apmixedsys = <&apmixedsys>;
- nvmem-cells = <&thermal_calibration_data>;
- nvmem-cell-names = "calibration-data";
- };
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