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- clockgen: global-utilities@e1000 {
- compatible = "fsl,qoriq-clockgen-1.0"
- ranges = <0x0 0xe1000 0x1000>
- reg = <0xe1000 0x1000>
- clock-frequency = <0>
-
-
-
- sysclk: sysclk {
-
- compatible = "fsl,qoriq-sysclk-1.0", "fixed-clock"
- clock-output-names = "sysclk"
- }
- pll0: pll0@800 {
-
- reg = <0x800 0x4>
- compatible = "fsl,qoriq-core-pll-1.0"
- clocks = <&sysclk>
- clock-output-names = "pll0", "pll0-div2"
- }
- pll1: pll1@820 {
-
- reg = <0x820 0x4>
- compatible = "fsl,qoriq-core-pll-1.0"
- clocks = <&sysclk>
- clock-output-names = "pll1", "pll1-div2"
- }
- mux0: mux0@0 {
-
- reg = <0x0 0x4>
- compatible = "fsl,qoriq-core-mux-1.0"
- clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>
- clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"
- clock-output-names = "cmux0"
- }
- mux1: mux1@20 {
-
- reg = <0x20 0x4>
- compatible = "fsl,qoriq-core-mux-1.0"
- clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>
- clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"
- clock-output-names = "cmux1"
- }
- platform_pll: platform-pll@c00 {
-
- reg = <0xc00 0x4>
- compatible = "fsl,qoriq-platform-pll-1.0"
- clocks = <&sysclk>
- clock-output-names = "platform-pll", "platform-pll-div2"
- }
- }
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