common.vh 6.5 KB

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  1. /*
  2. * TOP2049 Open Source programming suite
  3. *
  4. * FPGA bottom half - common macros
  5. *
  6. * Copyright (c) 2012 Michael Buesch <m@bues.ch>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along
  19. * with this program; if not, write to the Free Software Foundation, Inc.,
  20. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  21. */
  22. /** ADDR_OK_BIT - The "address OK" bit */
  23. `define ADDR_OK_BIT 4
  24. /** ADDR - Create a command address.
  25. * @BASE: The address base.
  26. */
  27. `define ADDR(BASE) ((BASE) | (8'h01 << `ADDR_OK_BIT))
  28. /** BOTTOMHALF_BEGIN - Begin bottom-half module
  29. * @NAME: The bitfile name
  30. * @ID_MAJOR: Major runtime ID (16 bit). Allocated in file 'RUNTIME_IDS'.
  31. * @ID_MINOR: Minor runtime ID (8 bit)
  32. */
  33. `define BOTTOMHALF_BEGIN(NAME, ID_MAJOR, ID_MINOR) \
  34. module NAME(__data, __ale, __write, __read, __osc, zif); \
  35. inout [7:0] __data; \
  36. input __ale; \
  37. input __write; \
  38. input __read; \
  39. input __osc; \
  40. inout [48:1] zif; \
  41. \
  42. parameter __id_major = ID_MAJOR; \
  43. parameter __id_minor = ID_MINOR; \
  44. \
  45. reg [7:0] __addr_latch; \
  46. reg [7:0] out_data; \
  47. wire [7:0] in_data; \
  48. assign in_data = __data; \
  49. \
  50. wire __ale_signal; \
  51. IBUFG __ale_ibufg(.I(__ale), .O(__ale_signal)); \
  52. \
  53. /* constant low/high signals */ \
  54. wire low, high; \
  55. assign low = 0; \
  56. assign high = 1; \
  57. \
  58. /* Delay counter, based on 24MHz __osc. */ \
  59. reg [15:0] __delay_count; \
  60. wire osc_signal; \
  61. IBUF __osc_ibuf(.I(__osc), .O(osc_signal)); \
  62. \
  63. /* Command state */ \
  64. reg [1:0] __cmd_running; \
  65. reg [7:0] __cmd; \
  66. reg [7:0] __cmd_state;
  67. /** BOTTOMHALF_END - End bottom-half module */
  68. `define BOTTOMHALF_END \
  69. always @(negedge __ale_signal) begin \
  70. __addr_latch <= __data; \
  71. end \
  72. \
  73. wire __data_oe; \
  74. assign __data_oe = !__read && __addr_latch[`ADDR_OK_BIT]; \
  75. \
  76. bufif0(__data[0], out_data[0], !__data_oe); \
  77. bufif0(__data[1], out_data[1], !__data_oe); \
  78. bufif0(__data[2], out_data[2], !__data_oe); \
  79. bufif0(__data[3], out_data[3], !__data_oe); \
  80. bufif0(__data[4], out_data[4], !__data_oe); \
  81. bufif0(__data[5], out_data[5], !__data_oe); \
  82. bufif0(__data[6], out_data[6], !__data_oe); \
  83. bufif0(__data[7], out_data[7], !__data_oe); \
  84. endmodule
  85. /** INITIAL_BEGIN - Begin initialization section. */
  86. `define INITIAL_BEGIN \
  87. initial begin \
  88. __addr_latch <= 0; \
  89. out_data <= 0; \
  90. __delay_count <= 0; \
  91. __cmd_running <= 0; \
  92. __cmd <= 0; \
  93. __cmd_state <= 0;
  94. /** INITIAL_END - End initialization section. */
  95. `define INITIAL_END \
  96. end /* initial */
  97. /** INITIAL_NONE - Defines a dummy initial section. */
  98. `define INITIAL_NONE \
  99. `INITIAL_BEGIN \
  100. `INITIAL_END
  101. /** ASYNCPROC_BEGIN - Begin asynchronous OSC-based processing section. */
  102. `define ASYNCPROC_BEGIN \
  103. always @(posedge osc_signal) begin \
  104. if (__delay_count == 0) begin \
  105. /* Payload code follows... */
  106. /** ASYNCPROC_END - End asynchronous section. */
  107. `define ASYNCPROC_END \
  108. end else begin \
  109. __delay_count <= __delay_count - 1; \
  110. end /* if */ \
  111. end /* always */
  112. /** ASYNCPROC_NONE - Defines a dummy asynchronous section. */
  113. `define ASYNCPROC_NONE \
  114. `ASYNCPROC_BEGIN \
  115. `ASYNCPROC_END
  116. /** UDELAY - Microsecond delay.
  117. * @USEC: Number of microseconds to delay. Maximum is 2730.
  118. */
  119. `define UDELAY(USEC) __delay_count <= (24 * USEC) - 1;
  120. /** DATAWRITE_BEGIN - Begin "write" section.
  121. * The section body is the body of a "case" statement on the address.
  122. */
  123. `define DATAWRITE_BEGIN \
  124. always @(posedge __write) begin \
  125. case (__addr_latch)
  126. /** DATAWRITE_END - End "write" section. */
  127. `define DATAWRITE_END \
  128. default: begin end /* nothing */ \
  129. endcase \
  130. end /* always */
  131. /** DATAREAD_BEGIN - Begin "read" section.
  132. * The section body is the body of a "case" statement on the address.
  133. */
  134. `define DATAREAD_BEGIN \
  135. always @(negedge __read) begin \
  136. case (__addr_latch)
  137. /** DATAREAD_END - End "read" section. */
  138. `define DATAREAD_END \
  139. 8'hFD: out_data <= __id_major; \
  140. 8'hFE: out_data <= __id_major >> 8; \
  141. 8'hFF: out_data <= __id_minor; \
  142. default: out_data <= 0; \
  143. endcase \
  144. end /* always */
  145. /** ZIF_BUF0 - Declare a ZIF buffer with negative outen.
  146. * @PIN: The pin number.
  147. * @OUT: The output signal.
  148. * @NOUTEN: The output enable signal, active low.
  149. */
  150. `define ZIF_BUF0(PIN, OUT, NOUTEN) \
  151. bufif0(zif[PIN], OUT, NOUTEN);
  152. /** ZIF_BUF1 - Declare a ZIF buffer with positive outen.
  153. * @PIN: The pin number.
  154. * @OUT: The output signal.
  155. * @OUTEN: The output enable signal, active high.
  156. */
  157. `define ZIF_BUF1(PIN, OUT, OUTEN) \
  158. bufif1(zif[PIN], OUT, OUTEN);
  159. /** ZIF_UNUSED - Declare a ZIF pin as unused.
  160. * @PIN: The pin number.
  161. * The ZIF pin is tied low.
  162. */
  163. `define ZIF_UNUSED(PIN) \
  164. `ZIF_BUF0(PIN, low, low)
  165. /** CMD_RUN - Run a command.
  166. * @NR: The command number.
  167. */
  168. `define CMD_RUN(NR) \
  169. __cmd <= (NR); \
  170. __cmd_running[0] <= ~__cmd_running[1];
  171. /** CMD_RUNFLG_SYNC - Returns the synchronous run flag. */
  172. `define CMD_RUNFLG_SYNC __cmd_running[0]
  173. /** CMD_RUNFLG_ASYNC - Returns the asynchronous run flag. */
  174. `define CMD_RUNFLG_ASYNC __cmd_running[1]
  175. /** CMD_IS_RUNNING - Returns a boolean whether a command is running. */
  176. `define CMD_IS_RUNNING (`CMD_RUNFLG_SYNC ^ `CMD_RUNFLG_ASYNC)
  177. /** CMD_NR - Returns the current command number. */
  178. `define CMD_NR __cmd
  179. /** CMD_IS - Returns a boolean whether a certain command is running.
  180. * @NR: The command number to check.
  181. */
  182. `define CMD_IS(NR) (`CMD_IS_RUNNING && `CMD_NR == (NR))
  183. /** CMD_FINISH - Finishes a command. */
  184. `define CMD_FINISH \
  185. __cmd_running[1] <= __cmd_running[0]; \
  186. __cmd_state <= 0;
  187. /** CMD_STATE - Get command state. */
  188. `define CMD_STATE __cmd_state
  189. /** CMD_STATE_SET - Set command state.
  190. * @VALUE: New value.
  191. */
  192. `define CMD_STATE_SET(VALUE) \
  193. __cmd_state <= (VALUE);
  194. /* vim: filetype=verilog:shiftwidth=8:tabstop=8:softtabstop=8
  195. */