at86rf230.c 43 KB

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  1. /*
  2. * AT86RF230/RF231 driver
  3. *
  4. * Copyright (C) 2009-2012 Siemens AG
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2
  8. * as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * Written by:
  16. * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
  17. * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
  18. * Alexander Aring <aar@pengutronix.de>
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/hrtimer.h>
  23. #include <linux/jiffies.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/gpio.h>
  27. #include <linux/delay.h>
  28. #include <linux/spi/spi.h>
  29. #include <linux/spi/at86rf230.h>
  30. #include <linux/regmap.h>
  31. #include <linux/skbuff.h>
  32. #include <linux/of_gpio.h>
  33. #include <linux/ieee802154.h>
  34. #include <net/mac802154.h>
  35. #include <net/cfg802154.h>
  36. #include "at86rf230.h"
  37. struct at86rf230_local;
  38. /* at86rf2xx chip depend data.
  39. * All timings are in us.
  40. */
  41. struct at86rf2xx_chip_data {
  42. u16 t_sleep_cycle;
  43. u16 t_channel_switch;
  44. u16 t_reset_to_off;
  45. u16 t_off_to_aack;
  46. u16 t_off_to_tx_on;
  47. u16 t_off_to_sleep;
  48. u16 t_sleep_to_off;
  49. u16 t_frame;
  50. u16 t_p_ack;
  51. int rssi_base_val;
  52. int (*set_channel)(struct at86rf230_local *, u8, u8);
  53. int (*set_txpower)(struct at86rf230_local *, s32);
  54. };
  55. #define AT86RF2XX_MAX_BUF (127 + 3)
  56. /* tx retries to access the TX_ON state
  57. * if it's above then force change will be started.
  58. *
  59. * We assume the max_frame_retries (7) value of 802.15.4 here.
  60. */
  61. #define AT86RF2XX_MAX_TX_RETRIES 7
  62. /* We use the recommended 5 minutes timeout to recalibrate */
  63. #define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
  64. struct at86rf230_state_change {
  65. struct at86rf230_local *lp;
  66. int irq;
  67. struct hrtimer timer;
  68. struct spi_message msg;
  69. struct spi_transfer trx;
  70. u8 buf[AT86RF2XX_MAX_BUF];
  71. void (*complete)(void *context);
  72. u8 from_state;
  73. u8 to_state;
  74. bool irq_enable;
  75. };
  76. struct at86rf230_local {
  77. struct spi_device *spi;
  78. struct ieee802154_hw *hw;
  79. struct at86rf2xx_chip_data *data;
  80. struct regmap *regmap;
  81. int slp_tr;
  82. bool sleep;
  83. struct completion state_complete;
  84. struct at86rf230_state_change state;
  85. struct at86rf230_state_change irq;
  86. bool tx_aret;
  87. unsigned long cal_timeout;
  88. s8 max_frame_retries;
  89. bool is_tx;
  90. bool is_tx_from_off;
  91. u8 tx_retry;
  92. struct sk_buff *tx_skb;
  93. struct at86rf230_state_change tx;
  94. };
  95. #define AT86RF2XX_NUMREGS 0x3F
  96. static void
  97. at86rf230_async_state_change(struct at86rf230_local *lp,
  98. struct at86rf230_state_change *ctx,
  99. const u8 state, void (*complete)(void *context),
  100. const bool irq_enable);
  101. static inline void
  102. at86rf230_sleep(struct at86rf230_local *lp)
  103. {
  104. if (gpio_is_valid(lp->slp_tr)) {
  105. gpio_set_value(lp->slp_tr, 1);
  106. usleep_range(lp->data->t_off_to_sleep,
  107. lp->data->t_off_to_sleep + 10);
  108. lp->sleep = true;
  109. }
  110. }
  111. static inline void
  112. at86rf230_awake(struct at86rf230_local *lp)
  113. {
  114. if (gpio_is_valid(lp->slp_tr)) {
  115. gpio_set_value(lp->slp_tr, 0);
  116. usleep_range(lp->data->t_sleep_to_off,
  117. lp->data->t_sleep_to_off + 100);
  118. lp->sleep = false;
  119. }
  120. }
  121. static inline int
  122. __at86rf230_write(struct at86rf230_local *lp,
  123. unsigned int addr, unsigned int data)
  124. {
  125. bool sleep = lp->sleep;
  126. int ret;
  127. /* awake for register setting if sleep */
  128. if (sleep)
  129. at86rf230_awake(lp);
  130. ret = regmap_write(lp->regmap, addr, data);
  131. /* sleep again if was sleeping */
  132. if (sleep)
  133. at86rf230_sleep(lp);
  134. return ret;
  135. }
  136. static inline int
  137. __at86rf230_read(struct at86rf230_local *lp,
  138. unsigned int addr, unsigned int *data)
  139. {
  140. bool sleep = lp->sleep;
  141. int ret;
  142. /* awake for register setting if sleep */
  143. if (sleep)
  144. at86rf230_awake(lp);
  145. ret = regmap_read(lp->regmap, addr, data);
  146. /* sleep again if was sleeping */
  147. if (sleep)
  148. at86rf230_sleep(lp);
  149. return ret;
  150. }
  151. static inline int
  152. at86rf230_read_subreg(struct at86rf230_local *lp,
  153. unsigned int addr, unsigned int mask,
  154. unsigned int shift, unsigned int *data)
  155. {
  156. int rc;
  157. rc = __at86rf230_read(lp, addr, data);
  158. if (!rc)
  159. *data = (*data & mask) >> shift;
  160. return rc;
  161. }
  162. static inline int
  163. at86rf230_write_subreg(struct at86rf230_local *lp,
  164. unsigned int addr, unsigned int mask,
  165. unsigned int shift, unsigned int data)
  166. {
  167. bool sleep = lp->sleep;
  168. int ret;
  169. /* awake for register setting if sleep */
  170. if (sleep)
  171. at86rf230_awake(lp);
  172. ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
  173. /* sleep again if was sleeping */
  174. if (sleep)
  175. at86rf230_sleep(lp);
  176. return ret;
  177. }
  178. static inline void
  179. at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
  180. {
  181. gpio_set_value(lp->slp_tr, 1);
  182. udelay(1);
  183. gpio_set_value(lp->slp_tr, 0);
  184. }
  185. static bool
  186. at86rf230_reg_writeable(struct device *dev, unsigned int reg)
  187. {
  188. switch (reg) {
  189. case RG_TRX_STATE:
  190. case RG_TRX_CTRL_0:
  191. case RG_TRX_CTRL_1:
  192. case RG_PHY_TX_PWR:
  193. case RG_PHY_ED_LEVEL:
  194. case RG_PHY_CC_CCA:
  195. case RG_CCA_THRES:
  196. case RG_RX_CTRL:
  197. case RG_SFD_VALUE:
  198. case RG_TRX_CTRL_2:
  199. case RG_ANT_DIV:
  200. case RG_IRQ_MASK:
  201. case RG_VREG_CTRL:
  202. case RG_BATMON:
  203. case RG_XOSC_CTRL:
  204. case RG_RX_SYN:
  205. case RG_XAH_CTRL_1:
  206. case RG_FTN_CTRL:
  207. case RG_PLL_CF:
  208. case RG_PLL_DCU:
  209. case RG_SHORT_ADDR_0:
  210. case RG_SHORT_ADDR_1:
  211. case RG_PAN_ID_0:
  212. case RG_PAN_ID_1:
  213. case RG_IEEE_ADDR_0:
  214. case RG_IEEE_ADDR_1:
  215. case RG_IEEE_ADDR_2:
  216. case RG_IEEE_ADDR_3:
  217. case RG_IEEE_ADDR_4:
  218. case RG_IEEE_ADDR_5:
  219. case RG_IEEE_ADDR_6:
  220. case RG_IEEE_ADDR_7:
  221. case RG_XAH_CTRL_0:
  222. case RG_CSMA_SEED_0:
  223. case RG_CSMA_SEED_1:
  224. case RG_CSMA_BE:
  225. return true;
  226. default:
  227. return false;
  228. }
  229. }
  230. static bool
  231. at86rf230_reg_readable(struct device *dev, unsigned int reg)
  232. {
  233. bool rc;
  234. /* all writeable are also readable */
  235. rc = at86rf230_reg_writeable(dev, reg);
  236. if (rc)
  237. return rc;
  238. /* readonly regs */
  239. switch (reg) {
  240. case RG_TRX_STATUS:
  241. case RG_PHY_RSSI:
  242. case RG_IRQ_STATUS:
  243. case RG_PART_NUM:
  244. case RG_VERSION_NUM:
  245. case RG_MAN_ID_1:
  246. case RG_MAN_ID_0:
  247. return true;
  248. default:
  249. return false;
  250. }
  251. }
  252. static bool
  253. at86rf230_reg_volatile(struct device *dev, unsigned int reg)
  254. {
  255. /* can be changed during runtime */
  256. switch (reg) {
  257. case RG_TRX_STATUS:
  258. case RG_TRX_STATE:
  259. case RG_PHY_RSSI:
  260. case RG_PHY_ED_LEVEL:
  261. case RG_IRQ_STATUS:
  262. case RG_VREG_CTRL:
  263. case RG_PLL_CF:
  264. case RG_PLL_DCU:
  265. return true;
  266. default:
  267. return false;
  268. }
  269. }
  270. static bool
  271. at86rf230_reg_precious(struct device *dev, unsigned int reg)
  272. {
  273. /* don't clear irq line on read */
  274. switch (reg) {
  275. case RG_IRQ_STATUS:
  276. return true;
  277. default:
  278. return false;
  279. }
  280. }
  281. static const struct regmap_config at86rf230_regmap_spi_config = {
  282. .reg_bits = 8,
  283. .val_bits = 8,
  284. .write_flag_mask = CMD_REG | CMD_WRITE,
  285. .read_flag_mask = CMD_REG,
  286. .cache_type = REGCACHE_RBTREE,
  287. .max_register = AT86RF2XX_NUMREGS,
  288. .writeable_reg = at86rf230_reg_writeable,
  289. .readable_reg = at86rf230_reg_readable,
  290. .volatile_reg = at86rf230_reg_volatile,
  291. .precious_reg = at86rf230_reg_precious,
  292. };
  293. static void
  294. at86rf230_async_error_recover(void *context)
  295. {
  296. struct at86rf230_state_change *ctx = context;
  297. struct at86rf230_local *lp = ctx->lp;
  298. lp->is_tx = 0;
  299. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL, false);
  300. ieee802154_wake_queue(lp->hw);
  301. }
  302. static inline void
  303. at86rf230_async_error(struct at86rf230_local *lp,
  304. struct at86rf230_state_change *ctx, int rc)
  305. {
  306. dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
  307. at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
  308. at86rf230_async_error_recover, false);
  309. }
  310. /* Generic function to get some register value in async mode */
  311. static void
  312. at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg,
  313. struct at86rf230_state_change *ctx,
  314. void (*complete)(void *context),
  315. const bool irq_enable)
  316. {
  317. int rc;
  318. u8 *tx_buf = ctx->buf;
  319. tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
  320. ctx->msg.complete = complete;
  321. ctx->irq_enable = irq_enable;
  322. rc = spi_async(lp->spi, &ctx->msg);
  323. if (rc) {
  324. if (irq_enable)
  325. enable_irq(ctx->irq);
  326. at86rf230_async_error(lp, ctx, rc);
  327. }
  328. }
  329. static inline u8 at86rf230_state_to_force(u8 state)
  330. {
  331. if (state == STATE_TX_ON)
  332. return STATE_FORCE_TX_ON;
  333. else
  334. return STATE_FORCE_TRX_OFF;
  335. }
  336. static void
  337. at86rf230_async_state_assert(void *context)
  338. {
  339. struct at86rf230_state_change *ctx = context;
  340. struct at86rf230_local *lp = ctx->lp;
  341. const u8 *buf = ctx->buf;
  342. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  343. /* Assert state change */
  344. if (trx_state != ctx->to_state) {
  345. /* Special handling if transceiver state is in
  346. * STATE_BUSY_RX_AACK and a SHR was detected.
  347. */
  348. if (trx_state == STATE_BUSY_RX_AACK) {
  349. /* Undocumented race condition. If we send a state
  350. * change to STATE_RX_AACK_ON the transceiver could
  351. * change his state automatically to STATE_BUSY_RX_AACK
  352. * if a SHR was detected. This is not an error, but we
  353. * can't assert this.
  354. */
  355. if (ctx->to_state == STATE_RX_AACK_ON)
  356. goto done;
  357. /* If we change to STATE_TX_ON without forcing and
  358. * transceiver state is STATE_BUSY_RX_AACK, we wait
  359. * 'tFrame + tPAck' receiving time. In this time the
  360. * PDU should be received. If the transceiver is still
  361. * in STATE_BUSY_RX_AACK, we run a force state change
  362. * to STATE_TX_ON. This is a timeout handling, if the
  363. * transceiver stucks in STATE_BUSY_RX_AACK.
  364. *
  365. * Additional we do several retries to try to get into
  366. * TX_ON state without forcing. If the retries are
  367. * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
  368. * will do a force change.
  369. */
  370. if (ctx->to_state == STATE_TX_ON ||
  371. ctx->to_state == STATE_TRX_OFF) {
  372. u8 state = ctx->to_state;
  373. if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
  374. state = at86rf230_state_to_force(state);
  375. lp->tx_retry++;
  376. at86rf230_async_state_change(lp, ctx, state,
  377. ctx->complete,
  378. ctx->irq_enable);
  379. return;
  380. }
  381. }
  382. dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
  383. ctx->from_state, ctx->to_state, trx_state);
  384. }
  385. done:
  386. if (ctx->complete)
  387. ctx->complete(context);
  388. }
  389. static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
  390. {
  391. struct at86rf230_state_change *ctx =
  392. container_of(timer, struct at86rf230_state_change, timer);
  393. struct at86rf230_local *lp = ctx->lp;
  394. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  395. at86rf230_async_state_assert,
  396. ctx->irq_enable);
  397. return HRTIMER_NORESTART;
  398. }
  399. /* Do state change timing delay. */
  400. static void
  401. at86rf230_async_state_delay(void *context)
  402. {
  403. struct at86rf230_state_change *ctx = context;
  404. struct at86rf230_local *lp = ctx->lp;
  405. struct at86rf2xx_chip_data *c = lp->data;
  406. bool force = false;
  407. ktime_t tim;
  408. /* The force state changes are will show as normal states in the
  409. * state status subregister. We change the to_state to the
  410. * corresponding one and remember if it was a force change, this
  411. * differs if we do a state change from STATE_BUSY_RX_AACK.
  412. */
  413. switch (ctx->to_state) {
  414. case STATE_FORCE_TX_ON:
  415. ctx->to_state = STATE_TX_ON;
  416. force = true;
  417. break;
  418. case STATE_FORCE_TRX_OFF:
  419. ctx->to_state = STATE_TRX_OFF;
  420. force = true;
  421. break;
  422. default:
  423. break;
  424. }
  425. switch (ctx->from_state) {
  426. case STATE_TRX_OFF:
  427. switch (ctx->to_state) {
  428. case STATE_RX_AACK_ON:
  429. tim = ktime_set(0, c->t_off_to_aack * NSEC_PER_USEC);
  430. /* state change from TRX_OFF to RX_AACK_ON to do a
  431. * calibration, we need to reset the timeout for the
  432. * next one.
  433. */
  434. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  435. goto change;
  436. case STATE_TX_ARET_ON:
  437. case STATE_TX_ON:
  438. tim = ktime_set(0, c->t_off_to_tx_on * NSEC_PER_USEC);
  439. /* state change from TRX_OFF to TX_ON or ARET_ON to do
  440. * a calibration, we need to reset the timeout for the
  441. * next one.
  442. */
  443. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  444. goto change;
  445. default:
  446. break;
  447. }
  448. break;
  449. case STATE_BUSY_RX_AACK:
  450. switch (ctx->to_state) {
  451. case STATE_TRX_OFF:
  452. case STATE_TX_ON:
  453. /* Wait for worst case receiving time if we
  454. * didn't make a force change from BUSY_RX_AACK
  455. * to TX_ON or TRX_OFF.
  456. */
  457. if (!force) {
  458. tim = ktime_set(0, (c->t_frame + c->t_p_ack) *
  459. NSEC_PER_USEC);
  460. goto change;
  461. }
  462. break;
  463. default:
  464. break;
  465. }
  466. break;
  467. /* Default value, means RESET state */
  468. case STATE_P_ON:
  469. switch (ctx->to_state) {
  470. case STATE_TRX_OFF:
  471. tim = ktime_set(0, c->t_reset_to_off * NSEC_PER_USEC);
  472. goto change;
  473. default:
  474. break;
  475. }
  476. break;
  477. default:
  478. break;
  479. }
  480. /* Default delay is 1us in the most cases */
  481. tim = ktime_set(0, NSEC_PER_USEC);
  482. change:
  483. hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
  484. }
  485. static void
  486. at86rf230_async_state_change_start(void *context)
  487. {
  488. struct at86rf230_state_change *ctx = context;
  489. struct at86rf230_local *lp = ctx->lp;
  490. u8 *buf = ctx->buf;
  491. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  492. int rc;
  493. /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
  494. if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
  495. udelay(1);
  496. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  497. at86rf230_async_state_change_start,
  498. ctx->irq_enable);
  499. return;
  500. }
  501. /* Check if we already are in the state which we change in */
  502. if (trx_state == ctx->to_state) {
  503. if (ctx->complete)
  504. ctx->complete(context);
  505. return;
  506. }
  507. /* Set current state to the context of state change */
  508. ctx->from_state = trx_state;
  509. /* Going into the next step for a state change which do a timing
  510. * relevant delay.
  511. */
  512. buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
  513. buf[1] = ctx->to_state;
  514. ctx->msg.complete = at86rf230_async_state_delay;
  515. rc = spi_async(lp->spi, &ctx->msg);
  516. if (rc) {
  517. if (ctx->irq_enable)
  518. enable_irq(ctx->irq);
  519. at86rf230_async_error(lp, ctx, rc);
  520. }
  521. }
  522. static void
  523. at86rf230_async_state_change(struct at86rf230_local *lp,
  524. struct at86rf230_state_change *ctx,
  525. const u8 state, void (*complete)(void *context),
  526. const bool irq_enable)
  527. {
  528. /* Initialization for the state change context */
  529. ctx->to_state = state;
  530. ctx->complete = complete;
  531. ctx->irq_enable = irq_enable;
  532. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  533. at86rf230_async_state_change_start,
  534. irq_enable);
  535. }
  536. static void
  537. at86rf230_sync_state_change_complete(void *context)
  538. {
  539. struct at86rf230_state_change *ctx = context;
  540. struct at86rf230_local *lp = ctx->lp;
  541. complete(&lp->state_complete);
  542. }
  543. /* This function do a sync framework above the async state change.
  544. * Some callbacks of the IEEE 802.15.4 driver interface need to be
  545. * handled synchronously.
  546. */
  547. static int
  548. at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
  549. {
  550. unsigned long rc;
  551. at86rf230_async_state_change(lp, &lp->state, state,
  552. at86rf230_sync_state_change_complete,
  553. false);
  554. rc = wait_for_completion_timeout(&lp->state_complete,
  555. msecs_to_jiffies(100));
  556. if (!rc) {
  557. at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
  558. return -ETIMEDOUT;
  559. }
  560. return 0;
  561. }
  562. static void
  563. at86rf230_tx_complete(void *context)
  564. {
  565. struct at86rf230_state_change *ctx = context;
  566. struct at86rf230_local *lp = ctx->lp;
  567. enable_irq(ctx->irq);
  568. ieee802154_xmit_complete(lp->hw, lp->tx_skb, !lp->tx_aret);
  569. }
  570. static void
  571. at86rf230_tx_on(void *context)
  572. {
  573. struct at86rf230_state_change *ctx = context;
  574. struct at86rf230_local *lp = ctx->lp;
  575. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
  576. at86rf230_tx_complete, true);
  577. }
  578. static void
  579. at86rf230_tx_trac_check(void *context)
  580. {
  581. struct at86rf230_state_change *ctx = context;
  582. struct at86rf230_local *lp = ctx->lp;
  583. const u8 *buf = ctx->buf;
  584. const u8 trac = (buf[1] & 0xe0) >> 5;
  585. /* If trac status is different than zero we need to do a state change
  586. * to STATE_FORCE_TRX_OFF then STATE_RX_AACK_ON to recover the
  587. * transceiver.
  588. */
  589. if (trac)
  590. at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
  591. at86rf230_tx_on, true);
  592. else
  593. at86rf230_tx_on(context);
  594. }
  595. static void
  596. at86rf230_tx_trac_status(void *context)
  597. {
  598. struct at86rf230_state_change *ctx = context;
  599. struct at86rf230_local *lp = ctx->lp;
  600. at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
  601. at86rf230_tx_trac_check, true);
  602. }
  603. static void
  604. at86rf230_rx_read_frame_complete(void *context)
  605. {
  606. struct at86rf230_state_change *ctx = context;
  607. struct at86rf230_local *lp = ctx->lp;
  608. u8 rx_local_buf[AT86RF2XX_MAX_BUF];
  609. const u8 *buf = ctx->buf;
  610. struct sk_buff *skb;
  611. u8 len, lqi;
  612. len = buf[1];
  613. if (!ieee802154_is_valid_psdu_len(len)) {
  614. dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
  615. len = IEEE802154_MTU;
  616. }
  617. lqi = buf[2 + len];
  618. memcpy(rx_local_buf, buf + 2, len);
  619. ctx->trx.len = 2;
  620. enable_irq(ctx->irq);
  621. skb = dev_alloc_skb(IEEE802154_MTU);
  622. if (!skb) {
  623. dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
  624. return;
  625. }
  626. memcpy(skb_put(skb, len), rx_local_buf, len);
  627. ieee802154_rx_irqsafe(lp->hw, skb, lqi);
  628. }
  629. static void
  630. at86rf230_rx_read_frame(void *context)
  631. {
  632. struct at86rf230_state_change *ctx = context;
  633. struct at86rf230_local *lp = ctx->lp;
  634. u8 *buf = ctx->buf;
  635. int rc;
  636. buf[0] = CMD_FB;
  637. ctx->trx.len = AT86RF2XX_MAX_BUF;
  638. ctx->msg.complete = at86rf230_rx_read_frame_complete;
  639. rc = spi_async(lp->spi, &ctx->msg);
  640. if (rc) {
  641. ctx->trx.len = 2;
  642. enable_irq(ctx->irq);
  643. at86rf230_async_error(lp, ctx, rc);
  644. }
  645. }
  646. static void
  647. at86rf230_rx_trac_check(void *context)
  648. {
  649. /* Possible check on trac status here. This could be useful to make
  650. * some stats why receive is failed. Not used at the moment, but it's
  651. * maybe timing relevant. Datasheet doesn't say anything about this.
  652. * The programming guide say do it so.
  653. */
  654. at86rf230_rx_read_frame(context);
  655. }
  656. static void
  657. at86rf230_irq_trx_end(struct at86rf230_local *lp)
  658. {
  659. if (lp->is_tx) {
  660. lp->is_tx = 0;
  661. if (lp->tx_aret)
  662. at86rf230_async_state_change(lp, &lp->irq,
  663. STATE_FORCE_TX_ON,
  664. at86rf230_tx_trac_status,
  665. true);
  666. else
  667. at86rf230_async_state_change(lp, &lp->irq,
  668. STATE_RX_AACK_ON,
  669. at86rf230_tx_complete,
  670. true);
  671. } else {
  672. at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq,
  673. at86rf230_rx_trac_check, true);
  674. }
  675. }
  676. static void
  677. at86rf230_irq_status(void *context)
  678. {
  679. struct at86rf230_state_change *ctx = context;
  680. struct at86rf230_local *lp = ctx->lp;
  681. const u8 *buf = ctx->buf;
  682. const u8 irq = buf[1];
  683. if (irq & IRQ_TRX_END) {
  684. at86rf230_irq_trx_end(lp);
  685. } else {
  686. enable_irq(ctx->irq);
  687. dev_err(&lp->spi->dev, "not supported irq %02x received\n",
  688. irq);
  689. }
  690. }
  691. static irqreturn_t at86rf230_isr(int irq, void *data)
  692. {
  693. struct at86rf230_local *lp = data;
  694. struct at86rf230_state_change *ctx = &lp->irq;
  695. u8 *buf = ctx->buf;
  696. int rc;
  697. disable_irq_nosync(irq);
  698. buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
  699. ctx->msg.complete = at86rf230_irq_status;
  700. rc = spi_async(lp->spi, &ctx->msg);
  701. if (rc) {
  702. enable_irq(irq);
  703. at86rf230_async_error(lp, ctx, rc);
  704. return IRQ_NONE;
  705. }
  706. return IRQ_HANDLED;
  707. }
  708. static void
  709. at86rf230_write_frame_complete(void *context)
  710. {
  711. struct at86rf230_state_change *ctx = context;
  712. struct at86rf230_local *lp = ctx->lp;
  713. u8 *buf = ctx->buf;
  714. int rc;
  715. ctx->trx.len = 2;
  716. if (gpio_is_valid(lp->slp_tr)) {
  717. at86rf230_slp_tr_rising_edge(lp);
  718. } else {
  719. buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
  720. buf[1] = STATE_BUSY_TX;
  721. ctx->msg.complete = NULL;
  722. rc = spi_async(lp->spi, &ctx->msg);
  723. if (rc)
  724. at86rf230_async_error(lp, ctx, rc);
  725. }
  726. }
  727. static void
  728. at86rf230_write_frame(void *context)
  729. {
  730. struct at86rf230_state_change *ctx = context;
  731. struct at86rf230_local *lp = ctx->lp;
  732. struct sk_buff *skb = lp->tx_skb;
  733. u8 *buf = ctx->buf;
  734. int rc;
  735. lp->is_tx = 1;
  736. buf[0] = CMD_FB | CMD_WRITE;
  737. buf[1] = skb->len + 2;
  738. memcpy(buf + 2, skb->data, skb->len);
  739. ctx->trx.len = skb->len + 2;
  740. ctx->msg.complete = at86rf230_write_frame_complete;
  741. rc = spi_async(lp->spi, &ctx->msg);
  742. if (rc) {
  743. ctx->trx.len = 2;
  744. at86rf230_async_error(lp, ctx, rc);
  745. }
  746. }
  747. static void
  748. at86rf230_xmit_tx_on(void *context)
  749. {
  750. struct at86rf230_state_change *ctx = context;
  751. struct at86rf230_local *lp = ctx->lp;
  752. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  753. at86rf230_write_frame, false);
  754. }
  755. static void
  756. at86rf230_xmit_start(void *context)
  757. {
  758. struct at86rf230_state_change *ctx = context;
  759. struct at86rf230_local *lp = ctx->lp;
  760. /* In ARET mode we need to go into STATE_TX_ARET_ON after we
  761. * are in STATE_TX_ON. The pfad differs here, so we change
  762. * the complete handler.
  763. */
  764. if (lp->tx_aret) {
  765. if (lp->is_tx_from_off) {
  766. lp->is_tx_from_off = false;
  767. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  768. at86rf230_write_frame,
  769. false);
  770. } else {
  771. at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
  772. at86rf230_xmit_tx_on,
  773. false);
  774. }
  775. } else {
  776. at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
  777. at86rf230_write_frame, false);
  778. }
  779. }
  780. static int
  781. at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
  782. {
  783. struct at86rf230_local *lp = hw->priv;
  784. struct at86rf230_state_change *ctx = &lp->tx;
  785. lp->tx_skb = skb;
  786. lp->tx_retry = 0;
  787. /* After 5 minutes in PLL and the same frequency we run again the
  788. * calibration loops which is recommended by at86rf2xx datasheets.
  789. *
  790. * The calibration is initiate by a state change from TRX_OFF
  791. * to TX_ON, the lp->cal_timeout should be reinit by state_delay
  792. * function then to start in the next 5 minutes.
  793. */
  794. if (time_is_before_jiffies(lp->cal_timeout)) {
  795. lp->is_tx_from_off = true;
  796. at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
  797. at86rf230_xmit_start, false);
  798. } else {
  799. at86rf230_xmit_start(ctx);
  800. }
  801. return 0;
  802. }
  803. static int
  804. at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
  805. {
  806. BUG_ON(!level);
  807. *level = 0xbe;
  808. return 0;
  809. }
  810. static int
  811. at86rf230_start(struct ieee802154_hw *hw)
  812. {
  813. struct at86rf230_local *lp = hw->priv;
  814. at86rf230_awake(lp);
  815. enable_irq(lp->spi->irq);
  816. return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
  817. }
  818. static void
  819. at86rf230_stop(struct ieee802154_hw *hw)
  820. {
  821. struct at86rf230_local *lp = hw->priv;
  822. u8 csma_seed[2];
  823. at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  824. disable_irq(lp->spi->irq);
  825. /* It's recommended to set random new csma_seeds before sleep state.
  826. * Makes only sense in the stop callback, not doing this inside of
  827. * at86rf230_sleep, this is also used when we don't transmit afterwards
  828. * when calling start callback again.
  829. */
  830. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  831. at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  832. at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  833. at86rf230_sleep(lp);
  834. }
  835. static int
  836. at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  837. {
  838. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  839. }
  840. #define AT86RF2XX_MAX_ED_LEVELS 0xF
  841. static const s32 at86rf23x_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  842. -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
  843. -7100, -6900, -6700, -6500, -6300, -6100,
  844. };
  845. static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  846. -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
  847. -8000, -7800, -7600, -7400, -7200, -7000,
  848. };
  849. static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  850. -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
  851. -7800, -7600, -7400, -7200, -7000, -6800,
  852. };
  853. static inline int
  854. at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
  855. {
  856. unsigned int cca_ed_thres;
  857. int rc;
  858. rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
  859. if (rc < 0)
  860. return rc;
  861. switch (rssi_base_val) {
  862. case -98:
  863. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
  864. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
  865. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
  866. break;
  867. case -100:
  868. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  869. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  870. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
  871. break;
  872. default:
  873. WARN_ON(1);
  874. }
  875. return 0;
  876. }
  877. static int
  878. at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  879. {
  880. int rc;
  881. if (channel == 0)
  882. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
  883. else
  884. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
  885. if (rc < 0)
  886. return rc;
  887. if (page == 0) {
  888. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
  889. lp->data->rssi_base_val = -100;
  890. } else {
  891. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
  892. lp->data->rssi_base_val = -98;
  893. }
  894. if (rc < 0)
  895. return rc;
  896. rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
  897. if (rc < 0)
  898. return rc;
  899. /* This sets the symbol_duration according frequency on the 212.
  900. * TODO move this handling while set channel and page in cfg802154.
  901. * We can do that, this timings are according 802.15.4 standard.
  902. * If we do that in cfg802154, this is a more generic calculation.
  903. *
  904. * This should also protected from ifs_timer. Means cancel timer and
  905. * init with a new value. For now, this is okay.
  906. */
  907. if (channel == 0) {
  908. if (page == 0) {
  909. /* SUB:0 and BPSK:0 -> BPSK-20 */
  910. lp->hw->phy->symbol_duration = 50;
  911. } else {
  912. /* SUB:1 and BPSK:0 -> BPSK-40 */
  913. lp->hw->phy->symbol_duration = 25;
  914. }
  915. } else {
  916. if (page == 0)
  917. /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
  918. lp->hw->phy->symbol_duration = 40;
  919. else
  920. /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
  921. lp->hw->phy->symbol_duration = 16;
  922. }
  923. lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
  924. lp->hw->phy->symbol_duration;
  925. lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
  926. lp->hw->phy->symbol_duration;
  927. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  928. }
  929. static int
  930. at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
  931. {
  932. struct at86rf230_local *lp = hw->priv;
  933. int rc;
  934. rc = lp->data->set_channel(lp, page, channel);
  935. /* Wait for PLL */
  936. usleep_range(lp->data->t_channel_switch,
  937. lp->data->t_channel_switch + 10);
  938. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  939. return rc;
  940. }
  941. static int
  942. at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
  943. struct ieee802154_hw_addr_filt *filt,
  944. unsigned long changed)
  945. {
  946. struct at86rf230_local *lp = hw->priv;
  947. if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
  948. u16 addr = le16_to_cpu(filt->short_addr);
  949. dev_vdbg(&lp->spi->dev,
  950. "at86rf230_set_hw_addr_filt called for saddr\n");
  951. __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
  952. __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
  953. }
  954. if (changed & IEEE802154_AFILT_PANID_CHANGED) {
  955. u16 pan = le16_to_cpu(filt->pan_id);
  956. dev_vdbg(&lp->spi->dev,
  957. "at86rf230_set_hw_addr_filt called for pan id\n");
  958. __at86rf230_write(lp, RG_PAN_ID_0, pan);
  959. __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
  960. }
  961. if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
  962. u8 i, addr[8];
  963. memcpy(addr, &filt->ieee_addr, 8);
  964. dev_vdbg(&lp->spi->dev,
  965. "at86rf230_set_hw_addr_filt called for IEEE addr\n");
  966. for (i = 0; i < 8; i++)
  967. __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
  968. }
  969. if (changed & IEEE802154_AFILT_PANC_CHANGED) {
  970. dev_vdbg(&lp->spi->dev,
  971. "at86rf230_set_hw_addr_filt called for panc change\n");
  972. if (filt->pan_coord)
  973. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
  974. else
  975. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
  976. }
  977. return 0;
  978. }
  979. #define AT86RF23X_MAX_TX_POWERS 0xF
  980. static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  981. 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
  982. -800, -1200, -1700,
  983. };
  984. static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  985. 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
  986. -900, -1200, -1700,
  987. };
  988. #define AT86RF212_MAX_TX_POWERS 0x1F
  989. static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
  990. 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
  991. -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
  992. -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
  993. };
  994. static int
  995. at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
  996. {
  997. u32 i;
  998. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  999. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  1000. return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
  1001. }
  1002. return -EINVAL;
  1003. }
  1004. static int
  1005. at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
  1006. {
  1007. u32 i;
  1008. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  1009. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  1010. return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
  1011. }
  1012. return -EINVAL;
  1013. }
  1014. static int
  1015. at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
  1016. {
  1017. struct at86rf230_local *lp = hw->priv;
  1018. return lp->data->set_txpower(lp, mbm);
  1019. }
  1020. static int
  1021. at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
  1022. {
  1023. struct at86rf230_local *lp = hw->priv;
  1024. return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
  1025. }
  1026. static int
  1027. at86rf230_set_cca_mode(struct ieee802154_hw *hw,
  1028. const struct wpan_phy_cca *cca)
  1029. {
  1030. struct at86rf230_local *lp = hw->priv;
  1031. u8 val;
  1032. /* mapping 802.15.4 to driver spec */
  1033. switch (cca->mode) {
  1034. case NL802154_CCA_ENERGY:
  1035. val = 1;
  1036. break;
  1037. case NL802154_CCA_CARRIER:
  1038. val = 2;
  1039. break;
  1040. case NL802154_CCA_ENERGY_CARRIER:
  1041. switch (cca->opt) {
  1042. case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
  1043. val = 3;
  1044. break;
  1045. case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
  1046. val = 0;
  1047. break;
  1048. default:
  1049. return -EINVAL;
  1050. }
  1051. break;
  1052. default:
  1053. return -EINVAL;
  1054. }
  1055. return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
  1056. }
  1057. static int
  1058. at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
  1059. {
  1060. struct at86rf230_local *lp = hw->priv;
  1061. u32 i;
  1062. for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
  1063. if (hw->phy->supported.cca_ed_levels[i] == mbm)
  1064. return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
  1065. }
  1066. return -EINVAL;
  1067. }
  1068. static int
  1069. at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
  1070. u8 retries)
  1071. {
  1072. struct at86rf230_local *lp = hw->priv;
  1073. int rc;
  1074. rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
  1075. if (rc)
  1076. return rc;
  1077. rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
  1078. if (rc)
  1079. return rc;
  1080. return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
  1081. }
  1082. static int
  1083. at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
  1084. {
  1085. struct at86rf230_local *lp = hw->priv;
  1086. int rc = 0;
  1087. lp->tx_aret = retries >= 0;
  1088. lp->max_frame_retries = retries;
  1089. if (retries >= 0)
  1090. rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
  1091. return rc;
  1092. }
  1093. static int
  1094. at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
  1095. {
  1096. struct at86rf230_local *lp = hw->priv;
  1097. int rc;
  1098. if (on) {
  1099. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
  1100. if (rc < 0)
  1101. return rc;
  1102. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
  1103. if (rc < 0)
  1104. return rc;
  1105. } else {
  1106. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
  1107. if (rc < 0)
  1108. return rc;
  1109. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
  1110. if (rc < 0)
  1111. return rc;
  1112. }
  1113. return 0;
  1114. }
  1115. static const struct ieee802154_ops at86rf230_ops = {
  1116. .owner = THIS_MODULE,
  1117. .xmit_async = at86rf230_xmit,
  1118. .ed = at86rf230_ed,
  1119. .set_channel = at86rf230_channel,
  1120. .start = at86rf230_start,
  1121. .stop = at86rf230_stop,
  1122. .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
  1123. .set_txpower = at86rf230_set_txpower,
  1124. .set_lbt = at86rf230_set_lbt,
  1125. .set_cca_mode = at86rf230_set_cca_mode,
  1126. .set_cca_ed_level = at86rf230_set_cca_ed_level,
  1127. .set_csma_params = at86rf230_set_csma_params,
  1128. .set_frame_retries = at86rf230_set_frame_retries,
  1129. .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
  1130. };
  1131. static struct at86rf2xx_chip_data at86rf233_data = {
  1132. .t_sleep_cycle = 330,
  1133. .t_channel_switch = 11,
  1134. .t_reset_to_off = 26,
  1135. .t_off_to_aack = 80,
  1136. .t_off_to_tx_on = 80,
  1137. .t_off_to_sleep = 35,
  1138. .t_sleep_to_off = 210,
  1139. .t_frame = 4096,
  1140. .t_p_ack = 545,
  1141. .rssi_base_val = -91,
  1142. .set_channel = at86rf23x_set_channel,
  1143. .set_txpower = at86rf23x_set_txpower,
  1144. };
  1145. static struct at86rf2xx_chip_data at86rf231_data = {
  1146. .t_sleep_cycle = 330,
  1147. .t_channel_switch = 24,
  1148. .t_reset_to_off = 37,
  1149. .t_off_to_aack = 110,
  1150. .t_off_to_tx_on = 110,
  1151. .t_off_to_sleep = 35,
  1152. .t_sleep_to_off = 380,
  1153. .t_frame = 4096,
  1154. .t_p_ack = 545,
  1155. .rssi_base_val = -91,
  1156. .set_channel = at86rf23x_set_channel,
  1157. .set_txpower = at86rf23x_set_txpower,
  1158. };
  1159. static struct at86rf2xx_chip_data at86rf212_data = {
  1160. .t_sleep_cycle = 330,
  1161. .t_channel_switch = 11,
  1162. .t_reset_to_off = 26,
  1163. .t_off_to_aack = 200,
  1164. .t_off_to_tx_on = 200,
  1165. .t_off_to_sleep = 35,
  1166. .t_sleep_to_off = 380,
  1167. .t_frame = 4096,
  1168. .t_p_ack = 545,
  1169. .rssi_base_val = -100,
  1170. .set_channel = at86rf212_set_channel,
  1171. .set_txpower = at86rf212_set_txpower,
  1172. };
  1173. static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
  1174. {
  1175. int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
  1176. unsigned int dvdd;
  1177. u8 csma_seed[2];
  1178. rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  1179. if (rc)
  1180. return rc;
  1181. irq_type = irq_get_trigger_type(lp->spi->irq);
  1182. if (irq_type == IRQ_TYPE_EDGE_RISING ||
  1183. irq_type == IRQ_TYPE_EDGE_FALLING)
  1184. dev_warn(&lp->spi->dev,
  1185. "Using edge triggered irq's are not recommended!\n");
  1186. if (irq_type == IRQ_TYPE_EDGE_FALLING ||
  1187. irq_type == IRQ_TYPE_LEVEL_LOW)
  1188. irq_pol = IRQ_ACTIVE_LOW;
  1189. rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
  1190. if (rc)
  1191. return rc;
  1192. rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
  1193. if (rc)
  1194. return rc;
  1195. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
  1196. if (rc)
  1197. return rc;
  1198. /* reset values differs in at86rf231 and at86rf233 */
  1199. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
  1200. if (rc)
  1201. return rc;
  1202. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  1203. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  1204. if (rc)
  1205. return rc;
  1206. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  1207. if (rc)
  1208. return rc;
  1209. /* CLKM changes are applied immediately */
  1210. rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
  1211. if (rc)
  1212. return rc;
  1213. /* Turn CLKM Off */
  1214. rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
  1215. if (rc)
  1216. return rc;
  1217. /* Wait the next SLEEP cycle */
  1218. usleep_range(lp->data->t_sleep_cycle,
  1219. lp->data->t_sleep_cycle + 100);
  1220. /* xtal_trim value is calculated by:
  1221. * CL = 0.5 * (CX + CTRIM + CPAR)
  1222. *
  1223. * whereas:
  1224. * CL = capacitor of used crystal
  1225. * CX = connected capacitors at xtal pins
  1226. * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
  1227. * but this is different on each board setup. You need to fine
  1228. * tuning this value via CTRIM.
  1229. * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
  1230. * 0 pF upto 4.5 pF.
  1231. *
  1232. * Examples:
  1233. * atben transceiver:
  1234. *
  1235. * CL = 8 pF
  1236. * CX = 12 pF
  1237. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1238. * CTRIM = 0.9 pF
  1239. *
  1240. * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
  1241. *
  1242. * xtal_trim = 0x3
  1243. *
  1244. * openlabs transceiver:
  1245. *
  1246. * CL = 16 pF
  1247. * CX = 22 pF
  1248. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1249. * CTRIM = 4.5 pF
  1250. *
  1251. * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
  1252. *
  1253. * xtal_trim = 0xf
  1254. */
  1255. rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
  1256. if (rc)
  1257. return rc;
  1258. rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
  1259. if (rc)
  1260. return rc;
  1261. if (!dvdd) {
  1262. dev_err(&lp->spi->dev, "DVDD error\n");
  1263. return -EINVAL;
  1264. }
  1265. /* Force setting slotted operation bit to 0. Sometimes the atben
  1266. * sets this bit and I don't know why. We set this always force
  1267. * to zero while probing.
  1268. */
  1269. return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
  1270. }
  1271. static int
  1272. at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
  1273. u8 *xtal_trim)
  1274. {
  1275. struct at86rf230_platform_data *pdata = spi->dev.platform_data;
  1276. int ret;
  1277. if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
  1278. if (!pdata)
  1279. return -ENOENT;
  1280. *rstn = pdata->rstn;
  1281. *slp_tr = pdata->slp_tr;
  1282. *xtal_trim = pdata->xtal_trim;
  1283. return 0;
  1284. }
  1285. *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
  1286. *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
  1287. ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
  1288. if (ret < 0 && ret != -EINVAL)
  1289. return ret;
  1290. return 0;
  1291. }
  1292. static int
  1293. at86rf230_detect_device(struct at86rf230_local *lp)
  1294. {
  1295. unsigned int part, version, val;
  1296. u16 man_id = 0;
  1297. const char *chip;
  1298. int rc;
  1299. rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
  1300. if (rc)
  1301. return rc;
  1302. man_id |= val;
  1303. rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
  1304. if (rc)
  1305. return rc;
  1306. man_id |= (val << 8);
  1307. rc = __at86rf230_read(lp, RG_PART_NUM, &part);
  1308. if (rc)
  1309. return rc;
  1310. rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
  1311. if (rc)
  1312. return rc;
  1313. if (man_id != 0x001f) {
  1314. dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
  1315. man_id >> 8, man_id & 0xFF);
  1316. return -EINVAL;
  1317. }
  1318. lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
  1319. IEEE802154_HW_CSMA_PARAMS |
  1320. IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
  1321. IEEE802154_HW_PROMISCUOUS;
  1322. lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
  1323. WPAN_PHY_FLAG_CCA_ED_LEVEL |
  1324. WPAN_PHY_FLAG_CCA_MODE;
  1325. lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
  1326. BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
  1327. lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
  1328. BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
  1329. lp->hw->phy->supported.cca_ed_levels = at86rf23x_ed_levels;
  1330. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf23x_ed_levels);
  1331. lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
  1332. switch (part) {
  1333. case 2:
  1334. chip = "at86rf230";
  1335. rc = -ENOTSUPP;
  1336. goto not_supp;
  1337. case 3:
  1338. chip = "at86rf231";
  1339. lp->data = &at86rf231_data;
  1340. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1341. lp->hw->phy->current_channel = 11;
  1342. lp->hw->phy->symbol_duration = 16;
  1343. lp->hw->phy->supported.tx_powers = at86rf231_powers;
  1344. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
  1345. break;
  1346. case 7:
  1347. chip = "at86rf212";
  1348. lp->data = &at86rf212_data;
  1349. lp->hw->flags |= IEEE802154_HW_LBT;
  1350. lp->hw->phy->supported.channels[0] = 0x00007FF;
  1351. lp->hw->phy->supported.channels[2] = 0x00007FF;
  1352. lp->hw->phy->current_channel = 5;
  1353. lp->hw->phy->symbol_duration = 25;
  1354. lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
  1355. lp->hw->phy->supported.tx_powers = at86rf212_powers;
  1356. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
  1357. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  1358. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  1359. break;
  1360. case 11:
  1361. chip = "at86rf233";
  1362. lp->data = &at86rf233_data;
  1363. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1364. lp->hw->phy->current_channel = 13;
  1365. lp->hw->phy->symbol_duration = 16;
  1366. lp->hw->phy->supported.tx_powers = at86rf233_powers;
  1367. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
  1368. break;
  1369. default:
  1370. chip = "unknown";
  1371. rc = -ENOTSUPP;
  1372. goto not_supp;
  1373. }
  1374. lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
  1375. lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
  1376. not_supp:
  1377. dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
  1378. return rc;
  1379. }
  1380. static void
  1381. at86rf230_setup_spi_messages(struct at86rf230_local *lp)
  1382. {
  1383. lp->state.lp = lp;
  1384. lp->state.irq = lp->spi->irq;
  1385. spi_message_init(&lp->state.msg);
  1386. lp->state.msg.context = &lp->state;
  1387. lp->state.trx.len = 2;
  1388. lp->state.trx.tx_buf = lp->state.buf;
  1389. lp->state.trx.rx_buf = lp->state.buf;
  1390. spi_message_add_tail(&lp->state.trx, &lp->state.msg);
  1391. hrtimer_init(&lp->state.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  1392. lp->state.timer.function = at86rf230_async_state_timer;
  1393. lp->irq.lp = lp;
  1394. lp->irq.irq = lp->spi->irq;
  1395. spi_message_init(&lp->irq.msg);
  1396. lp->irq.msg.context = &lp->irq;
  1397. lp->irq.trx.len = 2;
  1398. lp->irq.trx.tx_buf = lp->irq.buf;
  1399. lp->irq.trx.rx_buf = lp->irq.buf;
  1400. spi_message_add_tail(&lp->irq.trx, &lp->irq.msg);
  1401. hrtimer_init(&lp->irq.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  1402. lp->irq.timer.function = at86rf230_async_state_timer;
  1403. lp->tx.lp = lp;
  1404. lp->tx.irq = lp->spi->irq;
  1405. spi_message_init(&lp->tx.msg);
  1406. lp->tx.msg.context = &lp->tx;
  1407. lp->tx.trx.len = 2;
  1408. lp->tx.trx.tx_buf = lp->tx.buf;
  1409. lp->tx.trx.rx_buf = lp->tx.buf;
  1410. spi_message_add_tail(&lp->tx.trx, &lp->tx.msg);
  1411. hrtimer_init(&lp->tx.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  1412. lp->tx.timer.function = at86rf230_async_state_timer;
  1413. }
  1414. static int at86rf230_probe(struct spi_device *spi)
  1415. {
  1416. struct ieee802154_hw *hw;
  1417. struct at86rf230_local *lp;
  1418. unsigned int status;
  1419. int rc, irq_type, rstn, slp_tr;
  1420. u8 xtal_trim = 0;
  1421. if (!spi->irq) {
  1422. dev_err(&spi->dev, "no IRQ specified\n");
  1423. return -EINVAL;
  1424. }
  1425. rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
  1426. if (rc < 0) {
  1427. dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
  1428. return rc;
  1429. }
  1430. if (gpio_is_valid(rstn)) {
  1431. rc = devm_gpio_request_one(&spi->dev, rstn,
  1432. GPIOF_OUT_INIT_HIGH, "rstn");
  1433. if (rc)
  1434. return rc;
  1435. }
  1436. if (gpio_is_valid(slp_tr)) {
  1437. rc = devm_gpio_request_one(&spi->dev, slp_tr,
  1438. GPIOF_OUT_INIT_LOW, "slp_tr");
  1439. if (rc)
  1440. return rc;
  1441. }
  1442. /* Reset */
  1443. if (gpio_is_valid(rstn)) {
  1444. udelay(1);
  1445. gpio_set_value(rstn, 0);
  1446. udelay(1);
  1447. gpio_set_value(rstn, 1);
  1448. usleep_range(120, 240);
  1449. }
  1450. hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
  1451. if (!hw)
  1452. return -ENOMEM;
  1453. lp = hw->priv;
  1454. lp->hw = hw;
  1455. lp->spi = spi;
  1456. lp->slp_tr = slp_tr;
  1457. hw->parent = &spi->dev;
  1458. ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
  1459. lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
  1460. if (IS_ERR(lp->regmap)) {
  1461. rc = PTR_ERR(lp->regmap);
  1462. dev_err(&spi->dev, "Failed to allocate register map: %d\n",
  1463. rc);
  1464. goto free_dev;
  1465. }
  1466. at86rf230_setup_spi_messages(lp);
  1467. rc = at86rf230_detect_device(lp);
  1468. if (rc < 0)
  1469. goto free_dev;
  1470. init_completion(&lp->state_complete);
  1471. spi_set_drvdata(spi, lp);
  1472. rc = at86rf230_hw_init(lp, xtal_trim);
  1473. if (rc)
  1474. goto free_dev;
  1475. /* Read irq status register to reset irq line */
  1476. rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
  1477. if (rc)
  1478. goto free_dev;
  1479. irq_type = irq_get_trigger_type(spi->irq);
  1480. if (!irq_type)
  1481. irq_type = IRQF_TRIGGER_HIGH;
  1482. rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
  1483. IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
  1484. if (rc)
  1485. goto free_dev;
  1486. /* disable_irq by default and wait for starting hardware */
  1487. disable_irq(spi->irq);
  1488. /* going into sleep by default */
  1489. at86rf230_sleep(lp);
  1490. rc = ieee802154_register_hw(lp->hw);
  1491. if (rc)
  1492. goto free_dev;
  1493. return rc;
  1494. free_dev:
  1495. ieee802154_free_hw(lp->hw);
  1496. return rc;
  1497. }
  1498. static int at86rf230_remove(struct spi_device *spi)
  1499. {
  1500. struct at86rf230_local *lp = spi_get_drvdata(spi);
  1501. /* mask all at86rf230 irq's */
  1502. at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
  1503. ieee802154_unregister_hw(lp->hw);
  1504. ieee802154_free_hw(lp->hw);
  1505. dev_dbg(&spi->dev, "unregistered at86rf230\n");
  1506. return 0;
  1507. }
  1508. static const struct of_device_id at86rf230_of_match[] = {
  1509. { .compatible = "atmel,at86rf230", },
  1510. { .compatible = "atmel,at86rf231", },
  1511. { .compatible = "atmel,at86rf233", },
  1512. { .compatible = "atmel,at86rf212", },
  1513. { },
  1514. };
  1515. MODULE_DEVICE_TABLE(of, at86rf230_of_match);
  1516. static const struct spi_device_id at86rf230_device_id[] = {
  1517. { .name = "at86rf230", },
  1518. { .name = "at86rf231", },
  1519. { .name = "at86rf233", },
  1520. { .name = "at86rf212", },
  1521. { },
  1522. };
  1523. MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
  1524. static struct spi_driver at86rf230_driver = {
  1525. .id_table = at86rf230_device_id,
  1526. .driver = {
  1527. .of_match_table = of_match_ptr(at86rf230_of_match),
  1528. .name = "at86rf230",
  1529. .owner = THIS_MODULE,
  1530. },
  1531. .probe = at86rf230_probe,
  1532. .remove = at86rf230_remove,
  1533. };
  1534. module_spi_driver(at86rf230_driver);
  1535. MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
  1536. MODULE_LICENSE("GPL v2");