__remq.S 4.0 KB

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  1. /* $OpenBSD: __remq.S,v 1.1 2007/11/25 18:25:34 deraadt Exp $ */
  2. /* $NetBSD: divrem.m4,v 1.5 1996/10/17 04:26:25 cgd Exp $ */
  3. /*
  4. * Copyright (c) 1994, 1995 Carnegie-Mellon University.
  5. * All rights reserved.
  6. *
  7. * Author: Chris G. Demetriou
  8. *
  9. * Permission to use, copy, modify and distribute this software and
  10. * its documentation is hereby granted, provided that both the copyright
  11. * notice and this permission notice appear in all copies of the
  12. * software, derivative works or modified versions, and any portions
  13. * thereof, and that both notices appear in supporting documentation.
  14. *
  15. * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  16. * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  17. * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  18. *
  19. * Carnegie Mellon requests users of this software to return to
  20. *
  21. * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
  22. * School of Computer Science
  23. * Carnegie Mellon University
  24. * Pittsburgh PA 15213-3890
  25. *
  26. * any improvements or extensions that they make and grant Carnegie the
  27. * rights to redistribute these changes.
  28. */
  29. /*
  30. * Division and remainder.
  31. *
  32. * The use of m4 is modeled after the sparc code, but the algorithm is
  33. * simple binary long division.
  34. *
  35. * Note that the loops could probably benefit from unrolling.
  36. */
  37. /*
  38. * M4 Parameters
  39. * __remq name of function to generate
  40. * rem rem=div: t10 / t11 -> t12; rem=rem: t10 % t11 -> t12
  41. * true true=true: signed; true=false: unsigned
  42. * 64 total number of bits
  43. */
  44. #include <machine/asm.h>
  45. LEAF(__remq, 0) /* XXX */
  46. lda sp, -64(sp)
  47. stq t0, 0(sp)
  48. stq t1, 8(sp)
  49. stq t2, 16(sp)
  50. stq t3, 24(sp)
  51. stq t4, 32(sp)
  52. stq t10, 40(sp)
  53. stq t11, 48(sp)
  54. mov zero, t12 /* Initialize result to zero */
  55. /* Compute sign of result. If either is negative, this is easy. */
  56. or t10, t11, t4 /* not the sign, but... */
  57. srl t4, 64 - 1, t4 /* rather, or of high bits */
  58. blbc t4, Ldoit /* neither negative? do it! */
  59. mov t10, t4 /* sign follows t10. */
  60. srl t4, 64 - 1, t4 /* make negation the low bit. */
  61. srl t10, 64 - 1, t1 /* is t10 negative? */
  62. blbc t1, LnegB /* no. */
  63. /* t10 is negative; flip it. */
  64. subq zero, t10, t10
  65. srl t11, 64 - 1, t1 /* is t11 negative? */
  66. blbc t1, Ldoit /* no. */
  67. LnegB:
  68. /* t11 is definitely negative, no matter how we got here. */
  69. subq zero, t11, t11
  70. Ldoit:
  71. /* kill the special cases. */
  72. beq t11, Ldotrap /* division by zero! */
  73. cmpult t10, t11, t2 /* t10 < t11? */
  74. /* t12 is already zero, from above. t10 is untouched. */
  75. bne t2, Lret_result
  76. cmpeq t10, t11, t2 /* t10 == t11? */
  77. cmovne t2, 1, t12
  78. cmovne t2, zero, t10
  79. bne t2, Lret_result
  80. /*
  81. * Find out how many bits of zeros are at the beginning of the divisor.
  82. */
  83. LBbits:
  84. ldiq t3, 1 /* t1 = 0; t0 = 1<<64-1 */
  85. mov zero, t1
  86. sll t3, 64-1, t0
  87. LBloop:
  88. and t11, t0, t2 /* if bit in t11 is set, done. */
  89. bne t2, LAbits
  90. addq t1, 1, t1 /* increment t1, bit */
  91. srl t0, 1, t0
  92. cmplt t1, 64-1, t2 /* if t1 leaves one bit, done. */
  93. bne t2, LBloop
  94. LAbits:
  95. beq t1, Ldodiv /* If t1 = 0, divide now. */
  96. ldiq t3, 1 /* t0 = 1<<64-1 */
  97. sll t3, 64-1, t0
  98. LAloop:
  99. and t10, t0, t2 /* if bit in t10 is set, done. */
  100. bne t2, Ldodiv
  101. subq t1, 1, t1 /* decrement t1, bit */
  102. srl t0, 1, t0
  103. bne t1, LAloop /* If t1 != 0, loop again */
  104. Ldodiv:
  105. sll t11, t1, t11 /* t11 <<= i */
  106. ldiq t3, 1
  107. sll t3, t1, t0
  108. Ldivloop:
  109. cmpult t10, t11, t2
  110. or t12, t0, t3
  111. cmoveq t2, t3, t12
  112. subq t10, t11, t3
  113. cmoveq t2, t3, t10
  114. srl t0, 1, t0
  115. srl t11, 1, t11
  116. beq t10, Lret_result
  117. bne t0, Ldivloop
  118. Lret_result:
  119. mov t10, t12
  120. /* Check to see if we should negate it. */
  121. subqv zero, t12, t3
  122. cmovlbs t4, t3, t12
  123. ldq t0, 0(sp)
  124. ldq t1, 8(sp)
  125. ldq t2, 16(sp)
  126. ldq t3, 24(sp)
  127. ldq t4, 32(sp)
  128. ldq t10, 40(sp)
  129. ldq t11, 48(sp)
  130. lda sp, 64(sp)
  131. ret zero, (t9), 1
  132. Ldotrap:
  133. ldiq a0, -2 /* This is the signal to SIGFPE! */
  134. call_pal PAL_gentrap
  135. mov zero, t10 /* so that zero will be returned */
  136. br zero, Lret_result
  137. END(__remq)