zxreg.h 8.3 KB

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  1. /* $OpenBSD: zxreg.h,v 1.2 2008/06/26 05:42:18 ray Exp $ */
  2. /* $NetBSD: zxreg.h,v 1.1 2002/09/13 14:03:53 ad Exp $ */
  3. /*
  4. * Copyright (c) 2002 The NetBSD Foundation, Inc.
  5. * All rights reserved.
  6. *
  7. * This code is derived from software contributed to The NetBSD Foundation
  8. * by Andrew Doran.
  9. *
  10. * Redistribution and use in source and binary forms, with or without
  11. * modification, are permitted provided that the following conditions
  12. * are met:
  13. * 1. Redistributions of source code must retain the above copyright
  14. * notice, this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright
  16. * notice, this list of conditions and the following disclaimer in the
  17. * documentation and/or other materials provided with the distribution.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21. * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27. * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29. * POSSIBILITY OF SUCH DAMAGE.
  30. */
  31. /*
  32. * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com)
  33. *
  34. * Permission is hereby granted, free of charge, to any person obtaining a copy
  35. * of this software and associated documentation files (the "Software"), to deal
  36. * in the Software without restriction, including without limitation the rights
  37. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  38. * copies of the Software, and to permit persons to whom the Software is
  39. * furnished to do so, subject to the following conditions:
  40. *
  41. * The above copyright notice and this permission notice shall be included in
  42. * all copies or substantial portions of the Software.
  43. *
  44. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  45. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  46. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  47. * JAKUB JELINEK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  48. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  49. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  50. *
  51. */
  52. #ifndef _DEV_SBUS_ZXREG_H_
  53. #define _DEV_SBUS_ZXREG_H_
  54. /* Hardware offsets. */
  55. #define ZX_OFF_UNK2 0x00000000
  56. #define ZX_OFF_LC_SS0_KRN 0x00200000
  57. #define ZX_OFF_LC_SS0_USR 0x00201000
  58. #define ZX_OFF_LD_SS0 0x00400000
  59. #define ZX_OFF_LD_GBL 0x00401000
  60. #define ZX_OFF_LX_CROSS 0x00600000
  61. #define ZX_OFF_LX_CURSOR 0x00601000
  62. #define ZX_OFF_UNK 0x00602000
  63. #define ZX_OFF_SS0 0x00800000
  64. #define ZX_OFF_LC_SS1_KRN 0x01200000
  65. #define ZX_OFF_LC_SS1_USR 0x01201000
  66. #define ZX_OFF_LD_SS1 0x01400000
  67. #define ZX_OFF_SS1 0x01800000
  68. /* ROP register */
  69. #define ZX_ATTR_PICK_DISABLE 0x00000000
  70. #define ZX_ATTR_PICK_2D 0x80000000
  71. #define ZX_ATTR_PICK_3D 0xa0000000
  72. #define ZX_ATTR_PICK_2D_REND 0xc0000000
  73. #define ZX_ATTR_PICK_3D_REND 0xe0000000
  74. #define ZX_ATTR_DCE_DISABLE 0x00000000
  75. #define ZX_ATTR_DCE_ENABLE 0x10000000
  76. #define ZX_ATTR_APE_DISABLE 0x00000000
  77. #define ZX_ATTR_APE_ENABLE 0x08000000
  78. #define ZX_ATTR_COLOR_VAR 0x00000000
  79. #define ZX_ATTR_COLOR_CONST 0x04000000
  80. #define ZX_ATTR_AA_DISABLE 0x02000000
  81. #define ZX_ATTR_AA_ENABLE 0x01000000
  82. #define ZX_ATTR_ABE_BG 0x00000000 /* dst + alpha * (src - bg) */
  83. #define ZX_ATTR_ABE_FB 0x00800000 /* dst + alpha * (src - dst) */
  84. #define ZX_ATTR_ABE_DISABLE 0x00000000
  85. #define ZX_ATTR_ABE_ENABLE 0x00400000
  86. #define ZX_ATTR_BLTSRC_A 0x00000000
  87. #define ZX_ATTR_BLTSRC_B 0x00200000
  88. #define ZX_ROP_ZERO (0x0 << 18)
  89. #define ZX_ROP_NEW_AND_OLD (0x8 << 18)
  90. #define ZX_ROP_NEW_AND_NOLD (0x4 << 18)
  91. #define ZX_ROP_NEW (0xc << 18)
  92. #define ZX_ROP_NNEW_AND_OLD (0x2 << 18)
  93. #define ZX_ROP_OLD (0xa << 18)
  94. #define ZX_ROP_NEW_XOR_OLD (0x6 << 18)
  95. #define ZX_ROP_NEW_OR_OLD (0xe << 18)
  96. #define ZX_ROP_NNEW_AND_NOLD (0x1 << 18)
  97. #define ZX_ROP_NNEW_XOR_NOLD (0x9 << 18)
  98. #define ZX_ROP_NOLD (0x5 << 18)
  99. #define ZX_ROP_NEW_OR_NOLD (0xd << 18)
  100. #define ZX_ROP_NNEW (0x3 << 18)
  101. #define ZX_ROP_NNEW_OR_OLD (0xb << 18)
  102. #define ZX_ROP_NNEW_OR_NOLD (0x7 << 18)
  103. #define ZX_ROP_ONES (0xf << 18)
  104. #define ZX_ATTR_HSR_DISABLE 0x00000000
  105. #define ZX_ATTR_HSR_ENABLE 0x00020000
  106. #define ZX_ATTR_WRITEZ_DISABLE 0x00000000
  107. #define ZX_ATTR_WRITEZ_ENABLE 0x00010000
  108. #define ZX_ATTR_Z_VAR 0x00000000
  109. #define ZX_ATTR_Z_CONST 0x00008000
  110. #define ZX_ATTR_WCLIP_DISABLE 0x00000000
  111. #define ZX_ATTR_WCLIP_ENABLE 0x00004000
  112. #define ZX_ATTR_MONO 0x00000000
  113. #define ZX_ATTR_STEREO_LEFT 0x00001000
  114. #define ZX_ATTR_STEREO_RIGHT 0x00003000
  115. #define ZX_ATTR_WE_DISABLE 0x00000000
  116. #define ZX_ATTR_WE_ENABLE 0x00000800
  117. #define ZX_ATTR_FCE_DISABLE 0x00000000
  118. #define ZX_ATTR_FCE_ENABLE 0x00000400
  119. #define ZX_ATTR_RE_DISABLE 0x00000000
  120. #define ZX_ATTR_RE_ENABLE 0x00000200
  121. #define ZX_ATTR_GE_DISABLE 0x00000000
  122. #define ZX_ATTR_GE_ENABLE 0x00000100
  123. #define ZX_ATTR_BE_DISABLE 0x00000000
  124. #define ZX_ATTR_BE_ENABLE 0x00000080
  125. #define ZX_ATTR_RGBE_DISABLE 0x00000000
  126. #define ZX_ATTR_RGBE_ENABLE 0x00000380
  127. #define ZX_ATTR_OE_DISABLE 0x00000000
  128. #define ZX_ATTR_OE_ENABLE 0x00000040
  129. #define ZX_ATTR_ZE_DISABLE 0x00000000
  130. #define ZX_ATTR_ZE_ENABLE 0x00000020
  131. #define ZX_ATTR_FORCE_WID 0x00000010
  132. #define ZX_ATTR_FC_PLANE_MASK 0x0000000e
  133. #define ZX_ATTR_BUFFER_A 0x00000000
  134. #define ZX_ATTR_BUFFER_B 0x00000001
  135. /* CSR */
  136. #define ZX_CSR_BLT_BUSY 0x20000000
  137. struct zx_draw {
  138. u_int32_t zd_pad0[896];
  139. u_int32_t zd_csr;
  140. u_int32_t zd_wid;
  141. u_int32_t zd_wmask;
  142. u_int32_t zd_widclip;
  143. u_int32_t zd_vclipmin;
  144. u_int32_t zd_vclipmax;
  145. u_int32_t zd_pickmin; /* SS1 only */
  146. u_int32_t zd_pickmax; /* SS1 only */
  147. u_int32_t zd_fg;
  148. u_int32_t zd_bg;
  149. u_int32_t zd_src; /* Copy/Scroll (SS0 only) */
  150. u_int32_t zd_dst; /* Copy/Scroll/Fill (SS0 only) */
  151. u_int32_t zd_extent; /* Copy/Scroll/Fill size (SS0 only) */
  152. u_int32_t zd_pad1[3];
  153. u_int32_t zd_setsem; /* SS1 only */
  154. u_int32_t zd_clrsem; /* SS1 only */
  155. u_int32_t zd_clrpick; /* SS1 only */
  156. u_int32_t zd_clrdat; /* SS1 only */
  157. u_int32_t zd_alpha; /* SS1 only */
  158. u_int32_t zd_pad2[11];
  159. u_int32_t zd_winbg;
  160. u_int32_t zd_planemask;
  161. u_int32_t zd_rop;
  162. u_int32_t zd_z;
  163. u_int32_t zd_dczf; /* SS1 only */
  164. u_int32_t zd_dczb; /* SS1 only */
  165. u_int32_t zd_dcs; /* SS1 only */
  166. u_int32_t zd_dczs; /* SS1 only */
  167. u_int32_t zd_pickfb; /* SS1 only */
  168. u_int32_t zd_pickbb; /* SS1 only */
  169. u_int32_t zd_dcfc; /* SS1 only */
  170. u_int32_t zd_forcecol; /* SS1 only */
  171. u_int32_t zd_door[8]; /* SS1 only */
  172. u_int32_t zd_pick[5]; /* SS1 only */
  173. };
  174. /* EXTENT */
  175. #define ZX_EXTENT_DIR_FORWARDS 0x00000000
  176. #define ZX_EXTENT_DIR_BACKWARDS 0x80000000
  177. struct zx_draw_ss1 {
  178. u_int32_t zd_pad0[957];
  179. u_int32_t zd_misc;
  180. };
  181. #define ZX_SS1_MISC_ENABLE 0x00000001
  182. #define ZX_SS1_MISC_STEREO 0x00000002
  183. #define ZX_ADDRSPC_OBGR 0x00
  184. #define ZX_ADDRSPC_Z 0x01
  185. #define ZX_ADDRSPC_W 0x02
  186. #define ZX_ADDRSPC_FONT_OBGR 0x04
  187. #define ZX_ADDRSPC_FONT_Z 0x05
  188. #define ZX_ADDRSPC_FONT_W 0x06
  189. #define ZX_ADDRSPC_O 0x08
  190. #define ZX_ADDRSPC_B 0x09
  191. #define ZX_ADDRSPC_G 0x0a
  192. #define ZX_ADDRSPC_R 0x0b
  193. struct zx_command {
  194. u_int32_t zc_csr;
  195. u_int32_t zc_addrspace;
  196. u_int32_t zc_fontmsk;
  197. u_int32_t zc_fontt;
  198. u_int32_t zc_extent;
  199. u_int32_t zc_src;
  200. u_int32_t zc_dst;
  201. u_int32_t zc_copy;
  202. u_int32_t zc_fill;
  203. };
  204. #define ZX_CROSS_TYPE_CLUT0 0x00001000
  205. #define ZX_CROSS_TYPE_CLUT1 0x00001001
  206. #define ZX_CROSS_TYPE_CLUT2 0x00001002
  207. #define ZX_CROSS_TYPE_WID 0x00001003
  208. #define ZX_CROSS_TYPE_UNK 0x00001006
  209. #define ZX_CROSS_TYPE_VIDEO 0x00002003
  210. #define ZX_CROSS_TYPE_CLUTDATA 0x00004000
  211. #define ZX_CROSS_CSR_ENABLE 0x00000008
  212. #define ZX_CROSS_CSR_PROGRESS 0x00000004
  213. #define ZX_CROSS_CSR_UNK 0x00000002
  214. #define ZX_CROSS_CSR_UNK2 0x00000001
  215. struct zx_cross {
  216. u_int32_t zx_type;
  217. u_int32_t zx_csr;
  218. u_int32_t zx_value;
  219. };
  220. struct zx_cursor {
  221. u_int32_t zcu_pad0[4];
  222. u_int32_t zcu_type;
  223. u_int32_t zcu_misc;
  224. u_int32_t zcu_sxy;
  225. u_int32_t zcu_data;
  226. };
  227. #endif /* !_DEV_SBUS_ZXREG_H_ */