qecvar.h 2.8 KB

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  1. /* $OpenBSD: qecvar.h,v 1.4 2008/06/26 05:42:18 ray Exp $ */
  2. /* $NetBSD: qecvar.h,v 1.4 1999/01/17 20:47:50 pk Exp $ */
  3. /*-
  4. * Copyright (c) 1998 The NetBSD Foundation, Inc.
  5. * All rights reserved.
  6. *
  7. * This code is derived from software contributed to The NetBSD Foundation
  8. * by Paul Kranenburg.
  9. *
  10. * Redistribution and use in source and binary forms, with or without
  11. * modification, are permitted provided that the following conditions
  12. * are met:
  13. * 1. Redistributions of source code must retain the above copyright
  14. * notice, this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright
  16. * notice, this list of conditions and the following disclaimer in the
  17. * documentation and/or other materials provided with the distribution.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21. * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27. * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29. * POSSIBILITY OF SUCH DAMAGE.
  30. */
  31. struct qec_softc {
  32. struct device sc_dev; /* us as a device */
  33. bus_space_tag_t sc_bustag; /* bus & dma tags */
  34. bus_dma_tag_t sc_dmatag;
  35. struct sbus_range *sc_range; /* PROM ranges */
  36. int sc_nrange; /* */
  37. struct sbus_intr *sc_intr; /* interrupt info */
  38. bus_space_handle_t sc_regs; /* QEC registers */
  39. int sc_nchannels; /* # of channels on board */
  40. int sc_burst; /* DVMA burst size in effect */
  41. caddr_t sc_buffer; /* VA of the buffer we provide */
  42. int sc_bufsiz; /* Size of buffer */
  43. u_int sc_msize; /* QEC buffer offset per channel */
  44. u_int sc_rsize; /* QEC buffer size for receive */
  45. };
  46. struct qec_ring {
  47. /* Ring Descriptors */
  48. caddr_t rb_membase; /* Packet buffer: CPU address */
  49. bus_addr_t rb_dmabase; /* Packet buffer: DMA address */
  50. struct qec_xd *rb_txd; /* Transmit descriptors */
  51. bus_addr_t rb_txddma; /* DMA address of same */
  52. struct qec_xd *rb_rxd; /* Receive descriptors */
  53. bus_addr_t rb_rxddma; /* DMA address of same */
  54. caddr_t rb_txbuf; /* Transmit buffers */
  55. caddr_t rb_rxbuf; /* Receive buffers */
  56. int rb_ntbuf; /* # of transmit buffers */
  57. int rb_nrbuf; /* # of receive buffers */
  58. /* Ring Descriptor state */
  59. int rb_tdhead, rb_tdtail;
  60. int rb_rdtail;
  61. int rb_td_nbusy;
  62. };
  63. void qec_meminit(struct qec_ring *, unsigned int);