ata_wdc.c 24 KB

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  1. /* $OpenBSD: ata_wdc.c,v 1.49 2015/04/04 13:03:44 mpi Exp $ */
  2. /* $NetBSD: ata_wdc.c,v 1.21 1999/08/09 09:43:11 bouyer Exp $ */
  3. /*
  4. * Copyright (c) 1998, 2001 Manuel Bouyer.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. * 1. Redistributions of source code must retain the above copyright
  10. * notice, this list of conditions and the following disclaimer.
  11. * 2. Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the distribution.
  14. *
  15. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16. * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. *
  26. */
  27. /*-
  28. * Copyright (c) 1998 The NetBSD Foundation, Inc.
  29. * All rights reserved.
  30. *
  31. * This code is derived from software contributed to The NetBSD Foundation
  32. * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer.
  33. *
  34. * Redistribution and use in source and binary forms, with or without
  35. * modification, are permitted provided that the following conditions
  36. * are met:
  37. * 1. Redistributions of source code must retain the above copyright
  38. * notice, this list of conditions and the following disclaimer.
  39. * 2. Redistributions in binary form must reproduce the above copyright
  40. * notice, this list of conditions and the following disclaimer in the
  41. * documentation and/or other materials provided with the distribution.
  42. *
  43. * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  44. * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  45. * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  46. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  47. * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  48. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  49. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  50. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  51. * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  52. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  53. * POSSIBILITY OF SUCH DAMAGE.
  54. */
  55. #include <sys/param.h>
  56. #include <sys/systm.h>
  57. #include <sys/kernel.h>
  58. #include <sys/file.h>
  59. #include <sys/stat.h>
  60. #include <sys/buf.h>
  61. #include <sys/malloc.h>
  62. #include <sys/device.h>
  63. #include <sys/disklabel.h>
  64. #include <sys/disk.h>
  65. #include <sys/syslog.h>
  66. #include <machine/intr.h>
  67. #include <machine/bus.h>
  68. #include <dev/ata/atavar.h>
  69. #include <dev/ic/wdcreg.h>
  70. #include <dev/ic/wdcvar.h>
  71. #include <dev/ata/wdvar.h>
  72. #ifdef HIBERNATE
  73. #include <sys/hibernate.h>
  74. #endif
  75. #define DEBUG_INTR 0x01
  76. #define DEBUG_XFERS 0x02
  77. #define DEBUG_STATUS 0x04
  78. #define DEBUG_FUNCS 0x08
  79. #define DEBUG_PROBE 0x10
  80. #ifdef WDCDEBUG
  81. #ifndef WDCDEBUG_WD_MASK
  82. #define WDCDEBUG_WD_MASK 0x00
  83. #endif
  84. int wdcdebug_wd_mask = WDCDEBUG_WD_MASK;
  85. #define WDCDEBUG_PRINT(args, level) do { \
  86. if ((wdcdebug_wd_mask & (level)) != 0) \
  87. printf args; \
  88. } while (0)
  89. #else
  90. #define WDCDEBUG_PRINT(args, level)
  91. #endif
  92. #define ATA_DELAY 45000 /* 45s for a drive I/O */
  93. void wdc_ata_bio_start(struct channel_softc *, struct wdc_xfer *);
  94. void _wdc_ata_bio_start(struct channel_softc *, struct wdc_xfer *);
  95. int wdc_ata_bio_intr(struct channel_softc *, struct wdc_xfer *, int);
  96. void wdc_ata_bio_kill_xfer(struct channel_softc *, struct wdc_xfer *);
  97. void wdc_ata_bio_done(struct channel_softc *, struct wdc_xfer *);
  98. int wdc_ata_ctrl_intr(struct channel_softc *, struct wdc_xfer *, int);
  99. int wdc_ata_err(struct ata_drive_datas *, struct ata_bio *);
  100. #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */
  101. #define WDC_ATA_RECOV 0x01 /* There was a recovered error */
  102. #define WDC_ATA_ERR 0x02 /* Drive reports an error */
  103. #ifdef HIBERNATE
  104. int
  105. wd_hibernate_io(dev_t dev, daddr_t blkno, vaddr_t addr, size_t size, int op, void *page)
  106. {
  107. struct {
  108. struct wd_softc wd;
  109. struct wdc_xfer xfer;
  110. struct channel_softc chp;
  111. daddr_t poffset;
  112. size_t psize;
  113. } *my = page;
  114. struct wd_softc *real_wd, *wd = &my->wd;
  115. struct wdc_xfer *xfer = &my->xfer;
  116. struct channel_softc *chp = &my->chp;
  117. struct ata_bio *ata_bio;
  118. extern struct cfdriver wd_cd;
  119. /* early call for initialization */
  120. if (op == HIB_INIT) {
  121. my->poffset = blkno;
  122. my->psize = size;
  123. return(0);
  124. }
  125. real_wd = (struct wd_softc *)disk_lookup(&wd_cd, DISKUNIT(dev));
  126. if (real_wd == NULL)
  127. return (ENODEV);
  128. if (op == HIB_DONE) {
  129. struct wdc_softc *wdc = chp->wdc;
  130. config_suspend(&wdc->sc_dev, DVACT_RESUME);
  131. return (0);
  132. }
  133. if (blkno > my->psize)
  134. return (E2BIG);
  135. blkno += my->poffset;
  136. /*
  137. * Craft a fake set of softc and related structures
  138. * which we think the driver modifies. Some of these will
  139. * have pointers which reach to unsafe places, but..
  140. */
  141. bcopy(real_wd->drvp->chnl_softc, &my->chp, sizeof my->chp);
  142. chp->ch_drive[0].chnl_softc = chp;
  143. chp->ch_drive[1].chnl_softc = chp;
  144. bcopy(real_wd, &my->wd, sizeof my->wd);
  145. ata_bio = &wd->sc_wdc_bio;
  146. ata_bio->wd = wd; /* fixup ata_bio->wd */
  147. wd->drvp = &chp->ch_drive[real_wd->drvp->drive];
  148. /* Fill the request and submit it */
  149. wd->sc_wdc_bio.blkno = blkno;
  150. wd->sc_wdc_bio.flags = ATA_POLL | ATA_LBA48;
  151. if (op == HIB_R)
  152. wd->sc_wdc_bio.flags |= ATA_READ;
  153. wd->sc_wdc_bio.bcount = size;
  154. wd->sc_wdc_bio.databuf = (caddr_t)addr;
  155. wd->sc_wdc_bio.wd = wd;
  156. bzero(&my->xfer, sizeof my->xfer);
  157. xfer->c_flags |= C_PRIVATEXFER; /* Our xfer is totally private */
  158. xfer->c_flags |= C_POLL;
  159. xfer->drive = wd->drvp->drive;
  160. xfer->cmd = ata_bio;
  161. xfer->databuf = ata_bio->databuf;
  162. xfer->c_bcount = ata_bio->bcount;
  163. xfer->c_start = wdc_ata_bio_start;
  164. xfer->c_intr = wdc_ata_bio_intr;
  165. xfer->c_kill_xfer = wdc_ata_bio_kill_xfer;
  166. wdc_exec_xfer(chp, xfer);
  167. return (ata_bio->flags & ATA_ITSDONE) ? 0 : EIO;
  168. }
  169. #endif /* HIBERNATE */
  170. /*
  171. * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or
  172. * WDC_TRY_AGAIN. Must be called at splbio().
  173. */
  174. int
  175. wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio)
  176. {
  177. struct wdc_xfer *xfer;
  178. struct channel_softc *chp = drvp->chnl_softc;
  179. xfer = wdc_get_xfer(WDC_NOSLEEP);
  180. if (xfer == NULL)
  181. return WDC_TRY_AGAIN;
  182. if (ata_bio->flags & ATA_POLL)
  183. xfer->c_flags |= C_POLL;
  184. if (!(ata_bio->flags & ATA_POLL) &&
  185. (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
  186. (ata_bio->flags & ATA_SINGLE) == 0 &&
  187. (ata_bio->bcount > 512 ||
  188. (chp->wdc->quirks & WDC_QUIRK_NOSHORTDMA) == 0))
  189. xfer->c_flags |= C_DMA;
  190. xfer->drive = drvp->drive;
  191. xfer->cmd = ata_bio;
  192. xfer->databuf = ata_bio->databuf;
  193. xfer->c_bcount = ata_bio->bcount;
  194. xfer->c_start = wdc_ata_bio_start;
  195. xfer->c_intr = wdc_ata_bio_intr;
  196. xfer->c_kill_xfer = wdc_ata_bio_kill_xfer;
  197. wdc_exec_xfer(chp, xfer);
  198. return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED;
  199. }
  200. void
  201. wdc_ata_bio_start(struct channel_softc *chp, struct wdc_xfer *xfer)
  202. {
  203. struct ata_bio *ata_bio = xfer->cmd;
  204. WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n",
  205. chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
  206. DEBUG_XFERS);
  207. /* start timeout machinery */
  208. if ((ata_bio->flags & ATA_POLL) == 0)
  209. timeout_add_msec(&chp->ch_timo, ATA_DELAY);
  210. _wdc_ata_bio_start(chp, xfer);
  211. }
  212. void
  213. _wdc_ata_bio_start(struct channel_softc *chp, struct wdc_xfer *xfer)
  214. {
  215. struct ata_bio *ata_bio = xfer->cmd;
  216. struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
  217. u_int16_t cyl;
  218. u_int8_t head, sect, cmd = 0;
  219. int nblks;
  220. int ata_delay;
  221. int error, dma_flags = 0;
  222. WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n",
  223. chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
  224. DEBUG_INTR | DEBUG_XFERS);
  225. /* Do control operations specially. */
  226. if (drvp->state < READY) {
  227. /*
  228. * Actually, we want to be careful not to mess with the control
  229. * state if the device is currently busy, but we can assume
  230. * that we never get to this point if that's the case.
  231. */
  232. /* at this point, we should only be in RECAL state */
  233. if (drvp->state != RECAL) {
  234. printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n",
  235. chp->wdc->sc_dev.dv_xname, chp->channel,
  236. xfer->drive, drvp->state);
  237. panic("_wdc_ata_bio_start: bad state");
  238. }
  239. xfer->c_intr = wdc_ata_ctrl_intr;
  240. wdc_set_drive(chp, xfer->drive);
  241. if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0)
  242. goto timeout;
  243. wdccommandshort(chp, xfer->drive, WDCC_RECAL);
  244. drvp->state = RECAL_WAIT;
  245. if ((ata_bio->flags & ATA_POLL) == 0) {
  246. chp->ch_flags |= WDCF_IRQ_WAIT;
  247. } else {
  248. /* Wait for at last 400ns for status bit to be valid */
  249. DELAY(1);
  250. wdc_ata_ctrl_intr(chp, xfer, 0);
  251. }
  252. return;
  253. }
  254. if (xfer->c_flags & C_DMA) {
  255. if (drvp->n_xfers <= NXFER)
  256. drvp->n_xfers++;
  257. dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0;
  258. if (ata_bio->flags & ATA_LBA48)
  259. dma_flags |= WDC_DMA_LBA48;
  260. }
  261. if (ata_bio->flags & ATA_SINGLE)
  262. ata_delay = ATA_DELAY;
  263. else
  264. ata_delay = ATA_DELAY;
  265. again:
  266. /*
  267. *
  268. * When starting a multi-sector transfer, or doing single-sector
  269. * transfers...
  270. */
  271. if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) {
  272. if (ata_bio->flags & ATA_SINGLE)
  273. nblks = 1;
  274. else
  275. nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
  276. if (ata_bio->flags & ATA_LBA) {
  277. sect = (ata_bio->blkno >> 0) & 0xff;
  278. cyl = (ata_bio->blkno >> 8) & 0xffff;
  279. head = (ata_bio->blkno >> 24) & 0x0f;
  280. head |= WDSD_LBA;
  281. } else {
  282. int blkno = ata_bio->blkno;
  283. sect = blkno % ata_bio->lp->d_nsectors;
  284. sect++; /* Sectors begin with 1, not 0. */
  285. blkno /= ata_bio->lp->d_nsectors;
  286. head = blkno % ata_bio->lp->d_ntracks;
  287. blkno /= ata_bio->lp->d_ntracks;
  288. cyl = blkno;
  289. head |= WDSD_CHS;
  290. }
  291. if (xfer->c_flags & C_DMA) {
  292. ata_bio->nblks = nblks;
  293. ata_bio->nbytes = xfer->c_bcount;
  294. if (ata_bio->flags & ATA_LBA48)
  295. cmd = (ata_bio->flags & ATA_READ) ?
  296. WDCC_READDMA_EXT : WDCC_WRITEDMA_EXT;
  297. else
  298. cmd = (ata_bio->flags & ATA_READ) ?
  299. WDCC_READDMA : WDCC_WRITEDMA;
  300. /* Init the DMA channel. */
  301. error = (*chp->wdc->dma_init)(chp->wdc->dma_arg,
  302. chp->channel, xfer->drive,
  303. (char *)xfer->databuf + xfer->c_skip,
  304. ata_bio->nbytes, dma_flags);
  305. if (error) {
  306. if (error == EINVAL) {
  307. /*
  308. * We can't do DMA on this transfer
  309. * for some reason. Fall back to
  310. * PIO.
  311. */
  312. xfer->c_flags &= ~C_DMA;
  313. error = 0;
  314. goto do_pio;
  315. }
  316. ata_bio->error = ERR_DMA;
  317. ata_bio->r_error = 0;
  318. wdc_ata_bio_done(chp, xfer);
  319. return;
  320. }
  321. /* Initiate command */
  322. wdc_set_drive(chp, xfer->drive);
  323. if (wait_for_ready(chp, ata_delay) < 0)
  324. goto timeout;
  325. /* start the DMA channel (before) */
  326. if (chp->ch_flags & WDCF_DMA_BEFORE_CMD)
  327. (*chp->wdc->dma_start)(chp->wdc->dma_arg,
  328. chp->channel, xfer->drive);
  329. if (ata_bio->flags & ATA_LBA48) {
  330. wdccommandext(chp, xfer->drive, cmd,
  331. (u_int64_t)ata_bio->blkno, nblks);
  332. } else {
  333. wdccommand(chp, xfer->drive, cmd, cyl,
  334. head, sect, nblks, 0);
  335. }
  336. /* start the DMA channel (after) */
  337. if ((chp->ch_flags & WDCF_DMA_BEFORE_CMD) == 0)
  338. (*chp->wdc->dma_start)(chp->wdc->dma_arg,
  339. chp->channel, xfer->drive);
  340. chp->ch_flags |= WDCF_DMA_WAIT;
  341. /* wait for irq */
  342. goto intr;
  343. } /* else not DMA */
  344. do_pio:
  345. ata_bio->nblks = min(nblks, ata_bio->multi);
  346. ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
  347. KASSERT(nblks == 1 || (ata_bio->flags & ATA_SINGLE) == 0);
  348. if (ata_bio->nblks > 1) {
  349. if (ata_bio->flags & ATA_LBA48)
  350. cmd = (ata_bio->flags & ATA_READ) ?
  351. WDCC_READMULTI_EXT : WDCC_WRITEMULTI_EXT;
  352. else
  353. cmd = (ata_bio->flags & ATA_READ) ?
  354. WDCC_READMULTI : WDCC_WRITEMULTI;
  355. } else {
  356. if (ata_bio->flags & ATA_LBA48)
  357. cmd = (ata_bio->flags & ATA_READ) ?
  358. WDCC_READ_EXT : WDCC_WRITE_EXT;
  359. else
  360. cmd = (ata_bio->flags & ATA_READ) ?
  361. WDCC_READ : WDCC_WRITE;
  362. }
  363. /* Initiate command! */
  364. wdc_set_drive(chp, xfer->drive);
  365. if (wait_for_ready(chp, ata_delay) < 0)
  366. goto timeout;
  367. if (ata_bio->flags & ATA_LBA48) {
  368. wdccommandext(chp, xfer->drive, cmd,
  369. (u_int64_t)ata_bio->blkno, nblks);
  370. } else {
  371. wdccommand(chp, xfer->drive, cmd, cyl,
  372. head, sect, nblks,
  373. (ata_bio->lp->d_type == DTYPE_ST506) ?
  374. ata_bio->lp->d_precompcyl / 4 : 0);
  375. }
  376. } else if (ata_bio->nblks > 1) {
  377. /* The number of blocks in the last stretch may be smaller. */
  378. nblks = xfer->c_bcount / ata_bio->lp->d_secsize;
  379. if (ata_bio->nblks > nblks) {
  380. ata_bio->nblks = nblks;
  381. ata_bio->nbytes = xfer->c_bcount;
  382. }
  383. }
  384. /* If this was a write and not using DMA, push the data. */
  385. if ((ata_bio->flags & ATA_READ) == 0) {
  386. if (wait_for_drq(chp, ata_delay) != 0) {
  387. printf("%s:%d:%d: timeout waiting for DRQ, "
  388. "st=0x%b, err=0x%02x\n",
  389. chp->wdc->sc_dev.dv_xname, chp->channel,
  390. xfer->drive, chp->ch_status, WDCS_BITS,
  391. chp->ch_error);
  392. if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
  393. ata_bio->error = TIMEOUT;
  394. wdc_ata_bio_done(chp, xfer);
  395. return;
  396. }
  397. if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) {
  398. wdc_ata_bio_done(chp, xfer);
  399. return;
  400. }
  401. wdc_output_bytes(drvp, (char *)xfer->databuf + xfer->c_skip,
  402. ata_bio->nbytes);
  403. }
  404. intr: /* Wait for IRQ (either real or polled) */
  405. if ((ata_bio->flags & ATA_POLL) == 0) {
  406. chp->ch_flags |= WDCF_IRQ_WAIT;
  407. } else {
  408. /* Wait for at last 400ns for status bit to be valid */
  409. delay(1);
  410. if (chp->ch_flags & WDCF_DMA_WAIT) {
  411. wdc_dmawait(chp, xfer, ATA_DELAY);
  412. chp->ch_flags &= ~WDCF_DMA_WAIT;
  413. }
  414. wdc_ata_bio_intr(chp, xfer, 0);
  415. if ((ata_bio->flags & ATA_ITSDONE) == 0)
  416. goto again;
  417. }
  418. return;
  419. timeout:
  420. if (chp->ch_status == 0xff)
  421. return;
  422. printf("%s:%d:%d: not ready, st=0x%b, err=0x%02x\n",
  423. chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
  424. chp->ch_status, WDCS_BITS, chp->ch_error);
  425. if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR)
  426. ata_bio->error = TIMEOUT;
  427. wdc_ata_bio_done(chp, xfer);
  428. return;
  429. }
  430. int
  431. wdc_ata_bio_intr(struct channel_softc *chp, struct wdc_xfer *xfer, int irq)
  432. {
  433. struct ata_bio *ata_bio = xfer->cmd;
  434. struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
  435. int drv_err;
  436. WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n",
  437. chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
  438. DEBUG_INTR | DEBUG_XFERS);
  439. /* Is it not a transfer, but a control operation? */
  440. if (drvp->state < READY) {
  441. printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n",
  442. chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
  443. drvp->state);
  444. panic("wdc_ata_bio_intr: bad state");
  445. }
  446. /*
  447. * reset on timeout. This will cause extra resets in the case
  448. * of occasional lost interrupts
  449. */
  450. if (xfer->c_flags & C_TIMEOU)
  451. goto timeout;
  452. /* Ack interrupt done by wait_for_unbusy */
  453. if (wait_for_unbusy(chp,
  454. (irq == 0) ? ATA_DELAY : 0) < 0) {
  455. if (irq)
  456. return 0; /* IRQ was not for us */
  457. printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n",
  458. chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
  459. xfer->c_bcount, xfer->c_skip);
  460. goto timeout;
  461. }
  462. if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
  463. chp->wdc->irqack(chp);
  464. drv_err = wdc_ata_err(drvp, ata_bio);
  465. if (xfer->c_flags & C_DMA) {
  466. if (chp->wdc->dma_status != 0) {
  467. if (drv_err != WDC_ATA_ERR) {
  468. ata_bio->error = ERR_DMA;
  469. drv_err = WDC_ATA_ERR;
  470. }
  471. }
  472. if (chp->ch_status & WDCS_DRQ) {
  473. if (drv_err != WDC_ATA_ERR) {
  474. printf("%s:%d:%d: intr with DRQ (st=0x%b)\n",
  475. chp->wdc->sc_dev.dv_xname, chp->channel,
  476. xfer->drive, chp->ch_status, WDCS_BITS);
  477. ata_bio->error = TIMEOUT;
  478. drv_err = WDC_ATA_ERR;
  479. }
  480. }
  481. if (drv_err != WDC_ATA_ERR)
  482. goto end;
  483. ata_dmaerr(drvp);
  484. }
  485. /* if we had an error, end */
  486. if (drv_err == WDC_ATA_ERR) {
  487. wdc_ata_bio_done(chp, xfer);
  488. return 1;
  489. }
  490. /* If this was a read and not using DMA, fetch the data. */
  491. if ((ata_bio->flags & ATA_READ) != 0) {
  492. if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) {
  493. printf("%s:%d:%d: read intr before drq\n",
  494. chp->wdc->sc_dev.dv_xname, chp->channel,
  495. xfer->drive);
  496. ata_bio->error = TIMEOUT;
  497. wdc_ata_bio_done(chp, xfer);
  498. return 1;
  499. }
  500. wdc_input_bytes(drvp, (char *)xfer->databuf + xfer->c_skip,
  501. ata_bio->nbytes);
  502. }
  503. end:
  504. ata_bio->blkno += ata_bio->nblks;
  505. ata_bio->blkdone += ata_bio->nblks;
  506. xfer->c_skip += ata_bio->nbytes;
  507. xfer->c_bcount -= ata_bio->nbytes;
  508. /* See if this transfer is complete. */
  509. if (xfer->c_bcount > 0) {
  510. if ((ata_bio->flags & ATA_POLL) == 0) {
  511. /* Start the next operation */
  512. _wdc_ata_bio_start(chp, xfer);
  513. } else {
  514. /* Let _wdc_ata_bio_start do the loop */
  515. return 1;
  516. }
  517. } else { /* Done with this transfer */
  518. ata_bio->error = NOERROR;
  519. wdc_ata_bio_done(chp, xfer);
  520. }
  521. return 1;
  522. timeout:
  523. if (xfer->c_flags & C_DMA)
  524. ata_dmaerr(drvp);
  525. ata_bio->error = TIMEOUT;
  526. wdc_ata_bio_done(chp, xfer);
  527. return 1;
  528. }
  529. void
  530. wdc_ata_bio_kill_xfer(struct channel_softc *chp, struct wdc_xfer *xfer)
  531. {
  532. struct ata_bio *ata_bio = xfer->cmd;
  533. timeout_del(&chp->ch_timo);
  534. /* remove this command from xfer queue */
  535. wdc_free_xfer(chp, xfer);
  536. ata_bio->flags |= ATA_ITSDONE;
  537. ata_bio->error = ERR_NODEV;
  538. ata_bio->r_error = WDCE_ABRT;
  539. if ((ata_bio->flags & ATA_POLL) == 0) {
  540. WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS);
  541. wddone(ata_bio->wd);
  542. }
  543. }
  544. void
  545. wdc_ata_bio_done(struct channel_softc *chp, struct wdc_xfer *xfer)
  546. {
  547. struct ata_bio *ata_bio = xfer->cmd;
  548. WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n",
  549. chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
  550. (u_int)xfer->c_flags),
  551. DEBUG_XFERS);
  552. if ((xfer->c_flags & C_PRIVATEXFER) == 0)
  553. timeout_del(&chp->ch_timo);
  554. /* feed back residual bcount to our caller */
  555. ata_bio->bcount = xfer->c_bcount;
  556. /* remove this command from xfer queue */
  557. wdc_free_xfer(chp, xfer);
  558. ata_bio->flags |= ATA_ITSDONE;
  559. if ((ata_bio->flags & ATA_POLL) == 0) {
  560. WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS);
  561. wddone(ata_bio->wd);
  562. }
  563. WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n",
  564. chp->ch_flags), DEBUG_XFERS);
  565. wdcstart(chp);
  566. }
  567. /*
  568. * Implement operations needed before read/write.
  569. */
  570. int
  571. wdc_ata_ctrl_intr(struct channel_softc *chp, struct wdc_xfer *xfer, int irq)
  572. {
  573. struct ata_bio *ata_bio = xfer->cmd;
  574. struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
  575. char *errstring = NULL;
  576. int delay = (irq == 0) ? ATA_DELAY : 0;
  577. WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state),
  578. DEBUG_FUNCS);
  579. again:
  580. switch (drvp->state) {
  581. case RECAL: /* Should not be in this state here */
  582. panic("wdc_ata_ctrl_intr: state==RECAL");
  583. break;
  584. case RECAL_WAIT:
  585. errstring = "recal";
  586. if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
  587. goto timeout;
  588. if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
  589. chp->wdc->irqack(chp);
  590. if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
  591. goto error;
  592. /* FALLTHROUGH */
  593. case PIOMODE:
  594. /* Don't try to set modes if controller can't be adjusted */
  595. if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0)
  596. goto geometry;
  597. /* Also don't try if the drive didn't report its mode */
  598. if ((drvp->drive_flags & DRIVE_MODE) == 0)
  599. goto geometry;
  600. /* SET FEATURES 0x08 is only for PIO mode > 2 */
  601. if (drvp->PIO_mode <= 2)
  602. goto geometry;
  603. wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
  604. 0x08 | drvp->PIO_mode, WDSF_SET_MODE);
  605. drvp->state = PIOMODE_WAIT;
  606. break;
  607. case PIOMODE_WAIT:
  608. errstring = "piomode";
  609. if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
  610. goto timeout;
  611. if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
  612. chp->wdc->irqack(chp);
  613. if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
  614. goto error;
  615. /* FALLTHROUGH */
  616. case DMAMODE:
  617. if (drvp->drive_flags & DRIVE_UDMA) {
  618. wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
  619. 0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
  620. } else if (drvp->drive_flags & DRIVE_DMA) {
  621. wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
  622. 0x20 | drvp->DMA_mode, WDSF_SET_MODE);
  623. } else {
  624. goto geometry;
  625. }
  626. drvp->state = DMAMODE_WAIT;
  627. break;
  628. case DMAMODE_WAIT:
  629. errstring = "dmamode";
  630. if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
  631. goto timeout;
  632. if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
  633. chp->wdc->irqack(chp);
  634. if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
  635. goto error;
  636. /* FALLTHROUGH */
  637. case GEOMETRY:
  638. geometry:
  639. if (ata_bio->flags & ATA_LBA)
  640. goto multimode;
  641. wdccommand(chp, xfer->drive, WDCC_IDP,
  642. ata_bio->lp->d_ncylinders,
  643. ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors,
  644. (ata_bio->lp->d_type == DTYPE_ST506) ?
  645. ata_bio->lp->d_precompcyl / 4 : 0);
  646. drvp->state = GEOMETRY_WAIT;
  647. break;
  648. case GEOMETRY_WAIT:
  649. errstring = "geometry";
  650. if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
  651. goto timeout;
  652. if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
  653. chp->wdc->irqack(chp);
  654. if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
  655. goto error;
  656. /* FALLTHROUGH */
  657. case MULTIMODE:
  658. multimode:
  659. if (ata_bio->multi == 1)
  660. goto ready;
  661. wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0,
  662. ata_bio->multi, 0);
  663. drvp->state = MULTIMODE_WAIT;
  664. break;
  665. case MULTIMODE_WAIT:
  666. errstring = "setmulti";
  667. if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
  668. goto timeout;
  669. if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
  670. chp->wdc->irqack(chp);
  671. if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
  672. goto error;
  673. /* FALLTHROUGH */
  674. case READY:
  675. ready:
  676. drvp->state = READY;
  677. /*
  678. * The drive is usable now
  679. */
  680. xfer->c_intr = wdc_ata_bio_intr;
  681. _wdc_ata_bio_start(chp, xfer);
  682. return 1;
  683. }
  684. if ((ata_bio->flags & ATA_POLL) == 0) {
  685. chp->ch_flags |= WDCF_IRQ_WAIT;
  686. } else {
  687. goto again;
  688. }
  689. return 1;
  690. timeout:
  691. if (irq && (xfer->c_flags & C_TIMEOU) == 0) {
  692. return 0; /* IRQ was not for us */
  693. }
  694. printf("%s:%d:%d: %s timed out\n",
  695. chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
  696. ata_bio->error = TIMEOUT;
  697. drvp->state = 0;
  698. wdc_ata_bio_done(chp, xfer);
  699. return 0;
  700. error:
  701. printf("%s:%d:%d: %s ",
  702. chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
  703. errstring);
  704. if (chp->ch_status & WDCS_DWF) {
  705. printf("drive fault\n");
  706. ata_bio->error = ERR_DF;
  707. } else {
  708. printf("error (%x)\n", chp->ch_error);
  709. ata_bio->r_error = chp->ch_error;
  710. ata_bio->error = ERROR;
  711. }
  712. drvp->state = 0;
  713. wdc_ata_bio_done(chp, xfer);
  714. return 1;
  715. }
  716. int
  717. wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio)
  718. {
  719. struct channel_softc *chp = drvp->chnl_softc;
  720. ata_bio->error = 0;
  721. if (chp->ch_status == 0xff) {
  722. ata_bio->error = ERR_NODEV;
  723. return WDC_ATA_ERR;
  724. }
  725. if (chp->ch_status & WDCS_BSY) {
  726. ata_bio->error = TIMEOUT;
  727. return WDC_ATA_ERR;
  728. }
  729. if (chp->ch_status & WDCS_DWF) {
  730. ata_bio->error = ERR_DF;
  731. return WDC_ATA_ERR;
  732. }
  733. if (chp->ch_status & WDCS_ERR) {
  734. ata_bio->error = ERROR;
  735. ata_bio->r_error = chp->ch_error;
  736. if (drvp->drive_flags & DRIVE_UDMA &&
  737. (ata_bio->r_error & WDCE_CRC)) {
  738. /*
  739. * Record the CRC error, to avoid downgrading to
  740. * multiword DMA
  741. */
  742. drvp->drive_flags |= DRIVE_DMAERR;
  743. }
  744. if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF |
  745. WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF))
  746. return WDC_ATA_ERR;
  747. return WDC_ATA_NOERR;
  748. }
  749. if (chp->ch_status & WDCS_CORR)
  750. ata_bio->flags |= ATA_CORR;
  751. return WDC_ATA_NOERR;
  752. }
  753. #if 0
  754. int
  755. wdc_ata_addref(drvp)
  756. struct ata_drive_datas *drvp;
  757. {
  758. struct channel_softc *chp = drvp->chnl_softc;
  759. return (wdc_addref(chp));
  760. }
  761. void
  762. wdc_ata_delref(drvp)
  763. struct ata_drive_datas *drvp;
  764. {
  765. struct channel_softc *chp = drvp->chnl_softc;
  766. wdc_delref(chp);
  767. }
  768. #endif