ahc_isa.c 15 KB

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  1. /* $OpenBSD: ahc_isa.c,v 1.18 2009/03/29 21:53:52 sthen Exp $ */
  2. /* $NetBSD: ahc_isa.c,v 1.5 1996/10/21 22:27:39 thorpej Exp $ */
  3. /*
  4. * Product specific probe and attach routines for:
  5. * 284X VLbus SCSI controllers
  6. *
  7. * Copyright (c) 1996 Jason R. Thorpe.
  8. * All rights reserved.
  9. *
  10. * Copyright (c) 1995, 1996 Christopher G. Demetriou.
  11. * All rights reserved.
  12. *
  13. * Copyright (c) 1994, 1995, 1996 Justin T. Gibbs.
  14. * All rights reserved.
  15. *
  16. * Redistribution and use in source and binary forms, with or without
  17. * modification, are permitted provided that the following conditions
  18. * are met:
  19. * 1. Redistributions of source code must retain the above copyright
  20. * notice immediately at the beginning of the file, without modification,
  21. * this list of conditions, and the following disclaimer.
  22. * 2. Redistributions in binary form must reproduce the above copyright
  23. * notice, this list of conditions and the following disclaimer in the
  24. * documentation and/or other materials provided with the distribution.
  25. * 3. All advertising materials mentioning features or use of this software
  26. * must display the following acknowledgement:
  27. * This product includes software developed by Christopher G. Demetriou
  28. * for the NetBSD Project.
  29. * 4. The name of the author may not be used to endorse or promote products
  30. * derived from this software without specific prior written permission.
  31. *
  32. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  33. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  34. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  35. * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  36. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  37. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  38. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  39. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  40. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  41. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  42. * SUCH DAMAGE.
  43. */
  44. /*
  45. * This front-end driver is really sort of a hack. The AHA-284X likes
  46. * to masquerade as an EISA device. However, on VLbus machines with
  47. * no EISA signature in the BIOS, the EISA bus will never be scanned.
  48. * This is intended to catch the 284X controllers on those systems
  49. * by looking in "EISA i/o space" for 284X controllers.
  50. *
  51. * This relies heavily on i/o port accounting. We also just use the
  52. * EISA macros for everything ... it's a real waste to redefine them.
  53. *
  54. * Note: there isn't any #ifdef for FreeBSD in this file, since the
  55. * FreeBSD EISA driver handles all cases of the 284X.
  56. *
  57. * -- Jason R. Thorpe <thorpej@NetBSD.ORG>
  58. * July 12, 1996
  59. *
  60. * TODO: some code could be shared with ahc_eisa.c, but it would probably
  61. * be a logistical mightmare to even try.
  62. */
  63. #include <sys/param.h>
  64. #include <sys/systm.h>
  65. #include <sys/kernel.h>
  66. #include <sys/device.h>
  67. #include <sys/queue.h>
  68. #include <sys/malloc.h>
  69. #include <machine/bus.h>
  70. #include <machine/intr.h>
  71. #include <scsi/scsi_all.h>
  72. #include <scsi/scsiconf.h>
  73. #include <dev/isa/isavar.h>
  74. #include <dev/eisa/eisareg.h>
  75. #include <dev/eisa/eisavar.h>
  76. #include <dev/eisa/eisadevs.h>
  77. #include <dev/ic/aic7xxx_openbsd.h>
  78. #include <dev/ic/aic7xxx_inline.h>
  79. #include <dev/ic/smc93cx6var.h>
  80. #ifdef DEBUG
  81. #define bootverbose 1
  82. #else
  83. #define bootverbose 0
  84. #endif
  85. /* IO port address setting range as EISA slot number */
  86. #define AHC_ISA_MIN_SLOT 0x1 /* from iobase = 0x1c00 */
  87. #define AHC_ISA_MAX_SLOT 0xe /* to iobase = 0xec00 */
  88. #define AHC_ISA_SLOT_OFFSET 0xc00 /* offset from EISA IO space */
  89. #define AHC_ISA_IOSIZE 0x100
  90. /*
  91. * I/O port offsets
  92. */
  93. #define AHC_ISA_VID (EISA_SLOTOFF_VID - AHC_ISA_SLOT_OFFSET)
  94. #define AHC_ISA_PID (EISA_SLOTOFF_PID - AHC_ISA_SLOT_OFFSET)
  95. #define AHC_ISA_PRIMING AHC_ISA_VID /* enable vendor/product ID */
  96. /*
  97. * AHC_ISA_PRIMING register values (write)
  98. */
  99. #define AHC_ISA_PRIMING_VID(index) (AHC_ISA_VID + (index))
  100. #define AHC_ISA_PRIMING_PID(index) (AHC_ISA_PID + (index))
  101. int ahc_isa_irq(bus_space_tag_t, bus_space_handle_t);
  102. int ahc_isa_idstring(bus_space_tag_t, bus_space_handle_t, char *);
  103. int ahc_isa_match(struct isa_attach_args *, bus_addr_t);
  104. int ahc_isa_probe(struct device *, void *, void *);
  105. void ahc_isa_attach(struct device *, struct device *, void *);
  106. void aha2840_load_seeprom(struct ahc_softc *ahc);
  107. struct cfattach ahc_isa_ca = {
  108. sizeof(struct ahc_softc), ahc_isa_probe, ahc_isa_attach
  109. };
  110. /*
  111. * This keeps track of which slots are to be checked next if the
  112. * iobase locator is a wildcard. A simple static variable isn't enough,
  113. * since it's conceivable that a system might have more than one ISA
  114. * bus.
  115. *
  116. * The "bus" member is the unit number of the parent ISA bus, e.g. "0"
  117. * for "isa0".
  118. */
  119. struct ahc_isa_slot {
  120. LIST_ENTRY(ahc_isa_slot) link;
  121. int bus;
  122. int slot;
  123. };
  124. static LIST_HEAD(, ahc_isa_slot) ahc_isa_all_slots;
  125. static int ahc_isa_slot_initialized;
  126. /*
  127. * Return irq setting of the board, otherwise -1.
  128. */
  129. int
  130. ahc_isa_irq(bus_space_tag_t iot, bus_space_handle_t ioh)
  131. {
  132. int irq;
  133. u_char intdef;
  134. u_char hcntrl;
  135. /* Pause the card preseving the IRQ type */
  136. hcntrl = bus_space_read_1(iot, ioh, HCNTRL) & IRQMS;
  137. bus_space_write_1(iot, ioh, HCNTRL, hcntrl | PAUSE);
  138. intdef = bus_space_read_1(iot, ioh, INTDEF);
  139. switch (irq = (intdef & VECTOR)) {
  140. case 9:
  141. case 10:
  142. case 11:
  143. case 12:
  144. case 14:
  145. case 15:
  146. break;
  147. default:
  148. printf("ahc_isa_irq: illegal irq setting %d\n", intdef);
  149. return -1;
  150. }
  151. /* Note that we are going and return (to probe) */
  152. return irq;
  153. }
  154. int
  155. ahc_isa_idstring(bus_space_tag_t iot, bus_space_handle_t ioh, char *idstring)
  156. {
  157. u_int8_t vid[EISA_NVIDREGS], pid[EISA_NPIDREGS];
  158. int i;
  159. /* Get the vendor ID bytes */
  160. for (i = 0; i < EISA_NVIDREGS; i++) {
  161. bus_space_write_1(iot, ioh, AHC_ISA_PRIMING,
  162. AHC_ISA_PRIMING_VID(i));
  163. vid[i] = bus_space_read_1(iot, ioh, AHC_ISA_VID + i);
  164. }
  165. /* Check for device existence */
  166. if (EISA_VENDID_NODEV(vid)) {
  167. #if 0
  168. printf("ahc_isa_idstring: no device at 0x%lx\n",
  169. ioh); /* XXX knows about ioh guts */
  170. printf("\t(0x%x, 0x%x)\n", vid[0], vid[1]);
  171. #endif
  172. return (0);
  173. }
  174. /* And check that the firmware didn't biff something badly */
  175. if (EISA_VENDID_IDDELAY(vid)) {
  176. printf("ahc_isa_idstring: BIOS biffed it at 0x%lx\n",
  177. ioh); /* XXX knows about ioh guts */
  178. return (0);
  179. }
  180. /* Get the product ID bytes */
  181. for (i = 0; i < EISA_NPIDREGS; i++) {
  182. bus_space_write_1(iot, ioh, AHC_ISA_PRIMING,
  183. AHC_ISA_PRIMING_PID(i));
  184. pid[i] = bus_space_read_1(iot, ioh, AHC_ISA_PID + i);
  185. }
  186. /* Create the ID string from the vendor and product IDs */
  187. idstring[0] = EISA_VENDID_0(vid);
  188. idstring[1] = EISA_VENDID_1(vid);
  189. idstring[2] = EISA_VENDID_2(vid);
  190. idstring[3] = EISA_PRODID_0(pid);
  191. idstring[4] = EISA_PRODID_1(pid);
  192. idstring[5] = EISA_PRODID_2(pid);
  193. idstring[6] = EISA_PRODID_3(pid);
  194. idstring[7] = '\0'; /* sanity */
  195. return (1);
  196. }
  197. int
  198. ahc_isa_match(struct isa_attach_args *ia, bus_addr_t iobase)
  199. {
  200. bus_space_tag_t iot = ia->ia_iot;
  201. bus_space_handle_t ioh;
  202. int irq;
  203. char idstring[EISA_IDSTRINGLEN];
  204. /*
  205. * Get a mapping for the while slot-specific address
  206. * space. If we can't, assume nothing's there, but
  207. * warn about it.
  208. */
  209. if (bus_space_map(iot, iobase, AHC_ISA_IOSIZE, 0, &ioh)) {
  210. #if 0
  211. /*
  212. * Don't print anything out here, since this could
  213. * be common on machines configured to look for
  214. * ahc_eisa and ahc_isa.
  215. */
  216. printf("ahc_isa_match: can't map i/o space for 0x%x\n",
  217. iobase);
  218. #endif
  219. return (0);
  220. }
  221. if (!ahc_isa_idstring(iot, ioh, idstring))
  222. irq = -1; /* cannot get the ID string */
  223. else if (strcmp(idstring, "ADP7756") &&
  224. strcmp(idstring, "ADP7757"))
  225. irq = -1; /* unknown ID strings */
  226. else
  227. irq = ahc_isa_irq(iot, ioh);
  228. bus_space_unmap(iot, ioh, AHC_ISA_IOSIZE);
  229. if (irq < 0)
  230. return (0);
  231. if (ia->ia_irq != IRQUNK &&
  232. ia->ia_irq != irq) {
  233. printf("ahc_isa_match: irq mismatch (kernel %d, card %d)\n",
  234. ia->ia_irq, irq);
  235. return (0);
  236. }
  237. /* We have a match */
  238. ia->ia_iobase = iobase;
  239. ia->ia_irq = irq;
  240. ia->ia_iosize = AHC_ISA_IOSIZE;
  241. ia->ia_msize = 0;
  242. return (1);
  243. }
  244. /*
  245. * Check the slots looking for a board we recognise
  246. * If we find one, note its address (slot) and call
  247. * the actual probe routine to check it out.
  248. */
  249. int
  250. ahc_isa_probe(struct device *parent, void *match, void *aux)
  251. {
  252. struct isa_attach_args *ia = aux;
  253. struct ahc_isa_slot *as;
  254. if (ahc_isa_slot_initialized == 0) {
  255. LIST_INIT(&ahc_isa_all_slots);
  256. ahc_isa_slot_initialized = 1;
  257. }
  258. if (ia->ia_iobase != IOBASEUNK)
  259. return (ahc_isa_match(ia, ia->ia_iobase));
  260. /*
  261. * Find this bus's state. If we don't yet have a slot
  262. * marker, allocate and initialize one.
  263. */
  264. LIST_FOREACH(as, &ahc_isa_all_slots, link)
  265. if (as->bus == parent->dv_unit)
  266. goto found_slot_marker;
  267. /*
  268. * Don't have one, so make one.
  269. */
  270. as = (struct ahc_isa_slot *)
  271. malloc(sizeof(struct ahc_isa_slot), M_DEVBUF, M_NOWAIT);
  272. if (as == NULL)
  273. panic("ahc_isa_probe: can't allocate slot marker");
  274. as->bus = parent->dv_unit;
  275. as->slot = AHC_ISA_MIN_SLOT;
  276. LIST_INSERT_HEAD(&ahc_isa_all_slots, as, link);
  277. found_slot_marker:
  278. for (; as->slot <= AHC_ISA_MAX_SLOT; as->slot++) {
  279. if (ahc_isa_match(ia, EISA_SLOT_ADDR(as->slot) +
  280. AHC_ISA_SLOT_OFFSET)) {
  281. as->slot++; /* next slot to search */
  282. return (1);
  283. }
  284. }
  285. /* No matching cards were found. */
  286. return (0);
  287. }
  288. void
  289. ahc_isa_attach(struct device *parent, struct device *self, void *aux)
  290. {
  291. struct ahc_softc *ahc = (void *)self;
  292. struct isa_attach_args *ia = aux;
  293. bus_space_tag_t iot = ia->ia_iot;
  294. bus_space_handle_t ioh;
  295. int irq;
  296. char idstring[EISA_IDSTRINGLEN];
  297. const char *model;
  298. u_int intdef;
  299. ahc_set_name(ahc, ahc->sc_dev.dv_xname);
  300. ahc_set_unit(ahc, ahc->sc_dev.dv_unit);
  301. /* set dma tags */
  302. ahc->parent_dmat = ia->ia_dmat;
  303. ahc->chip = AHC_VL; /* We are a VL Bus Controller */
  304. if (bus_space_map(iot, ia->ia_iobase, ia->ia_iosize, 0, &ioh))
  305. panic("ahc_isa_attach: can't map slot i/o addresses");
  306. if (!ahc_isa_idstring(iot, ioh, idstring))
  307. panic("ahc_isa_attach: could not read ID string");
  308. if ((irq = ahc_isa_irq(iot, ioh)) < 0)
  309. panic("ahc_isa_attach: ahc_isa_irq failed!");
  310. if (strcmp(idstring, "ADP7756") == 0) {
  311. model = EISA_PRODUCT_ADP7756;
  312. } else if (strcmp(idstring, "ADP7757") == 0) {
  313. model = EISA_PRODUCT_ADP7757;
  314. } else {
  315. panic("ahc_isa_attach: Unknown device type %s", idstring);
  316. }
  317. printf(": %s\n", model);
  318. ahc->channel = 'A';
  319. ahc->chip = AHC_AIC7770;
  320. ahc->features = AHC_AIC7770_FE;
  321. ahc->bugs |= AHC_TMODE_WIDEODD_BUG;
  322. ahc->flags |= AHC_PAGESCBS;
  323. /* set tag and handle */
  324. ahc->tag = iot;
  325. ahc->bsh = ioh;
  326. #ifdef DEBUG
  327. /*
  328. * Tell the user what type of interrupts we're using.
  329. * useful for debugging irq problems
  330. */
  331. printf( "%s: Using %s Interrupts\n", ahc_name(ahc),
  332. ahc->pause & IRQMS ? "Level Sensitive" : "Edge Triggered");
  333. #endif
  334. if (ahc_reset(ahc, /*reinit*/FALSE) != 0)
  335. return;
  336. /* See if we are edge triggered */
  337. intdef = ahc_inb(ahc, INTDEF);
  338. if ((intdef & EDGE_TRIG) != 0)
  339. ahc->flags |= AHC_EDGE_INTERRUPT;
  340. /*
  341. * Now that we know we own the resources we need, do the
  342. * card initialization.
  343. */
  344. aha2840_load_seeprom(ahc);
  345. /*
  346. * See if we have a Rev E or higher aic7770. Anything below a
  347. * Rev E will have a R/O autoflush disable configuration bit.
  348. * It's still not clear exactly what is differenent about the Rev E.
  349. * We think it allows 8 bit entries in the QOUTFIFO to support
  350. * "paging" SCBs so you can have more than 4 commands active at
  351. * once.
  352. */
  353. {
  354. char *id_string;
  355. u_char sblkctl;
  356. u_char sblkctl_orig;
  357. sblkctl_orig = ahc_inb(ahc, SBLKCTL);
  358. sblkctl = sblkctl_orig ^ AUTOFLUSHDIS;
  359. ahc_outb(ahc, SBLKCTL, sblkctl);
  360. sblkctl = ahc_inb(ahc, SBLKCTL);
  361. if(sblkctl != sblkctl_orig)
  362. {
  363. id_string = "aic7770 >= Rev E, ";
  364. /*
  365. * Ensure autoflush is enabled
  366. */
  367. sblkctl &= ~AUTOFLUSHDIS;
  368. ahc_outb(ahc, SBLKCTL, sblkctl);
  369. /* Allow paging on this adapter */
  370. ahc->flags |= AHC_PAGESCBS;
  371. }
  372. else
  373. id_string = "aic7770 <= Rev C, ";
  374. printf("%s: %s", ahc_name(ahc), id_string);
  375. }
  376. /* Setup the FIFO threshold and the bus off time */
  377. {
  378. u_char hostconf = ahc_inb(ahc, HOSTCONF);
  379. ahc_outb(ahc, BUSSPD, hostconf & DFTHRSH);
  380. ahc_outb(ahc, BUSTIME, (hostconf << 2) & BOFF);
  381. }
  382. /*
  383. * Generic aic7xxx initialization.
  384. */
  385. if(ahc_init(ahc)){
  386. ahc_free(ahc);
  387. return;
  388. }
  389. /*
  390. * Link this softc in with all other ahc instances.
  391. */
  392. ahc_softc_insert(ahc);
  393. /*
  394. * Enable the board's BUS drivers
  395. */
  396. ahc_outb(ahc, BCTL, ENABLE);
  397. /*
  398. * The IRQMS bit enables level sensitive interrupts only allow
  399. * IRQ sharing if its set.
  400. */
  401. ahc->ih = isa_intr_establish(ia->ia_ic, irq,
  402. ahc->pause & IRQMS ? IST_LEVEL : IST_EDGE, IPL_BIO, ahc_platform_intr,
  403. ahc, ahc->sc_dev.dv_xname);
  404. if (ahc->ih == NULL) {
  405. printf("%s: couldn't establish interrupt\n",
  406. ahc->sc_dev.dv_xname);
  407. ahc_free(ahc);
  408. return;
  409. }
  410. ahc_intr_enable(ahc, TRUE);
  411. /* Attach sub-devices - always succeeds */
  412. ahc_attach(ahc);
  413. }
  414. /*
  415. * Read the 284x SEEPROM.
  416. */
  417. void
  418. aha2840_load_seeprom(struct ahc_softc *ahc)
  419. {
  420. struct seeprom_descriptor sd;
  421. struct seeprom_config sc;
  422. u_int16_t checksum = 0;
  423. u_int8_t scsi_conf;
  424. int have_seeprom;
  425. sd.sd_tag = ahc->tag;
  426. sd.sd_bsh = ahc->bsh;
  427. sd.sd_regsize = 1;
  428. sd.sd_control_offset = SEECTL_2840;
  429. sd.sd_status_offset = STATUS_2840;
  430. sd.sd_dataout_offset = STATUS_2840;
  431. sd.sd_chip = C46;
  432. sd.sd_MS = 0;
  433. sd.sd_RDY = EEPROM_TF;
  434. sd.sd_CS = CS_2840;
  435. sd.sd_CK = CK_2840;
  436. sd.sd_DO = DO_2840;
  437. sd.sd_DI = DI_2840;
  438. if (bootverbose)
  439. printf("%s: Reading SEEPROM...", ahc_name(ahc));
  440. have_seeprom = read_seeprom(&sd,
  441. (u_int16_t *)&sc,
  442. /*start_addr*/0,
  443. sizeof(sc)/2);
  444. if (have_seeprom) {
  445. /* Check checksum */
  446. int i;
  447. int maxaddr = (sizeof(sc)/2) - 1;
  448. u_int16_t *scarray = (u_int16_t *)&sc;
  449. for (i = 0; i < maxaddr; i++)
  450. checksum = checksum + scarray[i];
  451. if (checksum != sc.checksum) {
  452. if(bootverbose)
  453. printf ("checksum error\n");
  454. have_seeprom = 0;
  455. } else if (bootverbose) {
  456. printf("done.\n");
  457. }
  458. }
  459. if (!have_seeprom) {
  460. if (bootverbose)
  461. printf("%s: No SEEPROM available\n", ahc_name(ahc));
  462. ahc->flags |= AHC_USEDEFAULTS;
  463. } else {
  464. /*
  465. * Put the data we've collected down into SRAM
  466. * where ahc_init will find it.
  467. */
  468. int i;
  469. int max_targ = (ahc->features & AHC_WIDE) != 0 ? 16 : 8;
  470. u_int16_t discenable;
  471. discenable = 0;
  472. for (i = 0; i < max_targ; i++){
  473. u_int8_t target_settings;
  474. target_settings = (sc.device_flags[i] & CFXFER) << 4;
  475. if (sc.device_flags[i] & CFSYNCH)
  476. target_settings |= SOFS;
  477. if (sc.device_flags[i] & CFWIDEB)
  478. target_settings |= WIDEXFER;
  479. if (sc.device_flags[i] & CFDISC)
  480. discenable |= (0x01 << i);
  481. ahc_outb(ahc, TARG_SCSIRATE + i, target_settings);
  482. }
  483. ahc_outb(ahc, DISC_DSB, ~(discenable & 0xff));
  484. ahc_outb(ahc, DISC_DSB + 1, ~((discenable >> 8) & 0xff));
  485. ahc->our_id = sc.brtime_id & CFSCSIID;
  486. scsi_conf = (ahc->our_id & 0x7);
  487. if (sc.adapter_control & CFSPARITY)
  488. scsi_conf |= ENSPCHK;
  489. if (sc.adapter_control & CFRESETB)
  490. scsi_conf |= RESET_SCSI;
  491. if (sc.bios_control & CF284XEXTEND)
  492. ahc->flags |= AHC_EXTENDED_TRANS_A;
  493. /* Set SCSICONF info */
  494. ahc_outb(ahc, SCSICONF, scsi_conf);
  495. if (sc.adapter_control & CF284XSTERM)
  496. ahc->flags |= AHC_TERM_ENB_A;
  497. }
  498. }