x86cpu.h 2.5 KB

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  1. /* Copyright (c) 2014, Cisco Systems, INC
  2. Written by XiangMingZhu WeiZhou MinPeng YanWang
  3. Redistribution and use in source and binary forms, with or without
  4. modification, are permitted provided that the following conditions
  5. are met:
  6. - Redistributions of source code must retain the above copyright
  7. notice, this list of conditions and the following disclaimer.
  8. - Redistributions in binary form must reproduce the above copyright
  9. notice, this list of conditions and the following disclaimer in the
  10. documentation and/or other materials provided with the distribution.
  11. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  12. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  13. LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  14. A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
  15. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  16. EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  17. PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  18. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  19. LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  20. NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  21. SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  22. */
  23. #if !defined(X86CPU_H)
  24. # define X86CPU_H
  25. # if defined(OPUS_X86_MAY_HAVE_SSE2)
  26. # define MAY_HAVE_SSE2(name) name ## _sse2
  27. # else
  28. # define MAY_HAVE_SSE2(name) name ## _c
  29. # endif
  30. # if defined(OPUS_X86_MAY_HAVE_SSE4_1)
  31. # define MAY_HAVE_SSE4_1(name) name ## _sse4_1
  32. # else
  33. # define MAY_HAVE_SSE4_1(name) name ## _c
  34. # endif
  35. # if defined(OPUS_HAVE_RTCD)
  36. int opus_select_arch(void);
  37. # endif
  38. /*gcc appears to emit MOVDQA's to load the argument of an _mm_cvtepi16_epi32()
  39. when optimizations are disabled, even though the actual PMOVSXWD instruction
  40. takes an m64. Unlike a normal m64 reference, these require 16-byte alignment
  41. and load 16 bytes instead of 8, possibly reading out of bounds.
  42. We can insert an explicit MOVQ using _mm_loadl_epi64(), which should have the
  43. same semantics as an m64 reference in the PMOVSXWD instruction itself, but
  44. gcc is not smart enough to optimize this out when optimizations ARE enabled.*/
  45. # if !defined(__OPTIMIZE__)
  46. # define OP_CVTEPI16_EPI32_M64(x) \
  47. (_mm_cvtepi16_epi32(_mm_loadl_epi64((__m128i *)(x))))
  48. # else
  49. # define OP_CVTEPI16_EPI32_M64(x) \
  50. (_mm_cvtepi16_epi32(*(__m128i *)(x)))
  51. # endif
  52. #endif