celt_pitch_xcorr_arm.s 19 KB

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  1. ; Copyright (c) 2007-2008 CSIRO
  2. ; Copyright (c) 2007-2009 Xiph.Org Foundation
  3. ; Copyright (c) 2013 Parrot
  4. ; Written by Aurélien Zanelli
  5. ;
  6. ; Redistribution and use in source and binary forms, with or without
  7. ; modification, are permitted provided that the following conditions
  8. ; are met:
  9. ;
  10. ; - Redistributions of source code must retain the above copyright
  11. ; notice, this list of conditions and the following disclaimer.
  12. ;
  13. ; - Redistributions in binary form must reproduce the above copyright
  14. ; notice, this list of conditions and the following disclaimer in the
  15. ; documentation and/or other materials provided with the distribution.
  16. ;
  17. ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. ; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20. ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
  21. ; OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  22. ; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  23. ; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  24. ; PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  25. ; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  26. ; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  27. ; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28. AREA |.text|, CODE, READONLY
  29. GET celt/arm/armopts.s
  30. IF OPUS_ARM_MAY_HAVE_EDSP
  31. EXPORT celt_pitch_xcorr_edsp
  32. ENDIF
  33. IF OPUS_ARM_MAY_HAVE_NEON
  34. EXPORT celt_pitch_xcorr_neon
  35. ENDIF
  36. IF OPUS_ARM_MAY_HAVE_NEON
  37. ; Compute sum[k]=sum(x[j]*y[j+k],j=0...len-1), k=0...3
  38. xcorr_kernel_neon PROC
  39. ; input:
  40. ; r3 = int len
  41. ; r4 = opus_val16 *x
  42. ; r5 = opus_val16 *y
  43. ; q0 = opus_val32 sum[4]
  44. ; output:
  45. ; q0 = opus_val32 sum[4]
  46. ; preserved: r0-r3, r6-r11, d2, q4-q7, q9-q15
  47. ; internal usage:
  48. ; r12 = int j
  49. ; d3 = y_3|y_2|y_1|y_0
  50. ; q2 = y_B|y_A|y_9|y_8|y_7|y_6|y_5|y_4
  51. ; q3 = x_7|x_6|x_5|x_4|x_3|x_2|x_1|x_0
  52. ; q8 = scratch
  53. ;
  54. ; Load y[0...3]
  55. ; This requires len>0 to always be valid (which we assert in the C code).
  56. VLD1.16 {d5}, [r5]!
  57. SUBS r12, r3, #8
  58. BLE xcorr_kernel_neon_process4
  59. ; Process 8 samples at a time.
  60. ; This loop loads one y value more than we actually need. Therefore we have to
  61. ; stop as soon as there are 8 or fewer samples left (instead of 7), to avoid
  62. ; reading past the end of the array.
  63. xcorr_kernel_neon_process8
  64. ; This loop has 19 total instructions (10 cycles to issue, minimum), with
  65. ; - 2 cycles of ARM insrtuctions,
  66. ; - 10 cycles of load/store/byte permute instructions, and
  67. ; - 9 cycles of data processing instructions.
  68. ; On a Cortex A8, we dual-issue the maximum amount (9 cycles) between the
  69. ; latter two categories, meaning the whole loop should run in 10 cycles per
  70. ; iteration, barring cache misses.
  71. ;
  72. ; Load x[0...7]
  73. VLD1.16 {d6, d7}, [r4]!
  74. ; Unlike VMOV, VAND is a data processsing instruction (and doesn't get
  75. ; assembled to VMOV, like VORR would), so it dual-issues with the prior VLD1.
  76. VAND d3, d5, d5
  77. SUBS r12, r12, #8
  78. ; Load y[4...11]
  79. VLD1.16 {d4, d5}, [r5]!
  80. VMLAL.S16 q0, d3, d6[0]
  81. VEXT.16 d16, d3, d4, #1
  82. VMLAL.S16 q0, d4, d7[0]
  83. VEXT.16 d17, d4, d5, #1
  84. VMLAL.S16 q0, d16, d6[1]
  85. VEXT.16 d16, d3, d4, #2
  86. VMLAL.S16 q0, d17, d7[1]
  87. VEXT.16 d17, d4, d5, #2
  88. VMLAL.S16 q0, d16, d6[2]
  89. VEXT.16 d16, d3, d4, #3
  90. VMLAL.S16 q0, d17, d7[2]
  91. VEXT.16 d17, d4, d5, #3
  92. VMLAL.S16 q0, d16, d6[3]
  93. VMLAL.S16 q0, d17, d7[3]
  94. BGT xcorr_kernel_neon_process8
  95. ; Process 4 samples here if we have > 4 left (still reading one extra y value).
  96. xcorr_kernel_neon_process4
  97. ADDS r12, r12, #4
  98. BLE xcorr_kernel_neon_process2
  99. ; Load x[0...3]
  100. VLD1.16 d6, [r4]!
  101. ; Use VAND since it's a data processing instruction again.
  102. VAND d4, d5, d5
  103. SUB r12, r12, #4
  104. ; Load y[4...7]
  105. VLD1.16 d5, [r5]!
  106. VMLAL.S16 q0, d4, d6[0]
  107. VEXT.16 d16, d4, d5, #1
  108. VMLAL.S16 q0, d16, d6[1]
  109. VEXT.16 d16, d4, d5, #2
  110. VMLAL.S16 q0, d16, d6[2]
  111. VEXT.16 d16, d4, d5, #3
  112. VMLAL.S16 q0, d16, d6[3]
  113. ; Process 2 samples here if we have > 2 left (still reading one extra y value).
  114. xcorr_kernel_neon_process2
  115. ADDS r12, r12, #2
  116. BLE xcorr_kernel_neon_process1
  117. ; Load x[0...1]
  118. VLD2.16 {d6[],d7[]}, [r4]!
  119. ; Use VAND since it's a data processing instruction again.
  120. VAND d4, d5, d5
  121. SUB r12, r12, #2
  122. ; Load y[4...5]
  123. VLD1.32 {d5[]}, [r5]!
  124. VMLAL.S16 q0, d4, d6
  125. VEXT.16 d16, d4, d5, #1
  126. ; Replace bottom copy of {y5,y4} in d5 with {y3,y2} from d4, using VSRI
  127. ; instead of VEXT, since it's a data-processing instruction.
  128. VSRI.64 d5, d4, #32
  129. VMLAL.S16 q0, d16, d7
  130. ; Process 1 sample using the extra y value we loaded above.
  131. xcorr_kernel_neon_process1
  132. ; Load next *x
  133. VLD1.16 {d6[]}, [r4]!
  134. ADDS r12, r12, #1
  135. ; y[0...3] are left in d5 from prior iteration(s) (if any)
  136. VMLAL.S16 q0, d5, d6
  137. MOVLE pc, lr
  138. ; Now process 1 last sample, not reading ahead.
  139. ; Load last *y
  140. VLD1.16 {d4[]}, [r5]!
  141. VSRI.64 d4, d5, #16
  142. ; Load last *x
  143. VLD1.16 {d6[]}, [r4]!
  144. VMLAL.S16 q0, d4, d6
  145. MOV pc, lr
  146. ENDP
  147. ; opus_val32 celt_pitch_xcorr_neon(opus_val16 *_x, opus_val16 *_y,
  148. ; opus_val32 *xcorr, int len, int max_pitch)
  149. celt_pitch_xcorr_neon PROC
  150. ; input:
  151. ; r0 = opus_val16 *_x
  152. ; r1 = opus_val16 *_y
  153. ; r2 = opus_val32 *xcorr
  154. ; r3 = int len
  155. ; output:
  156. ; r0 = int maxcorr
  157. ; internal usage:
  158. ; r4 = opus_val16 *x (for xcorr_kernel_neon())
  159. ; r5 = opus_val16 *y (for xcorr_kernel_neon())
  160. ; r6 = int max_pitch
  161. ; r12 = int j
  162. ; q15 = int maxcorr[4] (q15 is not used by xcorr_kernel_neon())
  163. STMFD sp!, {r4-r6, lr}
  164. LDR r6, [sp, #16]
  165. VMOV.S32 q15, #1
  166. ; if (max_pitch < 4) goto celt_pitch_xcorr_neon_process4_done
  167. SUBS r6, r6, #4
  168. BLT celt_pitch_xcorr_neon_process4_done
  169. celt_pitch_xcorr_neon_process4
  170. ; xcorr_kernel_neon parameters:
  171. ; r3 = len, r4 = _x, r5 = _y, q0 = {0, 0, 0, 0}
  172. MOV r4, r0
  173. MOV r5, r1
  174. VEOR q0, q0, q0
  175. ; xcorr_kernel_neon only modifies r4, r5, r12, and q0...q3.
  176. ; So we don't save/restore any other registers.
  177. BL xcorr_kernel_neon
  178. SUBS r6, r6, #4
  179. VST1.32 {q0}, [r2]!
  180. ; _y += 4
  181. ADD r1, r1, #8
  182. VMAX.S32 q15, q15, q0
  183. ; if (max_pitch < 4) goto celt_pitch_xcorr_neon_process4_done
  184. BGE celt_pitch_xcorr_neon_process4
  185. ; We have less than 4 sums left to compute.
  186. celt_pitch_xcorr_neon_process4_done
  187. ADDS r6, r6, #4
  188. ; Reduce maxcorr to a single value
  189. VMAX.S32 d30, d30, d31
  190. VPMAX.S32 d30, d30, d30
  191. ; if (max_pitch <= 0) goto celt_pitch_xcorr_neon_done
  192. BLE celt_pitch_xcorr_neon_done
  193. ; Now compute each remaining sum one at a time.
  194. celt_pitch_xcorr_neon_process_remaining
  195. MOV r4, r0
  196. MOV r5, r1
  197. VMOV.I32 q0, #0
  198. SUBS r12, r3, #8
  199. BLT celt_pitch_xcorr_neon_process_remaining4
  200. ; Sum terms 8 at a time.
  201. celt_pitch_xcorr_neon_process_remaining_loop8
  202. ; Load x[0...7]
  203. VLD1.16 {q1}, [r4]!
  204. ; Load y[0...7]
  205. VLD1.16 {q2}, [r5]!
  206. SUBS r12, r12, #8
  207. VMLAL.S16 q0, d4, d2
  208. VMLAL.S16 q0, d5, d3
  209. BGE celt_pitch_xcorr_neon_process_remaining_loop8
  210. ; Sum terms 4 at a time.
  211. celt_pitch_xcorr_neon_process_remaining4
  212. ADDS r12, r12, #4
  213. BLT celt_pitch_xcorr_neon_process_remaining4_done
  214. ; Load x[0...3]
  215. VLD1.16 {d2}, [r4]!
  216. ; Load y[0...3]
  217. VLD1.16 {d3}, [r5]!
  218. SUB r12, r12, #4
  219. VMLAL.S16 q0, d3, d2
  220. celt_pitch_xcorr_neon_process_remaining4_done
  221. ; Reduce the sum to a single value.
  222. VADD.S32 d0, d0, d1
  223. VPADDL.S32 d0, d0
  224. ADDS r12, r12, #4
  225. BLE celt_pitch_xcorr_neon_process_remaining_loop_done
  226. ; Sum terms 1 at a time.
  227. celt_pitch_xcorr_neon_process_remaining_loop1
  228. VLD1.16 {d2[]}, [r4]!
  229. VLD1.16 {d3[]}, [r5]!
  230. SUBS r12, r12, #1
  231. VMLAL.S16 q0, d2, d3
  232. BGT celt_pitch_xcorr_neon_process_remaining_loop1
  233. celt_pitch_xcorr_neon_process_remaining_loop_done
  234. VST1.32 {d0[0]}, [r2]!
  235. VMAX.S32 d30, d30, d0
  236. SUBS r6, r6, #1
  237. ; _y++
  238. ADD r1, r1, #2
  239. ; if (--max_pitch > 0) goto celt_pitch_xcorr_neon_process_remaining
  240. BGT celt_pitch_xcorr_neon_process_remaining
  241. celt_pitch_xcorr_neon_done
  242. VMOV.32 r0, d30[0]
  243. LDMFD sp!, {r4-r6, pc}
  244. ENDP
  245. ENDIF
  246. IF OPUS_ARM_MAY_HAVE_EDSP
  247. ; This will get used on ARMv7 devices without NEON, so it has been optimized
  248. ; to take advantage of dual-issuing where possible.
  249. xcorr_kernel_edsp PROC
  250. ; input:
  251. ; r3 = int len
  252. ; r4 = opus_val16 *_x (must be 32-bit aligned)
  253. ; r5 = opus_val16 *_y (must be 32-bit aligned)
  254. ; r6...r9 = opus_val32 sum[4]
  255. ; output:
  256. ; r6...r9 = opus_val32 sum[4]
  257. ; preserved: r0-r5
  258. ; internal usage
  259. ; r2 = int j
  260. ; r12,r14 = opus_val16 x[4]
  261. ; r10,r11 = opus_val16 y[4]
  262. STMFD sp!, {r2,r4,r5,lr}
  263. LDR r10, [r5], #4 ; Load y[0...1]
  264. SUBS r2, r3, #4 ; j = len-4
  265. LDR r11, [r5], #4 ; Load y[2...3]
  266. BLE xcorr_kernel_edsp_process4_done
  267. LDR r12, [r4], #4 ; Load x[0...1]
  268. ; Stall
  269. xcorr_kernel_edsp_process4
  270. ; The multiplies must issue from pipeline 0, and can't dual-issue with each
  271. ; other. Every other instruction here dual-issues with a multiply, and is
  272. ; thus "free". There should be no stalls in the body of the loop.
  273. SMLABB r6, r12, r10, r6 ; sum[0] = MAC16_16(sum[0],x_0,y_0)
  274. LDR r14, [r4], #4 ; Load x[2...3]
  275. SMLABT r7, r12, r10, r7 ; sum[1] = MAC16_16(sum[1],x_0,y_1)
  276. SUBS r2, r2, #4 ; j-=4
  277. SMLABB r8, r12, r11, r8 ; sum[2] = MAC16_16(sum[2],x_0,y_2)
  278. SMLABT r9, r12, r11, r9 ; sum[3] = MAC16_16(sum[3],x_0,y_3)
  279. SMLATT r6, r12, r10, r6 ; sum[0] = MAC16_16(sum[0],x_1,y_1)
  280. LDR r10, [r5], #4 ; Load y[4...5]
  281. SMLATB r7, r12, r11, r7 ; sum[1] = MAC16_16(sum[1],x_1,y_2)
  282. SMLATT r8, r12, r11, r8 ; sum[2] = MAC16_16(sum[2],x_1,y_3)
  283. SMLATB r9, r12, r10, r9 ; sum[3] = MAC16_16(sum[3],x_1,y_4)
  284. LDRGT r12, [r4], #4 ; Load x[0...1]
  285. SMLABB r6, r14, r11, r6 ; sum[0] = MAC16_16(sum[0],x_2,y_2)
  286. SMLABT r7, r14, r11, r7 ; sum[1] = MAC16_16(sum[1],x_2,y_3)
  287. SMLABB r8, r14, r10, r8 ; sum[2] = MAC16_16(sum[2],x_2,y_4)
  288. SMLABT r9, r14, r10, r9 ; sum[3] = MAC16_16(sum[3],x_2,y_5)
  289. SMLATT r6, r14, r11, r6 ; sum[0] = MAC16_16(sum[0],x_3,y_3)
  290. LDR r11, [r5], #4 ; Load y[6...7]
  291. SMLATB r7, r14, r10, r7 ; sum[1] = MAC16_16(sum[1],x_3,y_4)
  292. SMLATT r8, r14, r10, r8 ; sum[2] = MAC16_16(sum[2],x_3,y_5)
  293. SMLATB r9, r14, r11, r9 ; sum[3] = MAC16_16(sum[3],x_3,y_6)
  294. BGT xcorr_kernel_edsp_process4
  295. xcorr_kernel_edsp_process4_done
  296. ADDS r2, r2, #4
  297. BLE xcorr_kernel_edsp_done
  298. LDRH r12, [r4], #2 ; r12 = *x++
  299. SUBS r2, r2, #1 ; j--
  300. ; Stall
  301. SMLABB r6, r12, r10, r6 ; sum[0] = MAC16_16(sum[0],x,y_0)
  302. LDRGTH r14, [r4], #2 ; r14 = *x++
  303. SMLABT r7, r12, r10, r7 ; sum[1] = MAC16_16(sum[1],x,y_1)
  304. SMLABB r8, r12, r11, r8 ; sum[2] = MAC16_16(sum[2],x,y_2)
  305. SMLABT r9, r12, r11, r9 ; sum[3] = MAC16_16(sum[3],x,y_3)
  306. BLE xcorr_kernel_edsp_done
  307. SMLABT r6, r14, r10, r6 ; sum[0] = MAC16_16(sum[0],x,y_1)
  308. SUBS r2, r2, #1 ; j--
  309. SMLABB r7, r14, r11, r7 ; sum[1] = MAC16_16(sum[1],x,y_2)
  310. LDRH r10, [r5], #2 ; r10 = y_4 = *y++
  311. SMLABT r8, r14, r11, r8 ; sum[2] = MAC16_16(sum[2],x,y_3)
  312. LDRGTH r12, [r4], #2 ; r12 = *x++
  313. SMLABB r9, r14, r10, r9 ; sum[3] = MAC16_16(sum[3],x,y_4)
  314. BLE xcorr_kernel_edsp_done
  315. SMLABB r6, r12, r11, r6 ; sum[0] = MAC16_16(sum[0],tmp,y_2)
  316. CMP r2, #1 ; j--
  317. SMLABT r7, r12, r11, r7 ; sum[1] = MAC16_16(sum[1],tmp,y_3)
  318. LDRH r2, [r5], #2 ; r2 = y_5 = *y++
  319. SMLABB r8, r12, r10, r8 ; sum[2] = MAC16_16(sum[2],tmp,y_4)
  320. LDRGTH r14, [r4] ; r14 = *x
  321. SMLABB r9, r12, r2, r9 ; sum[3] = MAC16_16(sum[3],tmp,y_5)
  322. BLE xcorr_kernel_edsp_done
  323. SMLABT r6, r14, r11, r6 ; sum[0] = MAC16_16(sum[0],tmp,y_3)
  324. LDRH r11, [r5] ; r11 = y_6 = *y
  325. SMLABB r7, r14, r10, r7 ; sum[1] = MAC16_16(sum[1],tmp,y_4)
  326. SMLABB r8, r14, r2, r8 ; sum[2] = MAC16_16(sum[2],tmp,y_5)
  327. SMLABB r9, r14, r11, r9 ; sum[3] = MAC16_16(sum[3],tmp,y_6)
  328. xcorr_kernel_edsp_done
  329. LDMFD sp!, {r2,r4,r5,pc}
  330. ENDP
  331. celt_pitch_xcorr_edsp PROC
  332. ; input:
  333. ; r0 = opus_val16 *_x (must be 32-bit aligned)
  334. ; r1 = opus_val16 *_y (only needs to be 16-bit aligned)
  335. ; r2 = opus_val32 *xcorr
  336. ; r3 = int len
  337. ; output:
  338. ; r0 = maxcorr
  339. ; internal usage
  340. ; r4 = opus_val16 *x
  341. ; r5 = opus_val16 *y
  342. ; r6 = opus_val32 sum0
  343. ; r7 = opus_val32 sum1
  344. ; r8 = opus_val32 sum2
  345. ; r9 = opus_val32 sum3
  346. ; r1 = int max_pitch
  347. ; r12 = int j
  348. STMFD sp!, {r4-r11, lr}
  349. MOV r5, r1
  350. LDR r1, [sp, #36]
  351. MOV r4, r0
  352. TST r5, #3
  353. ; maxcorr = 1
  354. MOV r0, #1
  355. BEQ celt_pitch_xcorr_edsp_process1u_done
  356. ; Compute one sum at the start to make y 32-bit aligned.
  357. SUBS r12, r3, #4
  358. ; r14 = sum = 0
  359. MOV r14, #0
  360. LDRH r8, [r5], #2
  361. BLE celt_pitch_xcorr_edsp_process1u_loop4_done
  362. LDR r6, [r4], #4
  363. MOV r8, r8, LSL #16
  364. celt_pitch_xcorr_edsp_process1u_loop4
  365. LDR r9, [r5], #4
  366. SMLABT r14, r6, r8, r14 ; sum = MAC16_16(sum, x_0, y_0)
  367. LDR r7, [r4], #4
  368. SMLATB r14, r6, r9, r14 ; sum = MAC16_16(sum, x_1, y_1)
  369. LDR r8, [r5], #4
  370. SMLABT r14, r7, r9, r14 ; sum = MAC16_16(sum, x_2, y_2)
  371. SUBS r12, r12, #4 ; j-=4
  372. SMLATB r14, r7, r8, r14 ; sum = MAC16_16(sum, x_3, y_3)
  373. LDRGT r6, [r4], #4
  374. BGT celt_pitch_xcorr_edsp_process1u_loop4
  375. MOV r8, r8, LSR #16
  376. celt_pitch_xcorr_edsp_process1u_loop4_done
  377. ADDS r12, r12, #4
  378. celt_pitch_xcorr_edsp_process1u_loop1
  379. LDRGEH r6, [r4], #2
  380. ; Stall
  381. SMLABBGE r14, r6, r8, r14 ; sum = MAC16_16(sum, *x, *y)
  382. SUBGES r12, r12, #1
  383. LDRGTH r8, [r5], #2
  384. BGT celt_pitch_xcorr_edsp_process1u_loop1
  385. ; Restore _x
  386. SUB r4, r4, r3, LSL #1
  387. ; Restore and advance _y
  388. SUB r5, r5, r3, LSL #1
  389. ; maxcorr = max(maxcorr, sum)
  390. CMP r0, r14
  391. ADD r5, r5, #2
  392. MOVLT r0, r14
  393. SUBS r1, r1, #1
  394. ; xcorr[i] = sum
  395. STR r14, [r2], #4
  396. BLE celt_pitch_xcorr_edsp_done
  397. celt_pitch_xcorr_edsp_process1u_done
  398. ; if (max_pitch < 4) goto celt_pitch_xcorr_edsp_process2
  399. SUBS r1, r1, #4
  400. BLT celt_pitch_xcorr_edsp_process2
  401. celt_pitch_xcorr_edsp_process4
  402. ; xcorr_kernel_edsp parameters:
  403. ; r3 = len, r4 = _x, r5 = _y, r6...r9 = sum[4] = {0, 0, 0, 0}
  404. MOV r6, #0
  405. MOV r7, #0
  406. MOV r8, #0
  407. MOV r9, #0
  408. BL xcorr_kernel_edsp ; xcorr_kernel_edsp(_x, _y+i, xcorr+i, len)
  409. ; maxcorr = max(maxcorr, sum0, sum1, sum2, sum3)
  410. CMP r0, r6
  411. ; _y+=4
  412. ADD r5, r5, #8
  413. MOVLT r0, r6
  414. CMP r0, r7
  415. MOVLT r0, r7
  416. CMP r0, r8
  417. MOVLT r0, r8
  418. CMP r0, r9
  419. MOVLT r0, r9
  420. STMIA r2!, {r6-r9}
  421. SUBS r1, r1, #4
  422. BGE celt_pitch_xcorr_edsp_process4
  423. celt_pitch_xcorr_edsp_process2
  424. ADDS r1, r1, #2
  425. BLT celt_pitch_xcorr_edsp_process1a
  426. SUBS r12, r3, #4
  427. ; {r10, r11} = {sum0, sum1} = {0, 0}
  428. MOV r10, #0
  429. MOV r11, #0
  430. LDR r8, [r5], #4
  431. BLE celt_pitch_xcorr_edsp_process2_loop_done
  432. LDR r6, [r4], #4
  433. LDR r9, [r5], #4
  434. celt_pitch_xcorr_edsp_process2_loop4
  435. SMLABB r10, r6, r8, r10 ; sum0 = MAC16_16(sum0, x_0, y_0)
  436. LDR r7, [r4], #4
  437. SMLABT r11, r6, r8, r11 ; sum1 = MAC16_16(sum1, x_0, y_1)
  438. SUBS r12, r12, #4 ; j-=4
  439. SMLATT r10, r6, r8, r10 ; sum0 = MAC16_16(sum0, x_1, y_1)
  440. LDR r8, [r5], #4
  441. SMLATB r11, r6, r9, r11 ; sum1 = MAC16_16(sum1, x_1, y_2)
  442. LDRGT r6, [r4], #4
  443. SMLABB r10, r7, r9, r10 ; sum0 = MAC16_16(sum0, x_2, y_2)
  444. SMLABT r11, r7, r9, r11 ; sum1 = MAC16_16(sum1, x_2, y_3)
  445. SMLATT r10, r7, r9, r10 ; sum0 = MAC16_16(sum0, x_3, y_3)
  446. LDRGT r9, [r5], #4
  447. SMLATB r11, r7, r8, r11 ; sum1 = MAC16_16(sum1, x_3, y_4)
  448. BGT celt_pitch_xcorr_edsp_process2_loop4
  449. celt_pitch_xcorr_edsp_process2_loop_done
  450. ADDS r12, r12, #2
  451. BLE celt_pitch_xcorr_edsp_process2_1
  452. LDR r6, [r4], #4
  453. ; Stall
  454. SMLABB r10, r6, r8, r10 ; sum0 = MAC16_16(sum0, x_0, y_0)
  455. LDR r9, [r5], #4
  456. SMLABT r11, r6, r8, r11 ; sum1 = MAC16_16(sum1, x_0, y_1)
  457. SUB r12, r12, #2
  458. SMLATT r10, r6, r8, r10 ; sum0 = MAC16_16(sum0, x_1, y_1)
  459. MOV r8, r9
  460. SMLATB r11, r6, r9, r11 ; sum1 = MAC16_16(sum1, x_1, y_2)
  461. celt_pitch_xcorr_edsp_process2_1
  462. LDRH r6, [r4], #2
  463. ADDS r12, r12, #1
  464. ; Stall
  465. SMLABB r10, r6, r8, r10 ; sum0 = MAC16_16(sum0, x_0, y_0)
  466. LDRGTH r7, [r4], #2
  467. SMLABT r11, r6, r8, r11 ; sum1 = MAC16_16(sum1, x_0, y_1)
  468. BLE celt_pitch_xcorr_edsp_process2_done
  469. LDRH r9, [r5], #2
  470. SMLABT r10, r7, r8, r10 ; sum0 = MAC16_16(sum0, x_0, y_1)
  471. SMLABB r11, r7, r9, r11 ; sum1 = MAC16_16(sum1, x_0, y_2)
  472. celt_pitch_xcorr_edsp_process2_done
  473. ; Restore _x
  474. SUB r4, r4, r3, LSL #1
  475. ; Restore and advance _y
  476. SUB r5, r5, r3, LSL #1
  477. ; maxcorr = max(maxcorr, sum0)
  478. CMP r0, r10
  479. ADD r5, r5, #2
  480. MOVLT r0, r10
  481. SUB r1, r1, #2
  482. ; maxcorr = max(maxcorr, sum1)
  483. CMP r0, r11
  484. ; xcorr[i] = sum
  485. STR r10, [r2], #4
  486. MOVLT r0, r11
  487. STR r11, [r2], #4
  488. celt_pitch_xcorr_edsp_process1a
  489. ADDS r1, r1, #1
  490. BLT celt_pitch_xcorr_edsp_done
  491. SUBS r12, r3, #4
  492. ; r14 = sum = 0
  493. MOV r14, #0
  494. BLT celt_pitch_xcorr_edsp_process1a_loop_done
  495. LDR r6, [r4], #4
  496. LDR r8, [r5], #4
  497. LDR r7, [r4], #4
  498. LDR r9, [r5], #4
  499. celt_pitch_xcorr_edsp_process1a_loop4
  500. SMLABB r14, r6, r8, r14 ; sum = MAC16_16(sum, x_0, y_0)
  501. SUBS r12, r12, #4 ; j-=4
  502. SMLATT r14, r6, r8, r14 ; sum = MAC16_16(sum, x_1, y_1)
  503. LDRGE r6, [r4], #4
  504. SMLABB r14, r7, r9, r14 ; sum = MAC16_16(sum, x_2, y_2)
  505. LDRGE r8, [r5], #4
  506. SMLATT r14, r7, r9, r14 ; sum = MAC16_16(sum, x_3, y_3)
  507. LDRGE r7, [r4], #4
  508. LDRGE r9, [r5], #4
  509. BGE celt_pitch_xcorr_edsp_process1a_loop4
  510. celt_pitch_xcorr_edsp_process1a_loop_done
  511. ADDS r12, r12, #2
  512. LDRGE r6, [r4], #4
  513. LDRGE r8, [r5], #4
  514. ; Stall
  515. SMLABBGE r14, r6, r8, r14 ; sum = MAC16_16(sum, x_0, y_0)
  516. SUBGE r12, r12, #2
  517. SMLATTGE r14, r6, r8, r14 ; sum = MAC16_16(sum, x_1, y_1)
  518. ADDS r12, r12, #1
  519. LDRGEH r6, [r4], #2
  520. LDRGEH r8, [r5], #2
  521. ; Stall
  522. SMLABBGE r14, r6, r8, r14 ; sum = MAC16_16(sum, *x, *y)
  523. ; maxcorr = max(maxcorr, sum)
  524. CMP r0, r14
  525. ; xcorr[i] = sum
  526. STR r14, [r2], #4
  527. MOVLT r0, r14
  528. celt_pitch_xcorr_edsp_done
  529. LDMFD sp!, {r4-r11, pc}
  530. ENDP
  531. ENDIF
  532. END