NSQ_del_dec_arm.h 5.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101
  1. /***********************************************************************
  2. Copyright (c) 2017 Google Inc.
  3. Redistribution and use in source and binary forms, with or without
  4. modification, are permitted provided that the following conditions
  5. are met:
  6. - Redistributions of source code must retain the above copyright notice,
  7. this list of conditions and the following disclaimer.
  8. - Redistributions in binary form must reproduce the above copyright
  9. notice, this list of conditions and the following disclaimer in the
  10. documentation and/or other materials provided with the distribution.
  11. - Neither the name of Internet Society, IETF or IETF Trust, nor the
  12. names of specific contributors, may be used to endorse or promote
  13. products derived from this software without specific prior written
  14. permission.
  15. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  16. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17. IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18. ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  19. LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  20. CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  21. SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  22. INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  23. CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  24. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  25. POSSIBILITY OF SUCH DAMAGE.
  26. ***********************************************************************/
  27. #ifndef SILK_NSQ_DEL_DEC_ARM_H
  28. #define SILK_NSQ_DEL_DEC_ARM_H
  29. #include "celt/arm/armcpu.h"
  30. #if defined(OPUS_ARM_MAY_HAVE_NEON_INTR)
  31. void silk_NSQ_del_dec_neon(
  32. const silk_encoder_state *psEncC, silk_nsq_state *NSQ,
  33. SideInfoIndices *psIndices, const opus_int16 x16[], opus_int8 pulses[],
  34. const opus_int16 PredCoef_Q12[2 * MAX_LPC_ORDER],
  35. const opus_int16 LTPCoef_Q14[LTP_ORDER * MAX_NB_SUBFR],
  36. const opus_int16 AR_Q13[MAX_NB_SUBFR * MAX_SHAPE_LPC_ORDER],
  37. const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR],
  38. const opus_int Tilt_Q14[MAX_NB_SUBFR],
  39. const opus_int32 LF_shp_Q14[MAX_NB_SUBFR],
  40. const opus_int32 Gains_Q16[MAX_NB_SUBFR],
  41. const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10,
  42. const opus_int LTP_scale_Q14);
  43. #if !defined(OPUS_HAVE_RTCD)
  44. #define OVERRIDE_silk_NSQ_del_dec (1)
  45. #define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
  46. LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
  47. LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
  48. LTP_scale_Q14, arch) \
  49. ((void)(arch), \
  50. PRESUME_NEON(silk_NSQ_del_dec)( \
  51. psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, LTPCoef_Q14, \
  52. AR_Q13, HarmShapeGain_Q14, Tilt_Q14, LF_shp_Q14, Gains_Q16, pitchL, \
  53. Lambda_Q10, LTP_scale_Q14))
  54. #endif
  55. #endif
  56. #if !defined(OVERRIDE_silk_NSQ_del_dec)
  57. /*Is run-time CPU detection enabled on this platform?*/
  58. #if defined(OPUS_HAVE_RTCD) && (defined(OPUS_ARM_MAY_HAVE_NEON_INTR) && \
  59. !defined(OPUS_ARM_PRESUME_NEON_INTR))
  60. extern void (*const SILK_NSQ_DEL_DEC_IMPL[OPUS_ARCHMASK + 1])(
  61. const silk_encoder_state *psEncC, silk_nsq_state *NSQ,
  62. SideInfoIndices *psIndices, const opus_int16 x16[], opus_int8 pulses[],
  63. const opus_int16 PredCoef_Q12[2 * MAX_LPC_ORDER],
  64. const opus_int16 LTPCoef_Q14[LTP_ORDER * MAX_NB_SUBFR],
  65. const opus_int16 AR_Q13[MAX_NB_SUBFR * MAX_SHAPE_LPC_ORDER],
  66. const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR],
  67. const opus_int Tilt_Q14[MAX_NB_SUBFR],
  68. const opus_int32 LF_shp_Q14[MAX_NB_SUBFR],
  69. const opus_int32 Gains_Q16[MAX_NB_SUBFR],
  70. const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10,
  71. const opus_int LTP_scale_Q14);
  72. #define OVERRIDE_silk_NSQ_del_dec (1)
  73. #define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
  74. LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
  75. LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
  76. LTP_scale_Q14, arch) \
  77. ((*SILK_NSQ_DEL_DEC_IMPL[(arch)&OPUS_ARCHMASK])( \
  78. psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, LTPCoef_Q14, \
  79. AR_Q13, HarmShapeGain_Q14, Tilt_Q14, LF_shp_Q14, Gains_Q16, pitchL, \
  80. Lambda_Q10, LTP_scale_Q14))
  81. #elif defined(OPUS_ARM_PRESUME_NEON_INTR)
  82. #define OVERRIDE_silk_NSQ_del_dec (1)
  83. #define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
  84. LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
  85. LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
  86. LTP_scale_Q14, arch) \
  87. ((void)(arch), \
  88. silk_NSQ_del_dec_neon(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
  89. LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
  90. LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
  91. LTP_scale_Q14))
  92. #endif
  93. #endif
  94. #endif /* end SILK_NSQ_DEL_DEC_ARM_H */