psc-i2s.c 10 KB

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  1. /*
  2. * Au12x0/Au1550 PSC ALSA ASoC audio support.
  3. *
  4. * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
  5. * Manuel Lauss <manuel.lauss@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Au1xxx-PSC I2S glue.
  12. *
  13. * NOTE: so far only PSC slave mode (bit- and frameclock) is supported.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/slab.h>
  18. #include <linux/suspend.h>
  19. #include <sound/core.h>
  20. #include <sound/pcm.h>
  21. #include <sound/initval.h>
  22. #include <sound/soc.h>
  23. #include <asm/mach-au1x00/au1000.h>
  24. #include <asm/mach-au1x00/au1xxx_psc.h>
  25. #include "psc.h"
  26. /* supported I2S DAI hardware formats */
  27. #define AU1XPSC_I2S_DAIFMT \
  28. (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | \
  29. SND_SOC_DAIFMT_NB_NF)
  30. /* supported I2S direction */
  31. #define AU1XPSC_I2S_DIR \
  32. (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
  33. #define AU1XPSC_I2S_RATES \
  34. SNDRV_PCM_RATE_8000_192000
  35. #define AU1XPSC_I2S_FMTS \
  36. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
  37. #define I2SSTAT_BUSY(stype) \
  38. ((stype) == PCM_TX ? PSC_I2SSTAT_TB : PSC_I2SSTAT_RB)
  39. #define I2SPCR_START(stype) \
  40. ((stype) == PCM_TX ? PSC_I2SPCR_TS : PSC_I2SPCR_RS)
  41. #define I2SPCR_STOP(stype) \
  42. ((stype) == PCM_TX ? PSC_I2SPCR_TP : PSC_I2SPCR_RP)
  43. #define I2SPCR_CLRFIFO(stype) \
  44. ((stype) == PCM_TX ? PSC_I2SPCR_TC : PSC_I2SPCR_RC)
  45. static int au1xpsc_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
  46. unsigned int fmt)
  47. {
  48. struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(cpu_dai);
  49. unsigned long ct;
  50. int ret;
  51. ret = -EINVAL;
  52. ct = pscdata->cfg;
  53. ct &= ~(PSC_I2SCFG_XM | PSC_I2SCFG_MLJ); /* left-justified */
  54. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  55. case SND_SOC_DAIFMT_I2S:
  56. ct |= PSC_I2SCFG_XM; /* enable I2S mode */
  57. break;
  58. case SND_SOC_DAIFMT_MSB:
  59. break;
  60. case SND_SOC_DAIFMT_LSB:
  61. ct |= PSC_I2SCFG_MLJ; /* LSB (right-) justified */
  62. break;
  63. default:
  64. goto out;
  65. }
  66. ct &= ~(PSC_I2SCFG_BI | PSC_I2SCFG_WI); /* IB-IF */
  67. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  68. case SND_SOC_DAIFMT_NB_NF:
  69. ct |= PSC_I2SCFG_BI | PSC_I2SCFG_WI;
  70. break;
  71. case SND_SOC_DAIFMT_NB_IF:
  72. ct |= PSC_I2SCFG_BI;
  73. break;
  74. case SND_SOC_DAIFMT_IB_NF:
  75. ct |= PSC_I2SCFG_WI;
  76. break;
  77. case SND_SOC_DAIFMT_IB_IF:
  78. break;
  79. default:
  80. goto out;
  81. }
  82. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  83. case SND_SOC_DAIFMT_CBM_CFM: /* CODEC master */
  84. ct |= PSC_I2SCFG_MS; /* PSC I2S slave mode */
  85. break;
  86. case SND_SOC_DAIFMT_CBS_CFS: /* CODEC slave */
  87. ct &= ~PSC_I2SCFG_MS; /* PSC I2S Master mode */
  88. break;
  89. default:
  90. goto out;
  91. }
  92. pscdata->cfg = ct;
  93. ret = 0;
  94. out:
  95. return ret;
  96. }
  97. static int au1xpsc_i2s_hw_params(struct snd_pcm_substream *substream,
  98. struct snd_pcm_hw_params *params,
  99. struct snd_soc_dai *dai)
  100. {
  101. struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
  102. int cfgbits;
  103. unsigned long stat;
  104. /* check if the PSC is already streaming data */
  105. stat = au_readl(I2S_STAT(pscdata));
  106. if (stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB)) {
  107. /* reject parameters not currently set up in hardware */
  108. cfgbits = au_readl(I2S_CFG(pscdata));
  109. if ((PSC_I2SCFG_GET_LEN(cfgbits) != params->msbits) ||
  110. (params_rate(params) != pscdata->rate))
  111. return -EINVAL;
  112. } else {
  113. /* set sample bitdepth */
  114. pscdata->cfg &= ~(0x1f << 4);
  115. pscdata->cfg |= PSC_I2SCFG_SET_LEN(params->msbits);
  116. /* remember current rate for other stream */
  117. pscdata->rate = params_rate(params);
  118. }
  119. return 0;
  120. }
  121. /* Configure PSC late: on my devel systems the codec is I2S master and
  122. * supplies the i2sbitclock __AND__ i2sMclk (!) to the PSC unit. ASoC
  123. * uses aggressive PM and switches the codec off when it is not in use
  124. * which also means the PSC unit doesn't get any clocks and is therefore
  125. * dead. That's why this chunk here gets called from the trigger callback
  126. * because I can be reasonably certain the codec is driving the clocks.
  127. */
  128. static int au1xpsc_i2s_configure(struct au1xpsc_audio_data *pscdata)
  129. {
  130. unsigned long tmo;
  131. /* bring PSC out of sleep, and configure I2S unit */
  132. au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
  133. au_sync();
  134. tmo = 1000000;
  135. while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_SR) && tmo)
  136. tmo--;
  137. if (!tmo)
  138. goto psc_err;
  139. au_writel(0, I2S_CFG(pscdata));
  140. au_sync();
  141. au_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata));
  142. au_sync();
  143. /* wait for I2S controller to become ready */
  144. tmo = 1000000;
  145. while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_DR) && tmo)
  146. tmo--;
  147. if (tmo)
  148. return 0;
  149. psc_err:
  150. au_writel(0, I2S_CFG(pscdata));
  151. au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
  152. au_sync();
  153. return -ETIMEDOUT;
  154. }
  155. static int au1xpsc_i2s_start(struct au1xpsc_audio_data *pscdata, int stype)
  156. {
  157. unsigned long tmo, stat;
  158. int ret;
  159. ret = 0;
  160. /* if both TX and RX are idle, configure the PSC */
  161. stat = au_readl(I2S_STAT(pscdata));
  162. if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
  163. ret = au1xpsc_i2s_configure(pscdata);
  164. if (ret)
  165. goto out;
  166. }
  167. au_writel(I2SPCR_CLRFIFO(stype), I2S_PCR(pscdata));
  168. au_sync();
  169. au_writel(I2SPCR_START(stype), I2S_PCR(pscdata));
  170. au_sync();
  171. /* wait for start confirmation */
  172. tmo = 1000000;
  173. while (!(au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
  174. tmo--;
  175. if (!tmo) {
  176. au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
  177. au_sync();
  178. ret = -ETIMEDOUT;
  179. }
  180. out:
  181. return ret;
  182. }
  183. static int au1xpsc_i2s_stop(struct au1xpsc_audio_data *pscdata, int stype)
  184. {
  185. unsigned long tmo, stat;
  186. au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
  187. au_sync();
  188. /* wait for stop confirmation */
  189. tmo = 1000000;
  190. while ((au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
  191. tmo--;
  192. /* if both TX and RX are idle, disable PSC */
  193. stat = au_readl(I2S_STAT(pscdata));
  194. if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
  195. au_writel(0, I2S_CFG(pscdata));
  196. au_sync();
  197. au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
  198. au_sync();
  199. }
  200. return 0;
  201. }
  202. static int au1xpsc_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
  203. struct snd_soc_dai *dai)
  204. {
  205. struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
  206. int ret, stype = SUBSTREAM_TYPE(substream);
  207. switch (cmd) {
  208. case SNDRV_PCM_TRIGGER_START:
  209. case SNDRV_PCM_TRIGGER_RESUME:
  210. ret = au1xpsc_i2s_start(pscdata, stype);
  211. break;
  212. case SNDRV_PCM_TRIGGER_STOP:
  213. case SNDRV_PCM_TRIGGER_SUSPEND:
  214. ret = au1xpsc_i2s_stop(pscdata, stype);
  215. break;
  216. default:
  217. ret = -EINVAL;
  218. }
  219. return ret;
  220. }
  221. static struct snd_soc_dai_ops au1xpsc_i2s_dai_ops = {
  222. .trigger = au1xpsc_i2s_trigger,
  223. .hw_params = au1xpsc_i2s_hw_params,
  224. .set_fmt = au1xpsc_i2s_set_fmt,
  225. };
  226. static const struct snd_soc_dai_driver au1xpsc_i2s_dai_template = {
  227. .playback = {
  228. .rates = AU1XPSC_I2S_RATES,
  229. .formats = AU1XPSC_I2S_FMTS,
  230. .channels_min = 2,
  231. .channels_max = 8, /* 2 without external help */
  232. },
  233. .capture = {
  234. .rates = AU1XPSC_I2S_RATES,
  235. .formats = AU1XPSC_I2S_FMTS,
  236. .channels_min = 2,
  237. .channels_max = 8, /* 2 without external help */
  238. },
  239. .ops = &au1xpsc_i2s_dai_ops,
  240. };
  241. static int __devinit au1xpsc_i2s_drvprobe(struct platform_device *pdev)
  242. {
  243. struct resource *r;
  244. unsigned long sel;
  245. int ret;
  246. struct au1xpsc_audio_data *wd;
  247. wd = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL);
  248. if (!wd)
  249. return -ENOMEM;
  250. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  251. if (!r) {
  252. ret = -ENODEV;
  253. goto out0;
  254. }
  255. ret = -EBUSY;
  256. if (!request_mem_region(r->start, resource_size(r), pdev->name))
  257. goto out0;
  258. wd->mmio = ioremap(r->start, resource_size(r));
  259. if (!wd->mmio)
  260. goto out1;
  261. /* preserve PSC clock source set up by platform (dev.platform_data
  262. * is already occupied by soc layer)
  263. */
  264. sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
  265. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  266. au_sync();
  267. au_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(wd));
  268. au_writel(0, I2S_CFG(wd));
  269. au_sync();
  270. /* preconfigure: set max rx/tx fifo depths */
  271. wd->cfg |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8;
  272. /* don't wait for I2S core to become ready now; clocks may not
  273. * be running yet; depending on clock input for PSC a wait might
  274. * time out.
  275. */
  276. /* name the DAI like this device instance ("au1xpsc-i2s.PSCINDEX") */
  277. memcpy(&wd->dai_drv, &au1xpsc_i2s_dai_template,
  278. sizeof(struct snd_soc_dai_driver));
  279. wd->dai_drv.name = dev_name(&pdev->dev);
  280. platform_set_drvdata(pdev, wd);
  281. ret = snd_soc_register_dai(&pdev->dev, &wd->dai_drv);
  282. if (ret)
  283. goto out1;
  284. /* finally add the DMA device for this PSC */
  285. wd->dmapd = au1xpsc_pcm_add(pdev);
  286. if (wd->dmapd)
  287. return 0;
  288. snd_soc_unregister_dai(&pdev->dev);
  289. out1:
  290. release_mem_region(r->start, resource_size(r));
  291. out0:
  292. kfree(wd);
  293. return ret;
  294. }
  295. static int __devexit au1xpsc_i2s_drvremove(struct platform_device *pdev)
  296. {
  297. struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
  298. struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  299. if (wd->dmapd)
  300. au1xpsc_pcm_destroy(wd->dmapd);
  301. snd_soc_unregister_dai(&pdev->dev);
  302. au_writel(0, I2S_CFG(wd));
  303. au_sync();
  304. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  305. au_sync();
  306. iounmap(wd->mmio);
  307. release_mem_region(r->start, resource_size(r));
  308. kfree(wd);
  309. return 0;
  310. }
  311. #ifdef CONFIG_PM
  312. static int au1xpsc_i2s_drvsuspend(struct device *dev)
  313. {
  314. struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
  315. /* save interesting register and disable PSC */
  316. wd->pm[0] = au_readl(PSC_SEL(wd));
  317. au_writel(0, I2S_CFG(wd));
  318. au_sync();
  319. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  320. au_sync();
  321. return 0;
  322. }
  323. static int au1xpsc_i2s_drvresume(struct device *dev)
  324. {
  325. struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
  326. /* select I2S mode and PSC clock */
  327. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  328. au_sync();
  329. au_writel(0, PSC_SEL(wd));
  330. au_sync();
  331. au_writel(wd->pm[0], PSC_SEL(wd));
  332. au_sync();
  333. return 0;
  334. }
  335. static struct dev_pm_ops au1xpsci2s_pmops = {
  336. .suspend = au1xpsc_i2s_drvsuspend,
  337. .resume = au1xpsc_i2s_drvresume,
  338. };
  339. #define AU1XPSCI2S_PMOPS &au1xpsci2s_pmops
  340. #else
  341. #define AU1XPSCI2S_PMOPS NULL
  342. #endif
  343. static struct platform_driver au1xpsc_i2s_driver = {
  344. .driver = {
  345. .name = "au1xpsc_i2s",
  346. .owner = THIS_MODULE,
  347. .pm = AU1XPSCI2S_PMOPS,
  348. },
  349. .probe = au1xpsc_i2s_drvprobe,
  350. .remove = __devexit_p(au1xpsc_i2s_drvremove),
  351. };
  352. static int __init au1xpsc_i2s_load(void)
  353. {
  354. return platform_driver_register(&au1xpsc_i2s_driver);
  355. }
  356. static void __exit au1xpsc_i2s_unload(void)
  357. {
  358. platform_driver_unregister(&au1xpsc_i2s_driver);
  359. }
  360. module_init(au1xpsc_i2s_load);
  361. module_exit(au1xpsc_i2s_unload);
  362. MODULE_LICENSE("GPL");
  363. MODULE_DESCRIPTION("Au12x0/Au1550 PSC I2S ALSA ASoC audio driver");
  364. MODULE_AUTHOR("Manuel Lauss");