dbdma2.c 11 KB

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  1. /*
  2. * Au12x0/Au1550 PSC ALSA ASoC audio support.
  3. *
  4. * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
  5. * Manuel Lauss <manuel.lauss@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * DMA glue for Au1x-PSC audio.
  12. *
  13. */
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/dma-mapping.h>
  19. #include <sound/core.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/soc.h>
  23. #include <asm/mach-au1x00/au1000.h>
  24. #include <asm/mach-au1x00/au1xxx_dbdma.h>
  25. #include <asm/mach-au1x00/au1xxx_psc.h>
  26. #include "psc.h"
  27. /*#define PCM_DEBUG*/
  28. #define MSG(x...) printk(KERN_INFO "au1xpsc_pcm: " x)
  29. #ifdef PCM_DEBUG
  30. #define DBG MSG
  31. #else
  32. #define DBG(x...) do {} while (0)
  33. #endif
  34. struct au1xpsc_audio_dmadata {
  35. /* DDMA control data */
  36. unsigned int ddma_id; /* DDMA direction ID for this PSC */
  37. u32 ddma_chan; /* DDMA context */
  38. /* PCM context (for irq handlers) */
  39. struct snd_pcm_substream *substream;
  40. unsigned long curr_period; /* current segment DDMA is working on */
  41. unsigned long q_period; /* queue period(s) */
  42. dma_addr_t dma_area; /* address of queued DMA area */
  43. dma_addr_t dma_area_s; /* start address of DMA area */
  44. unsigned long pos; /* current byte position being played */
  45. unsigned long periods; /* number of SG segments in total */
  46. unsigned long period_bytes; /* size in bytes of one SG segment */
  47. /* runtime data */
  48. int msbits;
  49. };
  50. /*
  51. * These settings are somewhat okay, at least on my machine audio plays
  52. * almost skip-free. Especially the 64kB buffer seems to help a LOT.
  53. */
  54. #define AU1XPSC_PERIOD_MIN_BYTES 1024
  55. #define AU1XPSC_BUFFER_MIN_BYTES 65536
  56. #define AU1XPSC_PCM_FMTS \
  57. (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \
  58. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
  59. SNDRV_PCM_FMTBIT_U16_LE | SNDRV_PCM_FMTBIT_U16_BE | \
  60. SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE | \
  61. SNDRV_PCM_FMTBIT_U32_LE | SNDRV_PCM_FMTBIT_U32_BE | \
  62. 0)
  63. /* PCM hardware DMA capabilities - platform specific */
  64. static const struct snd_pcm_hardware au1xpsc_pcm_hardware = {
  65. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  66. SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BATCH,
  67. .formats = AU1XPSC_PCM_FMTS,
  68. .period_bytes_min = AU1XPSC_PERIOD_MIN_BYTES,
  69. .period_bytes_max = 4096 * 1024 - 1,
  70. .periods_min = 2,
  71. .periods_max = 4096, /* 2 to as-much-as-you-like */
  72. .buffer_bytes_max = 4096 * 1024 - 1,
  73. .fifo_size = 16, /* fifo entries of AC97/I2S PSC */
  74. };
  75. static void au1x_pcm_queue_tx(struct au1xpsc_audio_dmadata *cd)
  76. {
  77. au1xxx_dbdma_put_source(cd->ddma_chan, cd->dma_area,
  78. cd->period_bytes, DDMA_FLAGS_IE);
  79. /* update next-to-queue period */
  80. ++cd->q_period;
  81. cd->dma_area += cd->period_bytes;
  82. if (cd->q_period >= cd->periods) {
  83. cd->q_period = 0;
  84. cd->dma_area = cd->dma_area_s;
  85. }
  86. }
  87. static void au1x_pcm_queue_rx(struct au1xpsc_audio_dmadata *cd)
  88. {
  89. au1xxx_dbdma_put_dest(cd->ddma_chan, cd->dma_area,
  90. cd->period_bytes, DDMA_FLAGS_IE);
  91. /* update next-to-queue period */
  92. ++cd->q_period;
  93. cd->dma_area += cd->period_bytes;
  94. if (cd->q_period >= cd->periods) {
  95. cd->q_period = 0;
  96. cd->dma_area = cd->dma_area_s;
  97. }
  98. }
  99. static void au1x_pcm_dmatx_cb(int irq, void *dev_id)
  100. {
  101. struct au1xpsc_audio_dmadata *cd = dev_id;
  102. cd->pos += cd->period_bytes;
  103. if (++cd->curr_period >= cd->periods) {
  104. cd->pos = 0;
  105. cd->curr_period = 0;
  106. }
  107. snd_pcm_period_elapsed(cd->substream);
  108. au1x_pcm_queue_tx(cd);
  109. }
  110. static void au1x_pcm_dmarx_cb(int irq, void *dev_id)
  111. {
  112. struct au1xpsc_audio_dmadata *cd = dev_id;
  113. cd->pos += cd->period_bytes;
  114. if (++cd->curr_period >= cd->periods) {
  115. cd->pos = 0;
  116. cd->curr_period = 0;
  117. }
  118. snd_pcm_period_elapsed(cd->substream);
  119. au1x_pcm_queue_rx(cd);
  120. }
  121. static void au1x_pcm_dbdma_free(struct au1xpsc_audio_dmadata *pcd)
  122. {
  123. if (pcd->ddma_chan) {
  124. au1xxx_dbdma_stop(pcd->ddma_chan);
  125. au1xxx_dbdma_reset(pcd->ddma_chan);
  126. au1xxx_dbdma_chan_free(pcd->ddma_chan);
  127. pcd->ddma_chan = 0;
  128. pcd->msbits = 0;
  129. }
  130. }
  131. /* in case of missing DMA ring or changed TX-source / RX-dest bit widths,
  132. * allocate (or reallocate) a 2-descriptor DMA ring with bit depth according
  133. * to ALSA-supplied sample depth. This is due to limitations in the dbdma api
  134. * (cannot adjust source/dest widths of already allocated descriptor ring).
  135. */
  136. static int au1x_pcm_dbdma_realloc(struct au1xpsc_audio_dmadata *pcd,
  137. int stype, int msbits)
  138. {
  139. /* DMA only in 8/16/32 bit widths */
  140. if (msbits == 24)
  141. msbits = 32;
  142. /* check current config: correct bits and descriptors allocated? */
  143. if ((pcd->ddma_chan) && (msbits == pcd->msbits))
  144. goto out; /* all ok! */
  145. au1x_pcm_dbdma_free(pcd);
  146. if (stype == PCM_RX)
  147. pcd->ddma_chan = au1xxx_dbdma_chan_alloc(pcd->ddma_id,
  148. DSCR_CMD0_ALWAYS,
  149. au1x_pcm_dmarx_cb, (void *)pcd);
  150. else
  151. pcd->ddma_chan = au1xxx_dbdma_chan_alloc(DSCR_CMD0_ALWAYS,
  152. pcd->ddma_id,
  153. au1x_pcm_dmatx_cb, (void *)pcd);
  154. if (!pcd->ddma_chan)
  155. return -ENOMEM;
  156. au1xxx_dbdma_set_devwidth(pcd->ddma_chan, msbits);
  157. au1xxx_dbdma_ring_alloc(pcd->ddma_chan, 2);
  158. pcd->msbits = msbits;
  159. au1xxx_dbdma_stop(pcd->ddma_chan);
  160. au1xxx_dbdma_reset(pcd->ddma_chan);
  161. out:
  162. return 0;
  163. }
  164. static inline struct au1xpsc_audio_dmadata *to_dmadata(struct snd_pcm_substream *ss)
  165. {
  166. struct snd_soc_pcm_runtime *rtd = ss->private_data;
  167. struct au1xpsc_audio_dmadata *pcd =
  168. snd_soc_platform_get_drvdata(rtd->platform);
  169. return &pcd[SUBSTREAM_TYPE(ss)];
  170. }
  171. static int au1xpsc_pcm_hw_params(struct snd_pcm_substream *substream,
  172. struct snd_pcm_hw_params *params)
  173. {
  174. struct snd_pcm_runtime *runtime = substream->runtime;
  175. struct au1xpsc_audio_dmadata *pcd;
  176. int stype, ret;
  177. ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
  178. if (ret < 0)
  179. goto out;
  180. stype = SUBSTREAM_TYPE(substream);
  181. pcd = to_dmadata(substream);
  182. DBG("runtime->dma_area = 0x%08lx dma_addr_t = 0x%08lx dma_size = %d "
  183. "runtime->min_align %d\n",
  184. (unsigned long)runtime->dma_area,
  185. (unsigned long)runtime->dma_addr, runtime->dma_bytes,
  186. runtime->min_align);
  187. DBG("bits %d frags %d frag_bytes %d is_rx %d\n", params->msbits,
  188. params_periods(params), params_period_bytes(params), stype);
  189. ret = au1x_pcm_dbdma_realloc(pcd, stype, params->msbits);
  190. if (ret) {
  191. MSG("DDMA channel (re)alloc failed!\n");
  192. goto out;
  193. }
  194. pcd->substream = substream;
  195. pcd->period_bytes = params_period_bytes(params);
  196. pcd->periods = params_periods(params);
  197. pcd->dma_area_s = pcd->dma_area = runtime->dma_addr;
  198. pcd->q_period = 0;
  199. pcd->curr_period = 0;
  200. pcd->pos = 0;
  201. ret = 0;
  202. out:
  203. return ret;
  204. }
  205. static int au1xpsc_pcm_hw_free(struct snd_pcm_substream *substream)
  206. {
  207. snd_pcm_lib_free_pages(substream);
  208. return 0;
  209. }
  210. static int au1xpsc_pcm_prepare(struct snd_pcm_substream *substream)
  211. {
  212. struct au1xpsc_audio_dmadata *pcd = to_dmadata(substream);
  213. au1xxx_dbdma_reset(pcd->ddma_chan);
  214. if (SUBSTREAM_TYPE(substream) == PCM_RX) {
  215. au1x_pcm_queue_rx(pcd);
  216. au1x_pcm_queue_rx(pcd);
  217. } else {
  218. au1x_pcm_queue_tx(pcd);
  219. au1x_pcm_queue_tx(pcd);
  220. }
  221. return 0;
  222. }
  223. static int au1xpsc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  224. {
  225. u32 c = to_dmadata(substream)->ddma_chan;
  226. switch (cmd) {
  227. case SNDRV_PCM_TRIGGER_START:
  228. case SNDRV_PCM_TRIGGER_RESUME:
  229. au1xxx_dbdma_start(c);
  230. break;
  231. case SNDRV_PCM_TRIGGER_STOP:
  232. case SNDRV_PCM_TRIGGER_SUSPEND:
  233. au1xxx_dbdma_stop(c);
  234. break;
  235. default:
  236. return -EINVAL;
  237. }
  238. return 0;
  239. }
  240. static snd_pcm_uframes_t
  241. au1xpsc_pcm_pointer(struct snd_pcm_substream *substream)
  242. {
  243. return bytes_to_frames(substream->runtime, to_dmadata(substream)->pos);
  244. }
  245. static int au1xpsc_pcm_open(struct snd_pcm_substream *substream)
  246. {
  247. snd_soc_set_runtime_hwparams(substream, &au1xpsc_pcm_hardware);
  248. return 0;
  249. }
  250. static int au1xpsc_pcm_close(struct snd_pcm_substream *substream)
  251. {
  252. au1x_pcm_dbdma_free(to_dmadata(substream));
  253. return 0;
  254. }
  255. static struct snd_pcm_ops au1xpsc_pcm_ops = {
  256. .open = au1xpsc_pcm_open,
  257. .close = au1xpsc_pcm_close,
  258. .ioctl = snd_pcm_lib_ioctl,
  259. .hw_params = au1xpsc_pcm_hw_params,
  260. .hw_free = au1xpsc_pcm_hw_free,
  261. .prepare = au1xpsc_pcm_prepare,
  262. .trigger = au1xpsc_pcm_trigger,
  263. .pointer = au1xpsc_pcm_pointer,
  264. };
  265. static void au1xpsc_pcm_free_dma_buffers(struct snd_pcm *pcm)
  266. {
  267. snd_pcm_lib_preallocate_free_for_all(pcm);
  268. }
  269. static int au1xpsc_pcm_new(struct snd_card *card,
  270. struct snd_soc_dai *dai,
  271. struct snd_pcm *pcm)
  272. {
  273. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  274. card->dev, AU1XPSC_BUFFER_MIN_BYTES, (4096 * 1024) - 1);
  275. return 0;
  276. }
  277. /* au1xpsc audio platform */
  278. struct snd_soc_platform_driver au1xpsc_soc_platform = {
  279. .ops = &au1xpsc_pcm_ops,
  280. .pcm_new = au1xpsc_pcm_new,
  281. .pcm_free = au1xpsc_pcm_free_dma_buffers,
  282. };
  283. static int __devinit au1xpsc_pcm_drvprobe(struct platform_device *pdev)
  284. {
  285. struct au1xpsc_audio_dmadata *dmadata;
  286. struct resource *r;
  287. int ret;
  288. dmadata = kzalloc(2 * sizeof(struct au1xpsc_audio_dmadata), GFP_KERNEL);
  289. if (!dmadata)
  290. return -ENOMEM;
  291. r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  292. if (!r) {
  293. ret = -ENODEV;
  294. goto out1;
  295. }
  296. dmadata[PCM_TX].ddma_id = r->start;
  297. /* RX DMA */
  298. r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  299. if (!r) {
  300. ret = -ENODEV;
  301. goto out1;
  302. }
  303. dmadata[PCM_RX].ddma_id = r->start;
  304. platform_set_drvdata(pdev, dmadata);
  305. ret = snd_soc_register_platform(&pdev->dev, &au1xpsc_soc_platform);
  306. if (!ret)
  307. return ret;
  308. out1:
  309. kfree(dmadata);
  310. return ret;
  311. }
  312. static int __devexit au1xpsc_pcm_drvremove(struct platform_device *pdev)
  313. {
  314. struct au1xpsc_audio_dmadata *dmadata = platform_get_drvdata(pdev);
  315. snd_soc_unregister_platform(&pdev->dev);
  316. kfree(dmadata);
  317. return 0;
  318. }
  319. static struct platform_driver au1xpsc_pcm_driver = {
  320. .driver = {
  321. .name = "au1xpsc-pcm",
  322. .owner = THIS_MODULE,
  323. },
  324. .probe = au1xpsc_pcm_drvprobe,
  325. .remove = __devexit_p(au1xpsc_pcm_drvremove),
  326. };
  327. static int __init au1xpsc_audio_dbdma_load(void)
  328. {
  329. return platform_driver_register(&au1xpsc_pcm_driver);
  330. }
  331. static void __exit au1xpsc_audio_dbdma_unload(void)
  332. {
  333. platform_driver_unregister(&au1xpsc_pcm_driver);
  334. }
  335. module_init(au1xpsc_audio_dbdma_load);
  336. module_exit(au1xpsc_audio_dbdma_unload);
  337. struct platform_device *au1xpsc_pcm_add(struct platform_device *pdev)
  338. {
  339. struct resource *res, *r;
  340. struct platform_device *pd;
  341. int id[2];
  342. int ret;
  343. r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  344. if (!r)
  345. return NULL;
  346. id[0] = r->start;
  347. r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  348. if (!r)
  349. return NULL;
  350. id[1] = r->start;
  351. res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
  352. if (!res)
  353. return NULL;
  354. res[0].start = res[0].end = id[0];
  355. res[1].start = res[1].end = id[1];
  356. res[0].flags = res[1].flags = IORESOURCE_DMA;
  357. pd = platform_device_alloc("au1xpsc-pcm", pdev->id);
  358. if (!pd)
  359. goto out;
  360. pd->resource = res;
  361. pd->num_resources = 2;
  362. ret = platform_device_add(pd);
  363. if (!ret)
  364. return pd;
  365. platform_device_put(pd);
  366. out:
  367. kfree(res);
  368. return NULL;
  369. }
  370. EXPORT_SYMBOL_GPL(au1xpsc_pcm_add);
  371. void au1xpsc_pcm_destroy(struct platform_device *dmapd)
  372. {
  373. if (dmapd)
  374. platform_device_unregister(dmapd);
  375. }
  376. EXPORT_SYMBOL_GPL(au1xpsc_pcm_destroy);
  377. MODULE_LICENSE("GPL");
  378. MODULE_DESCRIPTION("Au12x0/Au1550 PSC Audio DMA driver");
  379. MODULE_AUTHOR("Manuel Lauss");