ehci-octeon.c 4.6 KB

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  1. /*
  2. * EHCI HCD glue for Cavium Octeon II SOCs.
  3. *
  4. * Loosely based on ehci-au1xxx.c
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. *
  10. * Copyright (C) 2010 Cavium Networks
  11. *
  12. */
  13. #include <linux/platform_device.h>
  14. #include <asm/octeon/octeon.h>
  15. #include <asm/octeon/cvmx-uctlx-defs.h>
  16. #define OCTEON_EHCI_HCD_NAME "octeon-ehci"
  17. /* Common clock init code. */
  18. void octeon2_usb_clocks_start(void);
  19. void octeon2_usb_clocks_stop(void);
  20. static void ehci_octeon_start(void)
  21. {
  22. union cvmx_uctlx_ehci_ctl ehci_ctl;
  23. octeon2_usb_clocks_start();
  24. ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0));
  25. /* Use 64-bit addressing. */
  26. ehci_ctl.s.ehci_64b_addr_en = 1;
  27. ehci_ctl.s.l2c_addr_msb = 0;
  28. ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
  29. ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
  30. cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64);
  31. }
  32. static void ehci_octeon_stop(void)
  33. {
  34. octeon2_usb_clocks_stop();
  35. }
  36. static const struct hc_driver ehci_octeon_hc_driver = {
  37. .description = hcd_name,
  38. .product_desc = "Octeon EHCI",
  39. .hcd_priv_size = sizeof(struct ehci_hcd),
  40. /*
  41. * generic hardware linkage
  42. */
  43. .irq = ehci_irq,
  44. .flags = HCD_MEMORY | HCD_USB2,
  45. /*
  46. * basic lifecycle operations
  47. */
  48. .reset = ehci_init,
  49. .start = ehci_run,
  50. .stop = ehci_stop,
  51. .shutdown = ehci_shutdown,
  52. /*
  53. * managing i/o requests and associated device resources
  54. */
  55. .urb_enqueue = ehci_urb_enqueue,
  56. .urb_dequeue = ehci_urb_dequeue,
  57. .endpoint_disable = ehci_endpoint_disable,
  58. .endpoint_reset = ehci_endpoint_reset,
  59. /*
  60. * scheduling support
  61. */
  62. .get_frame_number = ehci_get_frame,
  63. /*
  64. * root hub support
  65. */
  66. .hub_status_data = ehci_hub_status_data,
  67. .hub_control = ehci_hub_control,
  68. .bus_suspend = ehci_bus_suspend,
  69. .bus_resume = ehci_bus_resume,
  70. .relinquish_port = ehci_relinquish_port,
  71. .port_handed_over = ehci_port_handed_over,
  72. .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
  73. };
  74. static u64 ehci_octeon_dma_mask = DMA_BIT_MASK(64);
  75. static int ehci_octeon_drv_probe(struct platform_device *pdev)
  76. {
  77. struct usb_hcd *hcd;
  78. struct ehci_hcd *ehci;
  79. struct resource *res_mem;
  80. int irq;
  81. int ret;
  82. if (usb_disabled())
  83. return -ENODEV;
  84. irq = platform_get_irq(pdev, 0);
  85. if (irq < 0) {
  86. dev_err(&pdev->dev, "No irq assigned\n");
  87. return -ENODEV;
  88. }
  89. res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  90. if (res_mem == NULL) {
  91. dev_err(&pdev->dev, "No register space assigned\n");
  92. return -ENODEV;
  93. }
  94. /*
  95. * We can DMA from anywhere. But the descriptors must be in
  96. * the lower 4GB.
  97. */
  98. pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
  99. pdev->dev.dma_mask = &ehci_octeon_dma_mask;
  100. hcd = usb_create_hcd(&ehci_octeon_hc_driver, &pdev->dev, "octeon");
  101. if (!hcd)
  102. return -ENOMEM;
  103. hcd->rsrc_start = res_mem->start;
  104. hcd->rsrc_len = res_mem->end - res_mem->start + 1;
  105. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
  106. OCTEON_EHCI_HCD_NAME)) {
  107. dev_err(&pdev->dev, "request_mem_region failed\n");
  108. ret = -EBUSY;
  109. goto err1;
  110. }
  111. hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
  112. if (!hcd->regs) {
  113. dev_err(&pdev->dev, "ioremap failed\n");
  114. ret = -ENOMEM;
  115. goto err2;
  116. }
  117. ehci_octeon_start();
  118. ehci = hcd_to_ehci(hcd);
  119. /* Octeon EHCI matches CPU endianness. */
  120. #ifdef __BIG_ENDIAN
  121. ehci->big_endian_mmio = 1;
  122. #endif
  123. ehci->caps = hcd->regs;
  124. ehci->regs = hcd->regs +
  125. HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
  126. /* cache this readonly data; minimize chip reads */
  127. ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
  128. ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
  129. if (ret) {
  130. dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret);
  131. goto err3;
  132. }
  133. platform_set_drvdata(pdev, hcd);
  134. /* root ports should always stay powered */
  135. ehci_port_power(ehci, 1);
  136. return 0;
  137. err3:
  138. ehci_octeon_stop();
  139. iounmap(hcd->regs);
  140. err2:
  141. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  142. err1:
  143. usb_put_hcd(hcd);
  144. return ret;
  145. }
  146. static int ehci_octeon_drv_remove(struct platform_device *pdev)
  147. {
  148. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  149. usb_remove_hcd(hcd);
  150. ehci_octeon_stop();
  151. iounmap(hcd->regs);
  152. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  153. usb_put_hcd(hcd);
  154. platform_set_drvdata(pdev, NULL);
  155. return 0;
  156. }
  157. static struct platform_driver ehci_octeon_driver = {
  158. .probe = ehci_octeon_drv_probe,
  159. .remove = ehci_octeon_drv_remove,
  160. .shutdown = usb_hcd_platform_shutdown,
  161. .driver = {
  162. .name = OCTEON_EHCI_HCD_NAME,
  163. .owner = THIS_MODULE,
  164. }
  165. };
  166. MODULE_ALIAS("platform:" OCTEON_EHCI_HCD_NAME);