nsp32.c 89 KB

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  1. /*
  2. * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
  3. * Copyright (C) 2001, 2002, 2003
  4. * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
  5. * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. *
  18. * Revision History:
  19. * 1.0: Initial Release.
  20. * 1.1: Add /proc SDTR status.
  21. * Remove obsolete error handler nsp32_reset.
  22. * Some clean up.
  23. * 1.2: PowerPC (big endian) support.
  24. */
  25. #include <linux/module.h>
  26. #include <linux/init.h>
  27. #include <linux/kernel.h>
  28. #include <linux/string.h>
  29. #include <linux/timer.h>
  30. #include <linux/ioport.h>
  31. #include <linux/major.h>
  32. #include <linux/blkdev.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/pci.h>
  35. #include <linux/delay.h>
  36. #include <linux/ctype.h>
  37. #include <linux/dma-mapping.h>
  38. #include <asm/dma.h>
  39. #include <asm/system.h>
  40. #include <asm/io.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_ioctl.h>
  46. #include "nsp32.h"
  47. /***********************************************************************
  48. * Module parameters
  49. */
  50. static int trans_mode = 0; /* default: BIOS */
  51. module_param (trans_mode, int, 0);
  52. MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  53. #define ASYNC_MODE 1
  54. #define ULTRA20M_MODE 2
  55. static int auto_param = 0; /* default: ON */
  56. module_param (auto_param, bool, 0);
  57. MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  58. static int disc_priv = 1; /* default: OFF */
  59. module_param (disc_priv, bool, 0);
  60. MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
  61. MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
  62. MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  63. MODULE_LICENSE("GPL");
  64. static const char *nsp32_release_version = "1.2";
  65. /****************************************************************************
  66. * Supported hardware
  67. */
  68. static struct pci_device_id nsp32_pci_table[] __devinitdata = {
  69. {
  70. .vendor = PCI_VENDOR_ID_IODATA,
  71. .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  72. .subvendor = PCI_ANY_ID,
  73. .subdevice = PCI_ANY_ID,
  74. .driver_data = MODEL_IODATA,
  75. },
  76. {
  77. .vendor = PCI_VENDOR_ID_WORKBIT,
  78. .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  79. .subvendor = PCI_ANY_ID,
  80. .subdevice = PCI_ANY_ID,
  81. .driver_data = MODEL_KME,
  82. },
  83. {
  84. .vendor = PCI_VENDOR_ID_WORKBIT,
  85. .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  86. .subvendor = PCI_ANY_ID,
  87. .subdevice = PCI_ANY_ID,
  88. .driver_data = MODEL_WORKBIT,
  89. },
  90. {
  91. .vendor = PCI_VENDOR_ID_WORKBIT,
  92. .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
  93. .subvendor = PCI_ANY_ID,
  94. .subdevice = PCI_ANY_ID,
  95. .driver_data = MODEL_PCI_WORKBIT,
  96. },
  97. {
  98. .vendor = PCI_VENDOR_ID_WORKBIT,
  99. .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
  100. .subvendor = PCI_ANY_ID,
  101. .subdevice = PCI_ANY_ID,
  102. .driver_data = MODEL_LOGITEC,
  103. },
  104. {
  105. .vendor = PCI_VENDOR_ID_WORKBIT,
  106. .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
  107. .subvendor = PCI_ANY_ID,
  108. .subdevice = PCI_ANY_ID,
  109. .driver_data = MODEL_PCI_LOGITEC,
  110. },
  111. {
  112. .vendor = PCI_VENDOR_ID_WORKBIT,
  113. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
  114. .subvendor = PCI_ANY_ID,
  115. .subdevice = PCI_ANY_ID,
  116. .driver_data = MODEL_PCI_MELCO,
  117. },
  118. {
  119. .vendor = PCI_VENDOR_ID_WORKBIT,
  120. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
  121. .subvendor = PCI_ANY_ID,
  122. .subdevice = PCI_ANY_ID,
  123. .driver_data = MODEL_PCI_MELCO,
  124. },
  125. {0,0,},
  126. };
  127. MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
  128. static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
  129. /*
  130. * Period/AckWidth speed conversion table
  131. *
  132. * Note: This period/ackwidth speed table must be in descending order.
  133. */
  134. static nsp32_sync_table nsp32_sync_table_40M[] = {
  135. /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
  136. {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
  137. {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
  138. {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  139. {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
  140. {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
  141. {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
  142. {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  143. {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
  144. {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  145. };
  146. static nsp32_sync_table nsp32_sync_table_20M[] = {
  147. {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  148. {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
  149. {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  150. {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  151. {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
  152. {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
  153. {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
  154. {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
  155. {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
  156. };
  157. static nsp32_sync_table nsp32_sync_table_pci[] = {
  158. {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
  159. {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
  160. {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
  161. {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
  162. {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
  163. {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
  164. {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
  165. {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
  166. {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
  167. };
  168. /*
  169. * function declaration
  170. */
  171. /* module entry point */
  172. static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
  173. static void __devexit nsp32_remove(struct pci_dev *);
  174. static int __init init_nsp32 (void);
  175. static void __exit exit_nsp32 (void);
  176. /* struct struct scsi_host_template */
  177. static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
  178. static int nsp32_detect (struct pci_dev *pdev);
  179. static int nsp32_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
  180. static const char *nsp32_info (struct Scsi_Host *);
  181. static int nsp32_release (struct Scsi_Host *);
  182. /* SCSI error handler */
  183. static int nsp32_eh_abort (struct scsi_cmnd *);
  184. static int nsp32_eh_bus_reset (struct scsi_cmnd *);
  185. static int nsp32_eh_host_reset(struct scsi_cmnd *);
  186. /* generate SCSI message */
  187. static void nsp32_build_identify(struct scsi_cmnd *);
  188. static void nsp32_build_nop (struct scsi_cmnd *);
  189. static void nsp32_build_reject (struct scsi_cmnd *);
  190. static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
  191. /* SCSI message handler */
  192. static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
  193. static void nsp32_msgout_occur (struct scsi_cmnd *);
  194. static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
  195. static int nsp32_setup_sg_table (struct scsi_cmnd *);
  196. static int nsp32_selection_autopara(struct scsi_cmnd *);
  197. static int nsp32_selection_autoscsi(struct scsi_cmnd *);
  198. static void nsp32_scsi_done (struct scsi_cmnd *);
  199. static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
  200. static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
  201. static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
  202. static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
  203. /* SCSI SDTR */
  204. static void nsp32_analyze_sdtr (struct scsi_cmnd *);
  205. static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
  206. static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
  207. static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
  208. static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
  209. /* SCSI bus status handler */
  210. static void nsp32_wait_req (nsp32_hw_data *, int);
  211. static void nsp32_wait_sack (nsp32_hw_data *, int);
  212. static void nsp32_sack_assert (nsp32_hw_data *);
  213. static void nsp32_sack_negate (nsp32_hw_data *);
  214. static void nsp32_do_bus_reset(nsp32_hw_data *);
  215. /* hardware interrupt handler */
  216. static irqreturn_t do_nsp32_isr(int, void *);
  217. /* initialize hardware */
  218. static int nsp32hw_init(nsp32_hw_data *);
  219. /* EEPROM handler */
  220. static int nsp32_getprom_param (nsp32_hw_data *);
  221. static int nsp32_getprom_at24 (nsp32_hw_data *);
  222. static int nsp32_getprom_c16 (nsp32_hw_data *);
  223. static void nsp32_prom_start (nsp32_hw_data *);
  224. static void nsp32_prom_stop (nsp32_hw_data *);
  225. static int nsp32_prom_read (nsp32_hw_data *, int);
  226. static int nsp32_prom_read_bit (nsp32_hw_data *);
  227. static void nsp32_prom_write_bit(nsp32_hw_data *, int);
  228. static void nsp32_prom_set (nsp32_hw_data *, int, int);
  229. static int nsp32_prom_get (nsp32_hw_data *, int);
  230. /* debug/warning/info message */
  231. static void nsp32_message (const char *, int, char *, char *, ...);
  232. #ifdef NSP32_DEBUG
  233. static void nsp32_dmessage(const char *, int, int, char *, ...);
  234. #endif
  235. /*
  236. * max_sectors is currently limited up to 128.
  237. */
  238. static struct scsi_host_template nsp32_template = {
  239. .proc_name = "nsp32",
  240. .name = "Workbit NinjaSCSI-32Bi/UDE",
  241. .proc_info = nsp32_proc_info,
  242. .info = nsp32_info,
  243. .queuecommand = nsp32_queuecommand,
  244. .can_queue = 1,
  245. .sg_tablesize = NSP32_SG_SIZE,
  246. .max_sectors = 128,
  247. .cmd_per_lun = 1,
  248. .this_id = NSP32_HOST_SCSIID,
  249. .use_clustering = DISABLE_CLUSTERING,
  250. .eh_abort_handler = nsp32_eh_abort,
  251. .eh_bus_reset_handler = nsp32_eh_bus_reset,
  252. .eh_host_reset_handler = nsp32_eh_host_reset,
  253. /* .highmem_io = 1, */
  254. };
  255. #include "nsp32_io.h"
  256. /***********************************************************************
  257. * debug, error print
  258. */
  259. #ifndef NSP32_DEBUG
  260. # define NSP32_DEBUG_MASK 0x000000
  261. # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
  262. # define nsp32_dbg(mask, args...) /* */
  263. #else
  264. # define NSP32_DEBUG_MASK 0xffffff
  265. # define nsp32_msg(type, args...) \
  266. nsp32_message (__func__, __LINE__, (type), args)
  267. # define nsp32_dbg(mask, args...) \
  268. nsp32_dmessage(__func__, __LINE__, (mask), args)
  269. #endif
  270. #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
  271. #define NSP32_DEBUG_REGISTER BIT(1)
  272. #define NSP32_DEBUG_AUTOSCSI BIT(2)
  273. #define NSP32_DEBUG_INTR BIT(3)
  274. #define NSP32_DEBUG_SGLIST BIT(4)
  275. #define NSP32_DEBUG_BUSFREE BIT(5)
  276. #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
  277. #define NSP32_DEBUG_RESELECTION BIT(7)
  278. #define NSP32_DEBUG_MSGINOCCUR BIT(8)
  279. #define NSP32_DEBUG_EEPROM BIT(9)
  280. #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
  281. #define NSP32_DEBUG_BUSRESET BIT(11)
  282. #define NSP32_DEBUG_RESTART BIT(12)
  283. #define NSP32_DEBUG_SYNC BIT(13)
  284. #define NSP32_DEBUG_WAIT BIT(14)
  285. #define NSP32_DEBUG_TARGETFLAG BIT(15)
  286. #define NSP32_DEBUG_PROC BIT(16)
  287. #define NSP32_DEBUG_INIT BIT(17)
  288. #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
  289. #define NSP32_DEBUG_BUF_LEN 100
  290. static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
  291. {
  292. va_list args;
  293. char buf[NSP32_DEBUG_BUF_LEN];
  294. va_start(args, fmt);
  295. vsnprintf(buf, sizeof(buf), fmt, args);
  296. va_end(args);
  297. #ifndef NSP32_DEBUG
  298. printk("%snsp32: %s\n", type, buf);
  299. #else
  300. printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
  301. #endif
  302. }
  303. #ifdef NSP32_DEBUG
  304. static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
  305. {
  306. va_list args;
  307. char buf[NSP32_DEBUG_BUF_LEN];
  308. va_start(args, fmt);
  309. vsnprintf(buf, sizeof(buf), fmt, args);
  310. va_end(args);
  311. if (mask & NSP32_DEBUG_MASK) {
  312. printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  313. }
  314. }
  315. #endif
  316. #ifdef NSP32_DEBUG
  317. # include "nsp32_debug.c"
  318. #else
  319. # define show_command(arg) /* */
  320. # define show_busphase(arg) /* */
  321. # define show_autophase(arg) /* */
  322. #endif
  323. /*
  324. * IDENTIFY Message
  325. */
  326. static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
  327. {
  328. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  329. int pos = data->msgout_len;
  330. int mode = FALSE;
  331. /* XXX: Auto DiscPriv detection is progressing... */
  332. if (disc_priv == 0) {
  333. /* mode = TRUE; */
  334. }
  335. data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
  336. data->msgout_len = pos;
  337. }
  338. /*
  339. * SDTR Message Routine
  340. */
  341. static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
  342. unsigned char period,
  343. unsigned char offset)
  344. {
  345. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  346. int pos = data->msgout_len;
  347. data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
  348. data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
  349. data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
  350. data->msgoutbuf[pos] = period; pos++;
  351. data->msgoutbuf[pos] = offset; pos++;
  352. data->msgout_len = pos;
  353. }
  354. /*
  355. * No Operation Message
  356. */
  357. static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
  358. {
  359. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  360. int pos = data->msgout_len;
  361. if (pos != 0) {
  362. nsp32_msg(KERN_WARNING,
  363. "Some messages are already contained!");
  364. return;
  365. }
  366. data->msgoutbuf[pos] = NOP; pos++;
  367. data->msgout_len = pos;
  368. }
  369. /*
  370. * Reject Message
  371. */
  372. static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
  373. {
  374. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  375. int pos = data->msgout_len;
  376. data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
  377. data->msgout_len = pos;
  378. }
  379. /*
  380. * timer
  381. */
  382. #if 0
  383. static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
  384. {
  385. unsigned int base = SCpnt->host->io_port;
  386. nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
  387. if (time & (~TIMER_CNT_MASK)) {
  388. nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
  389. }
  390. nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
  391. }
  392. #endif
  393. /*
  394. * set SCSI command and other parameter to asic, and start selection phase
  395. */
  396. static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
  397. {
  398. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  399. unsigned int base = SCpnt->device->host->io_port;
  400. unsigned int host_id = SCpnt->device->host->this_id;
  401. unsigned char target = scmd_id(SCpnt);
  402. nsp32_autoparam *param = data->autoparam;
  403. unsigned char phase;
  404. int i, ret;
  405. unsigned int msgout;
  406. u16_le s;
  407. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  408. /*
  409. * check bus free
  410. */
  411. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  412. if (phase != BUSMON_BUS_FREE) {
  413. nsp32_msg(KERN_WARNING, "bus busy");
  414. show_busphase(phase & BUSMON_PHASE_MASK);
  415. SCpnt->result = DID_BUS_BUSY << 16;
  416. return FALSE;
  417. }
  418. /*
  419. * message out
  420. *
  421. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  422. * over 3 messages needs another routine.
  423. */
  424. if (data->msgout_len == 0) {
  425. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  426. SCpnt->result = DID_ERROR << 16;
  427. return FALSE;
  428. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  429. msgout = 0;
  430. for (i = 0; i < data->msgout_len; i++) {
  431. /*
  432. * the sending order of the message is:
  433. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  434. * MCNT 2: MSG#1 -> MSG#2
  435. * MCNT 1: MSG#2
  436. */
  437. msgout >>= 8;
  438. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  439. }
  440. msgout |= MV_VALID; /* MV valid */
  441. msgout |= (unsigned int)data->msgout_len; /* len */
  442. } else {
  443. /* data->msgout_len > 3 */
  444. msgout = 0;
  445. }
  446. // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
  447. // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  448. /*
  449. * setup asic parameter
  450. */
  451. memset(param, 0, sizeof(nsp32_autoparam));
  452. /* cdb */
  453. for (i = 0; i < SCpnt->cmd_len; i++) {
  454. param->cdb[4 * i] = SCpnt->cmnd[i];
  455. }
  456. /* outgoing messages */
  457. param->msgout = cpu_to_le32(msgout);
  458. /* syncreg, ackwidth, target id, SREQ sampling rate */
  459. param->syncreg = data->cur_target->syncreg;
  460. param->ackwidth = data->cur_target->ackwidth;
  461. param->target_id = BIT(host_id) | BIT(target);
  462. param->sample_reg = data->cur_target->sample_reg;
  463. // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
  464. /* command control */
  465. param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
  466. AUTOSCSI_START |
  467. AUTO_MSGIN_00_OR_04 |
  468. AUTO_MSGIN_02 |
  469. AUTO_ATN );
  470. /* transfer control */
  471. s = 0;
  472. switch (data->trans_method) {
  473. case NSP32_TRANSFER_BUSMASTER:
  474. s |= BM_START;
  475. break;
  476. case NSP32_TRANSFER_MMIO:
  477. s |= CB_MMIO_MODE;
  478. break;
  479. case NSP32_TRANSFER_PIO:
  480. s |= CB_IO_MODE;
  481. break;
  482. default:
  483. nsp32_msg(KERN_ERR, "unknown trans_method");
  484. break;
  485. }
  486. /*
  487. * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
  488. * For bus master transfer, it's taken off.
  489. */
  490. s |= (TRANSFER_GO | ALL_COUNTER_CLR);
  491. param->transfer_control = cpu_to_le16(s);
  492. /* sg table addr */
  493. param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
  494. /*
  495. * transfer parameter to ASIC
  496. */
  497. nsp32_write4(base, SGT_ADR, data->auto_paddr);
  498. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
  499. AUTO_PARAMETER );
  500. /*
  501. * Check arbitration
  502. */
  503. ret = nsp32_arbitration(SCpnt, base);
  504. return ret;
  505. }
  506. /*
  507. * Selection with AUTO SCSI (without AUTO PARAMETER)
  508. */
  509. static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
  510. {
  511. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  512. unsigned int base = SCpnt->device->host->io_port;
  513. unsigned int host_id = SCpnt->device->host->this_id;
  514. unsigned char target = scmd_id(SCpnt);
  515. unsigned char phase;
  516. int status;
  517. unsigned short command = 0;
  518. unsigned int msgout = 0;
  519. unsigned short execph;
  520. int i;
  521. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  522. /*
  523. * IRQ disable
  524. */
  525. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  526. /*
  527. * check bus line
  528. */
  529. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  530. if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
  531. nsp32_msg(KERN_WARNING, "bus busy");
  532. SCpnt->result = DID_BUS_BUSY << 16;
  533. status = 1;
  534. goto out;
  535. }
  536. /*
  537. * clear execph
  538. */
  539. execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  540. /*
  541. * clear FIFO counter to set CDBs
  542. */
  543. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
  544. /*
  545. * set CDB0 - CDB15
  546. */
  547. for (i = 0; i < SCpnt->cmd_len; i++) {
  548. nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
  549. }
  550. nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
  551. /*
  552. * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
  553. */
  554. nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
  555. /*
  556. * set SCSI MSGOUT REG
  557. *
  558. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  559. * over 3 messages needs another routine.
  560. */
  561. if (data->msgout_len == 0) {
  562. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  563. SCpnt->result = DID_ERROR << 16;
  564. status = 1;
  565. goto out;
  566. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  567. msgout = 0;
  568. for (i = 0; i < data->msgout_len; i++) {
  569. /*
  570. * the sending order of the message is:
  571. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  572. * MCNT 2: MSG#1 -> MSG#2
  573. * MCNT 1: MSG#2
  574. */
  575. msgout >>= 8;
  576. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  577. }
  578. msgout |= MV_VALID; /* MV valid */
  579. msgout |= (unsigned int)data->msgout_len; /* len */
  580. nsp32_write4(base, SCSI_MSG_OUT, msgout);
  581. } else {
  582. /* data->msgout_len > 3 */
  583. nsp32_write4(base, SCSI_MSG_OUT, 0);
  584. }
  585. /*
  586. * set selection timeout(= 250ms)
  587. */
  588. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  589. /*
  590. * set SREQ hazard killer sampling rate
  591. *
  592. * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
  593. * check other internal clock!
  594. */
  595. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  596. /*
  597. * clear Arbit
  598. */
  599. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  600. /*
  601. * set SYNCREG
  602. * Don't set BM_START_ADR before setting this register.
  603. */
  604. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  605. /*
  606. * set ACKWIDTH
  607. */
  608. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  609. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  610. "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
  611. nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
  612. nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
  613. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
  614. data->msgout_len, msgout);
  615. /*
  616. * set SGT ADDR (physical address)
  617. */
  618. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  619. /*
  620. * set TRANSFER CONTROL REG
  621. */
  622. command = 0;
  623. command |= (TRANSFER_GO | ALL_COUNTER_CLR);
  624. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  625. if (scsi_bufflen(SCpnt) > 0) {
  626. command |= BM_START;
  627. }
  628. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  629. command |= CB_MMIO_MODE;
  630. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  631. command |= CB_IO_MODE;
  632. }
  633. nsp32_write2(base, TRANSFER_CONTROL, command);
  634. /*
  635. * start AUTO SCSI, kick off arbitration
  636. */
  637. command = (CLEAR_CDB_FIFO_POINTER |
  638. AUTOSCSI_START |
  639. AUTO_MSGIN_00_OR_04 |
  640. AUTO_MSGIN_02 |
  641. AUTO_ATN );
  642. nsp32_write2(base, COMMAND_CONTROL, command);
  643. /*
  644. * Check arbitration
  645. */
  646. status = nsp32_arbitration(SCpnt, base);
  647. out:
  648. /*
  649. * IRQ enable
  650. */
  651. nsp32_write2(base, IRQ_CONTROL, 0);
  652. return status;
  653. }
  654. /*
  655. * Arbitration Status Check
  656. *
  657. * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
  658. * Using udelay(1) consumes CPU time and system time, but
  659. * arbitration delay time is defined minimal 2.4us in SCSI
  660. * specification, thus udelay works as coarse grained wait timer.
  661. */
  662. static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
  663. {
  664. unsigned char arbit;
  665. int status = TRUE;
  666. int time = 0;
  667. do {
  668. arbit = nsp32_read1(base, ARBIT_STATUS);
  669. time++;
  670. } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  671. (time <= ARBIT_TIMEOUT_TIME));
  672. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  673. "arbit: 0x%x, delay time: %d", arbit, time);
  674. if (arbit & ARBIT_WIN) {
  675. /* Arbitration succeeded */
  676. SCpnt->result = DID_OK << 16;
  677. nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
  678. } else if (arbit & ARBIT_FAIL) {
  679. /* Arbitration failed */
  680. SCpnt->result = DID_BUS_BUSY << 16;
  681. status = FALSE;
  682. } else {
  683. /*
  684. * unknown error or ARBIT_GO timeout,
  685. * something lock up! guess no connection.
  686. */
  687. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
  688. SCpnt->result = DID_NO_CONNECT << 16;
  689. status = FALSE;
  690. }
  691. /*
  692. * clear Arbit
  693. */
  694. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  695. return status;
  696. }
  697. /*
  698. * reselection
  699. *
  700. * Note: This reselection routine is called from msgin_occur,
  701. * reselection target id&lun must be already set.
  702. * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
  703. */
  704. static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
  705. {
  706. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  707. unsigned int host_id = SCpnt->device->host->this_id;
  708. unsigned int base = SCpnt->device->host->io_port;
  709. unsigned char tmpid, newid;
  710. nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
  711. /*
  712. * calculate reselected SCSI ID
  713. */
  714. tmpid = nsp32_read1(base, RESELECT_ID);
  715. tmpid &= (~BIT(host_id));
  716. newid = 0;
  717. while (tmpid) {
  718. if (tmpid & 1) {
  719. break;
  720. }
  721. tmpid >>= 1;
  722. newid++;
  723. }
  724. /*
  725. * If reselected New ID:LUN is not existed
  726. * or current nexus is not existed, unexpected
  727. * reselection is occurred. Send reject message.
  728. */
  729. if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
  730. nsp32_msg(KERN_WARNING, "unknown id/lun");
  731. return FALSE;
  732. } else if(data->lunt[newid][newlun].SCpnt == NULL) {
  733. nsp32_msg(KERN_WARNING, "no SCSI command is processing");
  734. return FALSE;
  735. }
  736. data->cur_id = newid;
  737. data->cur_lun = newlun;
  738. data->cur_target = &(data->target[newid]);
  739. data->cur_lunt = &(data->lunt[newid][newlun]);
  740. /* reset SACK/SavedACK counter (or ALL clear?) */
  741. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  742. return TRUE;
  743. }
  744. /*
  745. * nsp32_setup_sg_table - build scatter gather list for transfer data
  746. * with bus master.
  747. *
  748. * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
  749. */
  750. static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
  751. {
  752. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  753. struct scatterlist *sg;
  754. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  755. int num, i;
  756. u32_le l;
  757. if (sgt == NULL) {
  758. nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
  759. return FALSE;
  760. }
  761. num = scsi_dma_map(SCpnt);
  762. if (!num)
  763. return TRUE;
  764. else if (num < 0)
  765. return FALSE;
  766. else {
  767. scsi_for_each_sg(SCpnt, sg, num, i) {
  768. /*
  769. * Build nsp32_sglist, substitute sg dma addresses.
  770. */
  771. sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
  772. sgt[i].len = cpu_to_le32(sg_dma_len(sg));
  773. if (le32_to_cpu(sgt[i].len) > 0x10000) {
  774. nsp32_msg(KERN_ERR,
  775. "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
  776. return FALSE;
  777. }
  778. nsp32_dbg(NSP32_DEBUG_SGLIST,
  779. "num 0x%x : addr 0x%lx len 0x%lx",
  780. i,
  781. le32_to_cpu(sgt[i].addr),
  782. le32_to_cpu(sgt[i].len ));
  783. }
  784. /* set end mark */
  785. l = le32_to_cpu(sgt[num-1].len);
  786. sgt[num-1].len = cpu_to_le32(l | SGTEND);
  787. }
  788. return TRUE;
  789. }
  790. static int nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  791. {
  792. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  793. nsp32_target *target;
  794. nsp32_lunt *cur_lunt;
  795. int ret;
  796. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  797. "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
  798. "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
  799. SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
  800. scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt));
  801. if (data->CurrentSC != NULL) {
  802. nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
  803. data->CurrentSC = NULL;
  804. SCpnt->result = DID_NO_CONNECT << 16;
  805. done(SCpnt);
  806. return 0;
  807. }
  808. /* check target ID is not same as this initiator ID */
  809. if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
  810. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
  811. SCpnt->result = DID_BAD_TARGET << 16;
  812. done(SCpnt);
  813. return 0;
  814. }
  815. /* check target LUN is allowable value */
  816. if (SCpnt->device->lun >= MAX_LUN) {
  817. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
  818. SCpnt->result = DID_BAD_TARGET << 16;
  819. done(SCpnt);
  820. return 0;
  821. }
  822. show_command(SCpnt);
  823. SCpnt->scsi_done = done;
  824. data->CurrentSC = SCpnt;
  825. SCpnt->SCp.Status = CHECK_CONDITION;
  826. SCpnt->SCp.Message = 0;
  827. scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
  828. SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt);
  829. SCpnt->SCp.this_residual = scsi_bufflen(SCpnt);
  830. SCpnt->SCp.buffer = NULL;
  831. SCpnt->SCp.buffers_residual = 0;
  832. /* initialize data */
  833. data->msgout_len = 0;
  834. data->msgin_len = 0;
  835. cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
  836. cur_lunt->SCpnt = SCpnt;
  837. cur_lunt->save_datp = 0;
  838. cur_lunt->msgin03 = FALSE;
  839. data->cur_lunt = cur_lunt;
  840. data->cur_id = SCpnt->device->id;
  841. data->cur_lun = SCpnt->device->lun;
  842. ret = nsp32_setup_sg_table(SCpnt);
  843. if (ret == FALSE) {
  844. nsp32_msg(KERN_ERR, "SGT fail");
  845. SCpnt->result = DID_ERROR << 16;
  846. nsp32_scsi_done(SCpnt);
  847. return 0;
  848. }
  849. /* Build IDENTIFY */
  850. nsp32_build_identify(SCpnt);
  851. /*
  852. * If target is the first time to transfer after the reset
  853. * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
  854. * message SDTR is needed to do synchronous transfer.
  855. */
  856. target = &data->target[scmd_id(SCpnt)];
  857. data->cur_target = target;
  858. if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
  859. unsigned char period, offset;
  860. if (trans_mode != ASYNC_MODE) {
  861. nsp32_set_max_sync(data, target, &period, &offset);
  862. nsp32_build_sdtr(SCpnt, period, offset);
  863. target->sync_flag |= SDTR_INITIATOR;
  864. } else {
  865. nsp32_set_async(data, target);
  866. target->sync_flag |= SDTR_DONE;
  867. }
  868. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  869. "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
  870. target->limit_entry, period, offset);
  871. } else if (target->sync_flag & SDTR_INITIATOR) {
  872. /*
  873. * It was negotiating SDTR with target, sending from the
  874. * initiator, but there are no chance to remove this flag.
  875. * Set async because we don't get proper negotiation.
  876. */
  877. nsp32_set_async(data, target);
  878. target->sync_flag &= ~SDTR_INITIATOR;
  879. target->sync_flag |= SDTR_DONE;
  880. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  881. "SDTR_INITIATOR: fall back to async");
  882. } else if (target->sync_flag & SDTR_TARGET) {
  883. /*
  884. * It was negotiating SDTR with target, sending from target,
  885. * but there are no chance to remove this flag. Set async
  886. * because we don't get proper negotiation.
  887. */
  888. nsp32_set_async(data, target);
  889. target->sync_flag &= ~SDTR_TARGET;
  890. target->sync_flag |= SDTR_DONE;
  891. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  892. "Unknown SDTR from target is reached, fall back to async.");
  893. }
  894. nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
  895. "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
  896. SCpnt->device->id, target->sync_flag, target->syncreg,
  897. target->ackwidth);
  898. /* Selection */
  899. if (auto_param == 0) {
  900. ret = nsp32_selection_autopara(SCpnt);
  901. } else {
  902. ret = nsp32_selection_autoscsi(SCpnt);
  903. }
  904. if (ret != TRUE) {
  905. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
  906. nsp32_scsi_done(SCpnt);
  907. }
  908. return 0;
  909. }
  910. static DEF_SCSI_QCMD(nsp32_queuecommand)
  911. /* initialize asic */
  912. static int nsp32hw_init(nsp32_hw_data *data)
  913. {
  914. unsigned int base = data->BaseAddress;
  915. unsigned short irq_stat;
  916. unsigned long lc_reg;
  917. unsigned char power;
  918. lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
  919. if ((lc_reg & 0xff00) == 0) {
  920. lc_reg |= (0x20 << 8);
  921. nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
  922. }
  923. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  924. nsp32_write2(base, TRANSFER_CONTROL, 0);
  925. nsp32_write4(base, BM_CNT, 0);
  926. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  927. do {
  928. irq_stat = nsp32_read2(base, IRQ_STATUS);
  929. nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
  930. } while (irq_stat & IRQSTATUS_ANY_IRQ);
  931. /*
  932. * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
  933. * designated by specification.
  934. */
  935. if ((data->trans_method & NSP32_TRANSFER_PIO) ||
  936. (data->trans_method & NSP32_TRANSFER_MMIO)) {
  937. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
  938. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
  939. } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  940. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
  941. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
  942. } else {
  943. nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
  944. }
  945. nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
  946. nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
  947. nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
  948. nsp32_index_write1(base, CLOCK_DIV, data->clock);
  949. nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
  950. nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
  951. /*
  952. * initialize MISC_WRRD register
  953. *
  954. * Note: Designated parameters is obeyed as following:
  955. * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
  956. * MISC_MASTER_TERMINATION_SELECT: It must be set.
  957. * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
  958. * MISC_AUTOSEL_TIMING_SEL: It should be set.
  959. * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
  960. * MISC_DELAYED_BMSTART: It's selected for safety.
  961. *
  962. * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
  963. * we have to set TRANSFERCONTROL_BM_START as 0 and set
  964. * appropriate value before restarting bus master transfer.
  965. */
  966. nsp32_index_write2(base, MISC_WR,
  967. (SCSI_DIRECTION_DETECTOR_SELECT |
  968. DELAYED_BMSTART |
  969. MASTER_TERMINATION_SELECT |
  970. BMREQ_NEGATE_TIMING_SEL |
  971. AUTOSEL_TIMING_SEL |
  972. BMSTOP_CHANGE2_NONDATA_PHASE));
  973. nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
  974. power = nsp32_index_read1(base, TERM_PWR_CONTROL);
  975. if (!(power & SENSE)) {
  976. nsp32_msg(KERN_INFO, "term power on");
  977. nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
  978. }
  979. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  980. nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
  981. nsp32_write1(base, SYNC_REG, 0);
  982. nsp32_write1(base, ACK_WIDTH, 0);
  983. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  984. /*
  985. * enable to select designated IRQ (except for
  986. * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
  987. */
  988. nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
  989. IRQSELECT_SCSIRESET_IRQ |
  990. IRQSELECT_FIFO_SHLD_IRQ |
  991. IRQSELECT_RESELECT_IRQ |
  992. IRQSELECT_PHASE_CHANGE_IRQ |
  993. IRQSELECT_AUTO_SCSI_SEQ_IRQ |
  994. // IRQSELECT_BMCNTERR_IRQ |
  995. IRQSELECT_TARGET_ABORT_IRQ |
  996. IRQSELECT_MASTER_ABORT_IRQ );
  997. nsp32_write2(base, IRQ_CONTROL, 0);
  998. /* PCI LED off */
  999. nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
  1000. nsp32_index_write1(base, EXT_PORT, LED_OFF);
  1001. return TRUE;
  1002. }
  1003. /* interrupt routine */
  1004. static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
  1005. {
  1006. nsp32_hw_data *data = dev_id;
  1007. unsigned int base = data->BaseAddress;
  1008. struct scsi_cmnd *SCpnt = data->CurrentSC;
  1009. unsigned short auto_stat, irq_stat, trans_stat;
  1010. unsigned char busmon, busphase;
  1011. unsigned long flags;
  1012. int ret;
  1013. int handled = 0;
  1014. struct Scsi_Host *host = data->Host;
  1015. spin_lock_irqsave(host->host_lock, flags);
  1016. /*
  1017. * IRQ check, then enable IRQ mask
  1018. */
  1019. irq_stat = nsp32_read2(base, IRQ_STATUS);
  1020. nsp32_dbg(NSP32_DEBUG_INTR,
  1021. "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
  1022. /* is this interrupt comes from Ninja asic? */
  1023. if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
  1024. nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
  1025. goto out2;
  1026. }
  1027. handled = 1;
  1028. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  1029. busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
  1030. busphase = busmon & BUSMON_PHASE_MASK;
  1031. trans_stat = nsp32_read2(base, TRANSFER_STATUS);
  1032. if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
  1033. nsp32_msg(KERN_INFO, "card disconnect");
  1034. if (data->CurrentSC != NULL) {
  1035. nsp32_msg(KERN_INFO, "clean up current SCSI command");
  1036. SCpnt->result = DID_BAD_TARGET << 16;
  1037. nsp32_scsi_done(SCpnt);
  1038. }
  1039. goto out;
  1040. }
  1041. /* Timer IRQ */
  1042. if (irq_stat & IRQSTATUS_TIMER_IRQ) {
  1043. nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
  1044. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1045. goto out;
  1046. }
  1047. /* SCSI reset */
  1048. if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
  1049. nsp32_msg(KERN_INFO, "detected someone do bus reset");
  1050. nsp32_do_bus_reset(data);
  1051. if (SCpnt != NULL) {
  1052. SCpnt->result = DID_RESET << 16;
  1053. nsp32_scsi_done(SCpnt);
  1054. }
  1055. goto out;
  1056. }
  1057. if (SCpnt == NULL) {
  1058. nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
  1059. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1060. goto out;
  1061. }
  1062. /*
  1063. * AutoSCSI Interrupt.
  1064. * Note: This interrupt is occurred when AutoSCSI is finished. Then
  1065. * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
  1066. * recorded when AutoSCSI sequencer has been processed.
  1067. */
  1068. if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
  1069. /* getting SCSI executed phase */
  1070. auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  1071. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  1072. /* Selection Timeout, go busfree phase. */
  1073. if (auto_stat & SELECTION_TIMEOUT) {
  1074. nsp32_dbg(NSP32_DEBUG_INTR,
  1075. "selection timeout occurred");
  1076. SCpnt->result = DID_TIME_OUT << 16;
  1077. nsp32_scsi_done(SCpnt);
  1078. goto out;
  1079. }
  1080. if (auto_stat & MSGOUT_PHASE) {
  1081. /*
  1082. * MsgOut phase was processed.
  1083. * If MSG_IN_OCCUER is not set, then MsgOut phase is
  1084. * completed. Thus, msgout_len must reset. Otherwise,
  1085. * nothing to do here. If MSG_OUT_OCCUER is occurred,
  1086. * then we will encounter the condition and check.
  1087. */
  1088. if (!(auto_stat & MSG_IN_OCCUER) &&
  1089. (data->msgout_len <= 3)) {
  1090. /*
  1091. * !MSG_IN_OCCUER && msgout_len <=3
  1092. * ---> AutoSCSI with MSGOUTreg is processed.
  1093. */
  1094. data->msgout_len = 0;
  1095. };
  1096. nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
  1097. }
  1098. if ((auto_stat & DATA_IN_PHASE) &&
  1099. (scsi_get_resid(SCpnt) > 0) &&
  1100. ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
  1101. printk( "auto+fifo\n");
  1102. //nsp32_pio_read(SCpnt);
  1103. }
  1104. if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
  1105. /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
  1106. nsp32_dbg(NSP32_DEBUG_INTR,
  1107. "Data in/out phase processed");
  1108. /* read BMCNT, SGT pointer addr */
  1109. nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
  1110. nsp32_read4(base, BM_CNT));
  1111. nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
  1112. nsp32_read4(base, SGT_ADR));
  1113. nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
  1114. nsp32_read4(base, SACK_CNT));
  1115. nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
  1116. nsp32_read4(base, SAVED_SACK_CNT));
  1117. scsi_set_resid(SCpnt, 0); /* all data transferred! */
  1118. }
  1119. /*
  1120. * MsgIn Occur
  1121. */
  1122. if (auto_stat & MSG_IN_OCCUER) {
  1123. nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
  1124. }
  1125. /*
  1126. * MsgOut Occur
  1127. */
  1128. if (auto_stat & MSG_OUT_OCCUER) {
  1129. nsp32_msgout_occur(SCpnt);
  1130. }
  1131. /*
  1132. * Bus Free Occur
  1133. */
  1134. if (auto_stat & BUS_FREE_OCCUER) {
  1135. ret = nsp32_busfree_occur(SCpnt, auto_stat);
  1136. if (ret == TRUE) {
  1137. goto out;
  1138. }
  1139. }
  1140. if (auto_stat & STATUS_PHASE) {
  1141. /*
  1142. * Read CSB and substitute CSB for SCpnt->result
  1143. * to save status phase stutas byte.
  1144. * scsi error handler checks host_byte (DID_*:
  1145. * low level driver to indicate status), then checks
  1146. * status_byte (SCSI status byte).
  1147. */
  1148. SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
  1149. }
  1150. if (auto_stat & ILLEGAL_PHASE) {
  1151. /* Illegal phase is detected. SACK is not back. */
  1152. nsp32_msg(KERN_WARNING,
  1153. "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
  1154. /* TODO: currently we don't have any action... bus reset? */
  1155. /*
  1156. * To send back SACK, assert, wait, and negate.
  1157. */
  1158. nsp32_sack_assert(data);
  1159. nsp32_wait_req(data, NEGATE);
  1160. nsp32_sack_negate(data);
  1161. }
  1162. if (auto_stat & COMMAND_PHASE) {
  1163. /* nothing to do */
  1164. nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
  1165. }
  1166. if (auto_stat & AUTOSCSI_BUSY) {
  1167. /* AutoSCSI is running */
  1168. }
  1169. show_autophase(auto_stat);
  1170. }
  1171. /* FIFO_SHLD_IRQ */
  1172. if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
  1173. nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
  1174. switch(busphase) {
  1175. case BUSPHASE_DATA_OUT:
  1176. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
  1177. //nsp32_pio_write(SCpnt);
  1178. break;
  1179. case BUSPHASE_DATA_IN:
  1180. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
  1181. //nsp32_pio_read(SCpnt);
  1182. break;
  1183. case BUSPHASE_STATUS:
  1184. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
  1185. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1186. break;
  1187. default:
  1188. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
  1189. nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1190. show_busphase(busphase);
  1191. break;
  1192. }
  1193. goto out;
  1194. }
  1195. /* Phase Change IRQ */
  1196. if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
  1197. nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
  1198. switch(busphase) {
  1199. case BUSPHASE_MESSAGE_IN:
  1200. nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
  1201. nsp32_msgin_occur(SCpnt, irq_stat, 0);
  1202. break;
  1203. default:
  1204. nsp32_msg(KERN_WARNING, "phase chg/other phase?");
  1205. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
  1206. irq_stat, trans_stat);
  1207. show_busphase(busphase);
  1208. break;
  1209. }
  1210. goto out;
  1211. }
  1212. /* PCI_IRQ */
  1213. if (irq_stat & IRQSTATUS_PCI_IRQ) {
  1214. nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
  1215. /* Do nothing */
  1216. }
  1217. /* BMCNTERR_IRQ */
  1218. if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
  1219. nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
  1220. /*
  1221. * TODO: To be implemented improving bus master
  1222. * transfer reliability when BMCNTERR is occurred in
  1223. * AutoSCSI phase described in specification.
  1224. */
  1225. }
  1226. #if 0
  1227. nsp32_dbg(NSP32_DEBUG_INTR,
  1228. "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1229. show_busphase(busphase);
  1230. #endif
  1231. out:
  1232. /* disable IRQ mask */
  1233. nsp32_write2(base, IRQ_CONTROL, 0);
  1234. out2:
  1235. spin_unlock_irqrestore(host->host_lock, flags);
  1236. nsp32_dbg(NSP32_DEBUG_INTR, "exit");
  1237. return IRQ_RETVAL(handled);
  1238. }
  1239. #undef SPRINTF
  1240. #define SPRINTF(args...) \
  1241. do { \
  1242. if(length > (pos - buffer)) { \
  1243. pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
  1244. nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
  1245. } \
  1246. } while(0)
  1247. static int nsp32_proc_info(struct Scsi_Host *host, char *buffer, char **start,
  1248. off_t offset, int length, int inout)
  1249. {
  1250. char *pos = buffer;
  1251. int thislength;
  1252. unsigned long flags;
  1253. nsp32_hw_data *data;
  1254. int hostno;
  1255. unsigned int base;
  1256. unsigned char mode_reg;
  1257. int id, speed;
  1258. long model;
  1259. /* Write is not supported, just return. */
  1260. if (inout == TRUE) {
  1261. return -EINVAL;
  1262. }
  1263. hostno = host->host_no;
  1264. data = (nsp32_hw_data *)host->hostdata;
  1265. base = host->io_port;
  1266. SPRINTF("NinjaSCSI-32 status\n\n");
  1267. SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
  1268. SPRINTF("SCSI host No.: %d\n", hostno);
  1269. SPRINTF("IRQ: %d\n", host->irq);
  1270. SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
  1271. SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
  1272. SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
  1273. SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
  1274. mode_reg = nsp32_index_read1(base, CHIP_MODE);
  1275. model = data->pci_devid->driver_data;
  1276. #ifdef CONFIG_PM
  1277. SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
  1278. #endif
  1279. SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
  1280. spin_lock_irqsave(&(data->Lock), flags);
  1281. SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
  1282. spin_unlock_irqrestore(&(data->Lock), flags);
  1283. SPRINTF("SDTR status\n");
  1284. for (id = 0; id < ARRAY_SIZE(data->target); id++) {
  1285. SPRINTF("id %d: ", id);
  1286. if (id == host->this_id) {
  1287. SPRINTF("----- NinjaSCSI-32 host adapter\n");
  1288. continue;
  1289. }
  1290. if (data->target[id].sync_flag == SDTR_DONE) {
  1291. if (data->target[id].period == 0 &&
  1292. data->target[id].offset == ASYNC_OFFSET ) {
  1293. SPRINTF("async");
  1294. } else {
  1295. SPRINTF(" sync");
  1296. }
  1297. } else {
  1298. SPRINTF(" none");
  1299. }
  1300. if (data->target[id].period != 0) {
  1301. speed = 1000000 / (data->target[id].period * 4);
  1302. SPRINTF(" transfer %d.%dMB/s, offset %d",
  1303. speed / 1000,
  1304. speed % 1000,
  1305. data->target[id].offset
  1306. );
  1307. }
  1308. SPRINTF("\n");
  1309. }
  1310. thislength = pos - (buffer + offset);
  1311. if(thislength < 0) {
  1312. *start = NULL;
  1313. return 0;
  1314. }
  1315. thislength = min(thislength, length);
  1316. *start = buffer + offset;
  1317. return thislength;
  1318. }
  1319. #undef SPRINTF
  1320. /*
  1321. * Reset parameters and call scsi_done for data->cur_lunt.
  1322. * Be careful setting SCpnt->result = DID_* before calling this function.
  1323. */
  1324. static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
  1325. {
  1326. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1327. unsigned int base = SCpnt->device->host->io_port;
  1328. scsi_dma_unmap(SCpnt);
  1329. /*
  1330. * clear TRANSFERCONTROL_BM_START
  1331. */
  1332. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1333. nsp32_write4(base, BM_CNT, 0);
  1334. /*
  1335. * call scsi_done
  1336. */
  1337. (*SCpnt->scsi_done)(SCpnt);
  1338. /*
  1339. * reset parameters
  1340. */
  1341. data->cur_lunt->SCpnt = NULL;
  1342. data->cur_lunt = NULL;
  1343. data->cur_target = NULL;
  1344. data->CurrentSC = NULL;
  1345. }
  1346. /*
  1347. * Bus Free Occur
  1348. *
  1349. * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
  1350. * with ACK reply when below condition is matched:
  1351. * MsgIn 00: Command Complete.
  1352. * MsgIn 02: Save Data Pointer.
  1353. * MsgIn 04: Diconnect.
  1354. * In other case, unexpected BUSFREE is detected.
  1355. */
  1356. static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
  1357. {
  1358. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1359. unsigned int base = SCpnt->device->host->io_port;
  1360. nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
  1361. show_autophase(execph);
  1362. nsp32_write4(base, BM_CNT, 0);
  1363. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1364. /*
  1365. * MsgIn 02: Save Data Pointer
  1366. *
  1367. * VALID:
  1368. * Save Data Pointer is received. Adjust pointer.
  1369. *
  1370. * NO-VALID:
  1371. * SCSI-3 says if Save Data Pointer is not received, then we restart
  1372. * processing and we can't adjust any SCSI data pointer in next data
  1373. * phase.
  1374. */
  1375. if (execph & MSGIN_02_VALID) {
  1376. nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
  1377. /*
  1378. * Check sack_cnt/saved_sack_cnt, then adjust sg table if
  1379. * needed.
  1380. */
  1381. if (!(execph & MSGIN_00_VALID) &&
  1382. ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
  1383. unsigned int sacklen, s_sacklen;
  1384. /*
  1385. * Read SACK count and SAVEDSACK count, then compare.
  1386. */
  1387. sacklen = nsp32_read4(base, SACK_CNT );
  1388. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1389. /*
  1390. * If SAVEDSACKCNT == 0, it means SavedDataPointer is
  1391. * come after data transferring.
  1392. */
  1393. if (s_sacklen > 0) {
  1394. /*
  1395. * Comparing between sack and savedsack to
  1396. * check the condition of AutoMsgIn03.
  1397. *
  1398. * If they are same, set msgin03 == TRUE,
  1399. * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
  1400. * reselection. On the other hand, if they
  1401. * aren't same, set msgin03 == FALSE, and
  1402. * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
  1403. * reselection.
  1404. */
  1405. if (sacklen != s_sacklen) {
  1406. data->cur_lunt->msgin03 = FALSE;
  1407. } else {
  1408. data->cur_lunt->msgin03 = TRUE;
  1409. }
  1410. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1411. }
  1412. }
  1413. /* This value has not substitude with valid value yet... */
  1414. //data->cur_lunt->save_datp = data->cur_datp;
  1415. } else {
  1416. /*
  1417. * no processing.
  1418. */
  1419. }
  1420. if (execph & MSGIN_03_VALID) {
  1421. /* MsgIn03 was valid to be processed. No need processing. */
  1422. }
  1423. /*
  1424. * target SDTR check
  1425. */
  1426. if (data->cur_target->sync_flag & SDTR_INITIATOR) {
  1427. /*
  1428. * SDTR negotiation pulled by the initiator has not
  1429. * finished yet. Fall back to ASYNC mode.
  1430. */
  1431. nsp32_set_async(data, data->cur_target);
  1432. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1433. data->cur_target->sync_flag |= SDTR_DONE;
  1434. } else if (data->cur_target->sync_flag & SDTR_TARGET) {
  1435. /*
  1436. * SDTR negotiation pulled by the target has been
  1437. * negotiating.
  1438. */
  1439. if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
  1440. /*
  1441. * If valid message is received, then
  1442. * negotiation is succeeded.
  1443. */
  1444. } else {
  1445. /*
  1446. * On the contrary, if unexpected bus free is
  1447. * occurred, then negotiation is failed. Fall
  1448. * back to ASYNC mode.
  1449. */
  1450. nsp32_set_async(data, data->cur_target);
  1451. }
  1452. data->cur_target->sync_flag &= ~SDTR_TARGET;
  1453. data->cur_target->sync_flag |= SDTR_DONE;
  1454. }
  1455. /*
  1456. * It is always ensured by SCSI standard that initiator
  1457. * switches into Bus Free Phase after
  1458. * receiving message 00 (Command Complete), 04 (Disconnect).
  1459. * It's the reason that processing here is valid.
  1460. */
  1461. if (execph & MSGIN_00_VALID) {
  1462. /* MsgIn 00: Command Complete */
  1463. nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
  1464. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1465. SCpnt->SCp.Message = 0;
  1466. nsp32_dbg(NSP32_DEBUG_BUSFREE,
  1467. "normal end stat=0x%x resid=0x%x\n",
  1468. SCpnt->SCp.Status, scsi_get_resid(SCpnt));
  1469. SCpnt->result = (DID_OK << 16) |
  1470. (SCpnt->SCp.Message << 8) |
  1471. (SCpnt->SCp.Status << 0);
  1472. nsp32_scsi_done(SCpnt);
  1473. /* All operation is done */
  1474. return TRUE;
  1475. } else if (execph & MSGIN_04_VALID) {
  1476. /* MsgIn 04: Disconnect */
  1477. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1478. SCpnt->SCp.Message = 4;
  1479. nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
  1480. return TRUE;
  1481. } else {
  1482. /* Unexpected bus free */
  1483. nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
  1484. /* DID_ERROR? */
  1485. //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
  1486. SCpnt->result = DID_ERROR << 16;
  1487. nsp32_scsi_done(SCpnt);
  1488. return TRUE;
  1489. }
  1490. return FALSE;
  1491. }
  1492. /*
  1493. * nsp32_adjust_busfree - adjusting SG table
  1494. *
  1495. * Note: This driver adjust the SG table using SCSI ACK
  1496. * counter instead of BMCNT counter!
  1497. */
  1498. static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
  1499. {
  1500. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1501. int old_entry = data->cur_entry;
  1502. int new_entry;
  1503. int sg_num = data->cur_lunt->sg_num;
  1504. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  1505. unsigned int restlen, sentlen;
  1506. u32_le len, addr;
  1507. nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
  1508. /* adjust saved SACK count with 4 byte start address boundary */
  1509. s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
  1510. /*
  1511. * calculate new_entry from sack count and each sgt[].len
  1512. * calculate the byte which is intent to send
  1513. */
  1514. sentlen = 0;
  1515. for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
  1516. sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
  1517. if (sentlen > s_sacklen) {
  1518. break;
  1519. }
  1520. }
  1521. /* all sgt is processed */
  1522. if (new_entry == sg_num) {
  1523. goto last;
  1524. }
  1525. if (sentlen == s_sacklen) {
  1526. /* XXX: confirm it's ok or not */
  1527. /* In this case, it's ok because we are at
  1528. the head element of the sg. restlen is correctly calculated. */
  1529. }
  1530. /* calculate the rest length for transferring */
  1531. restlen = sentlen - s_sacklen;
  1532. /* update adjusting current SG table entry */
  1533. len = le32_to_cpu(sgt[new_entry].len);
  1534. addr = le32_to_cpu(sgt[new_entry].addr);
  1535. addr += (len - restlen);
  1536. sgt[new_entry].addr = cpu_to_le32(addr);
  1537. sgt[new_entry].len = cpu_to_le32(restlen);
  1538. /* set cur_entry with new_entry */
  1539. data->cur_entry = new_entry;
  1540. return;
  1541. last:
  1542. if (scsi_get_resid(SCpnt) < sentlen) {
  1543. nsp32_msg(KERN_ERR, "resid underflow");
  1544. }
  1545. scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
  1546. nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
  1547. /* update hostdata and lun */
  1548. return;
  1549. }
  1550. /*
  1551. * It's called MsgOut phase occur.
  1552. * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
  1553. * message out phase. It, however, has more than 3 messages,
  1554. * HBA creates the interrupt and we have to process by hand.
  1555. */
  1556. static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
  1557. {
  1558. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1559. unsigned int base = SCpnt->device->host->io_port;
  1560. //unsigned short command;
  1561. long new_sgtp;
  1562. int i;
  1563. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1564. "enter: msgout_len: 0x%x", data->msgout_len);
  1565. /*
  1566. * If MsgOut phase is occurred without having any
  1567. * message, then No_Operation is sent (SCSI-2).
  1568. */
  1569. if (data->msgout_len == 0) {
  1570. nsp32_build_nop(SCpnt);
  1571. }
  1572. /*
  1573. * Set SGTP ADDR current entry for restarting AUTOSCSI,
  1574. * because SGTP is incremented next point.
  1575. * There is few statement in the specification...
  1576. */
  1577. new_sgtp = data->cur_lunt->sglun_paddr +
  1578. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1579. /*
  1580. * send messages
  1581. */
  1582. for (i = 0; i < data->msgout_len; i++) {
  1583. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1584. "%d : 0x%x", i, data->msgoutbuf[i]);
  1585. /*
  1586. * Check REQ is asserted.
  1587. */
  1588. nsp32_wait_req(data, ASSERT);
  1589. if (i == (data->msgout_len - 1)) {
  1590. /*
  1591. * If the last message, set the AutoSCSI restart
  1592. * before send back the ack message. AutoSCSI
  1593. * restart automatically negate ATN signal.
  1594. */
  1595. //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1596. //nsp32_restart_autoscsi(SCpnt, command);
  1597. nsp32_write2(base, COMMAND_CONTROL,
  1598. (CLEAR_CDB_FIFO_POINTER |
  1599. AUTO_COMMAND_PHASE |
  1600. AUTOSCSI_RESTART |
  1601. AUTO_MSGIN_00_OR_04 |
  1602. AUTO_MSGIN_02 ));
  1603. }
  1604. /*
  1605. * Write data with SACK, then wait sack is
  1606. * automatically negated.
  1607. */
  1608. nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
  1609. nsp32_wait_sack(data, NEGATE);
  1610. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
  1611. nsp32_read1(base, SCSI_BUS_MONITOR));
  1612. };
  1613. data->msgout_len = 0;
  1614. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
  1615. }
  1616. /*
  1617. * Restart AutoSCSI
  1618. *
  1619. * Note: Restarting AutoSCSI needs set:
  1620. * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
  1621. */
  1622. static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
  1623. {
  1624. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1625. unsigned int base = data->BaseAddress;
  1626. unsigned short transfer = 0;
  1627. nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
  1628. if (data->cur_target == NULL || data->cur_lunt == NULL) {
  1629. nsp32_msg(KERN_ERR, "Target or Lun is invalid");
  1630. }
  1631. /*
  1632. * set SYNC_REG
  1633. * Don't set BM_START_ADR before setting this register.
  1634. */
  1635. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  1636. /*
  1637. * set ACKWIDTH
  1638. */
  1639. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  1640. /*
  1641. * set SREQ hazard killer sampling rate
  1642. */
  1643. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  1644. /*
  1645. * set SGT ADDR (physical address)
  1646. */
  1647. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  1648. /*
  1649. * set TRANSFER CONTROL REG
  1650. */
  1651. transfer = 0;
  1652. transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
  1653. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  1654. if (scsi_bufflen(SCpnt) > 0) {
  1655. transfer |= BM_START;
  1656. }
  1657. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  1658. transfer |= CB_MMIO_MODE;
  1659. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  1660. transfer |= CB_IO_MODE;
  1661. }
  1662. nsp32_write2(base, TRANSFER_CONTROL, transfer);
  1663. /*
  1664. * restart AutoSCSI
  1665. *
  1666. * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
  1667. */
  1668. command |= (CLEAR_CDB_FIFO_POINTER |
  1669. AUTO_COMMAND_PHASE |
  1670. AUTOSCSI_RESTART );
  1671. nsp32_write2(base, COMMAND_CONTROL, command);
  1672. nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
  1673. }
  1674. /*
  1675. * cannot run automatically message in occur
  1676. */
  1677. static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
  1678. unsigned long irq_status,
  1679. unsigned short execph)
  1680. {
  1681. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1682. unsigned int base = SCpnt->device->host->io_port;
  1683. unsigned char msg;
  1684. unsigned char msgtype;
  1685. unsigned char newlun;
  1686. unsigned short command = 0;
  1687. int msgclear = TRUE;
  1688. long new_sgtp;
  1689. int ret;
  1690. /*
  1691. * read first message
  1692. * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
  1693. * of Message-In have to be processed before sending back SCSI ACK.
  1694. */
  1695. msg = nsp32_read1(base, SCSI_DATA_IN);
  1696. data->msginbuf[(unsigned char)data->msgin_len] = msg;
  1697. msgtype = data->msginbuf[0];
  1698. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
  1699. "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
  1700. data->msgin_len, msg, msgtype);
  1701. /*
  1702. * TODO: We need checking whether bus phase is message in?
  1703. */
  1704. /*
  1705. * assert SCSI ACK
  1706. */
  1707. nsp32_sack_assert(data);
  1708. /*
  1709. * processing IDENTIFY
  1710. */
  1711. if (msgtype & 0x80) {
  1712. if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
  1713. /* Invalid (non reselect) phase */
  1714. goto reject;
  1715. }
  1716. newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
  1717. ret = nsp32_reselection(SCpnt, newlun);
  1718. if (ret == TRUE) {
  1719. goto restart;
  1720. } else {
  1721. goto reject;
  1722. }
  1723. }
  1724. /*
  1725. * processing messages except for IDENTIFY
  1726. *
  1727. * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
  1728. */
  1729. switch (msgtype) {
  1730. /*
  1731. * 1-byte message
  1732. */
  1733. case COMMAND_COMPLETE:
  1734. case DISCONNECT:
  1735. /*
  1736. * These messages should not be occurred.
  1737. * They should be processed on AutoSCSI sequencer.
  1738. */
  1739. nsp32_msg(KERN_WARNING,
  1740. "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
  1741. break;
  1742. case RESTORE_POINTERS:
  1743. /*
  1744. * AutoMsgIn03 is disabled, and HBA gets this message.
  1745. */
  1746. if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
  1747. unsigned int s_sacklen;
  1748. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1749. if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
  1750. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1751. } else {
  1752. /* No need to rewrite SGT */
  1753. }
  1754. }
  1755. data->cur_lunt->msgin03 = FALSE;
  1756. /* Update with the new value */
  1757. /* reset SACK/SavedACK counter (or ALL clear?) */
  1758. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  1759. /*
  1760. * set new sg pointer
  1761. */
  1762. new_sgtp = data->cur_lunt->sglun_paddr +
  1763. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1764. nsp32_write4(base, SGT_ADR, new_sgtp);
  1765. break;
  1766. case SAVE_POINTERS:
  1767. /*
  1768. * These messages should not be occurred.
  1769. * They should be processed on AutoSCSI sequencer.
  1770. */
  1771. nsp32_msg (KERN_WARNING,
  1772. "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
  1773. break;
  1774. case MESSAGE_REJECT:
  1775. /* If previous message_out is sending SDTR, and get
  1776. message_reject from target, SDTR negotiation is failed */
  1777. if (data->cur_target->sync_flag &
  1778. (SDTR_INITIATOR | SDTR_TARGET)) {
  1779. /*
  1780. * Current target is negotiating SDTR, but it's
  1781. * failed. Fall back to async transfer mode, and set
  1782. * SDTR_DONE.
  1783. */
  1784. nsp32_set_async(data, data->cur_target);
  1785. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1786. data->cur_target->sync_flag |= SDTR_DONE;
  1787. }
  1788. break;
  1789. case LINKED_CMD_COMPLETE:
  1790. case LINKED_FLG_CMD_COMPLETE:
  1791. /* queue tag is not supported currently */
  1792. nsp32_msg (KERN_WARNING,
  1793. "unsupported message: 0x%x", msgtype);
  1794. break;
  1795. case INITIATE_RECOVERY:
  1796. /* staring ECA (Extended Contingent Allegiance) state. */
  1797. /* This message is declined in SPI2 or later. */
  1798. goto reject;
  1799. /*
  1800. * 2-byte message
  1801. */
  1802. case SIMPLE_QUEUE_TAG:
  1803. case 0x23:
  1804. /*
  1805. * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
  1806. * No support is needed.
  1807. */
  1808. if (data->msgin_len >= 1) {
  1809. goto reject;
  1810. }
  1811. /* current position is 1-byte of 2 byte */
  1812. msgclear = FALSE;
  1813. break;
  1814. /*
  1815. * extended message
  1816. */
  1817. case EXTENDED_MESSAGE:
  1818. if (data->msgin_len < 1) {
  1819. /*
  1820. * Current position does not reach 2-byte
  1821. * (2-byte is extended message length).
  1822. */
  1823. msgclear = FALSE;
  1824. break;
  1825. }
  1826. if ((data->msginbuf[1] + 1) > data->msgin_len) {
  1827. /*
  1828. * Current extended message has msginbuf[1] + 2
  1829. * (msgin_len starts counting from 0, so buf[1] + 1).
  1830. * If current message position is not finished,
  1831. * continue receiving message.
  1832. */
  1833. msgclear = FALSE;
  1834. break;
  1835. }
  1836. /*
  1837. * Reach here means regular length of each type of
  1838. * extended messages.
  1839. */
  1840. switch (data->msginbuf[2]) {
  1841. case EXTENDED_MODIFY_DATA_POINTER:
  1842. /* TODO */
  1843. goto reject; /* not implemented yet */
  1844. break;
  1845. case EXTENDED_SDTR:
  1846. /*
  1847. * Exchange this message between initiator and target.
  1848. */
  1849. if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
  1850. /*
  1851. * received inappropriate message.
  1852. */
  1853. goto reject;
  1854. break;
  1855. }
  1856. nsp32_analyze_sdtr(SCpnt);
  1857. break;
  1858. case EXTENDED_EXTENDED_IDENTIFY:
  1859. /* SCSI-I only, not supported. */
  1860. goto reject; /* not implemented yet */
  1861. break;
  1862. case EXTENDED_WDTR:
  1863. goto reject; /* not implemented yet */
  1864. break;
  1865. default:
  1866. goto reject;
  1867. }
  1868. break;
  1869. default:
  1870. goto reject;
  1871. }
  1872. restart:
  1873. if (msgclear == TRUE) {
  1874. data->msgin_len = 0;
  1875. /*
  1876. * If restarting AutoSCSI, but there are some message to out
  1877. * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
  1878. * (MV_VALID = 0). When commandcontrol is written with
  1879. * AutoSCSI restart, at the same time MsgOutOccur should be
  1880. * happened (however, such situation is really possible...?).
  1881. */
  1882. if (data->msgout_len > 0) {
  1883. nsp32_write4(base, SCSI_MSG_OUT, 0);
  1884. command |= AUTO_ATN;
  1885. }
  1886. /*
  1887. * restart AutoSCSI
  1888. * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
  1889. */
  1890. command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1891. /*
  1892. * If current msgin03 is TRUE, then flag on.
  1893. */
  1894. if (data->cur_lunt->msgin03 == TRUE) {
  1895. command |= AUTO_MSGIN_03;
  1896. }
  1897. data->cur_lunt->msgin03 = FALSE;
  1898. } else {
  1899. data->msgin_len++;
  1900. }
  1901. /*
  1902. * restart AutoSCSI
  1903. */
  1904. nsp32_restart_autoscsi(SCpnt, command);
  1905. /*
  1906. * wait SCSI REQ negate for REQ-ACK handshake
  1907. */
  1908. nsp32_wait_req(data, NEGATE);
  1909. /*
  1910. * negate SCSI ACK
  1911. */
  1912. nsp32_sack_negate(data);
  1913. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1914. return;
  1915. reject:
  1916. nsp32_msg(KERN_WARNING,
  1917. "invalid or unsupported MessageIn, rejected. "
  1918. "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
  1919. msg, data->msgin_len, msgtype);
  1920. nsp32_build_reject(SCpnt);
  1921. data->msgin_len = 0;
  1922. goto restart;
  1923. }
  1924. /*
  1925. *
  1926. */
  1927. static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
  1928. {
  1929. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1930. nsp32_target *target = data->cur_target;
  1931. nsp32_sync_table *synct;
  1932. unsigned char get_period = data->msginbuf[3];
  1933. unsigned char get_offset = data->msginbuf[4];
  1934. int entry;
  1935. int syncnum;
  1936. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
  1937. synct = data->synct;
  1938. syncnum = data->syncnum;
  1939. /*
  1940. * If this inititor sent the SDTR message, then target responds SDTR,
  1941. * initiator SYNCREG, ACKWIDTH from SDTR parameter.
  1942. * Messages are not appropriate, then send back reject message.
  1943. * If initiator did not send the SDTR, but target sends SDTR,
  1944. * initiator calculator the appropriate parameter and send back SDTR.
  1945. */
  1946. if (target->sync_flag & SDTR_INITIATOR) {
  1947. /*
  1948. * Initiator sent SDTR, the target responds and
  1949. * send back negotiation SDTR.
  1950. */
  1951. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
  1952. target->sync_flag &= ~SDTR_INITIATOR;
  1953. target->sync_flag |= SDTR_DONE;
  1954. /*
  1955. * offset:
  1956. */
  1957. if (get_offset > SYNC_OFFSET) {
  1958. /*
  1959. * Negotiation is failed, the target send back
  1960. * unexpected offset value.
  1961. */
  1962. goto reject;
  1963. }
  1964. if (get_offset == ASYNC_OFFSET) {
  1965. /*
  1966. * Negotiation is succeeded, the target want
  1967. * to fall back into asynchronous transfer mode.
  1968. */
  1969. goto async;
  1970. }
  1971. /*
  1972. * period:
  1973. * Check whether sync period is too short. If too short,
  1974. * fall back to async mode. If it's ok, then investigate
  1975. * the received sync period. If sync period is acceptable
  1976. * between sync table start_period and end_period, then
  1977. * set this I_T nexus as sent offset and period.
  1978. * If it's not acceptable, send back reject and fall back
  1979. * to async mode.
  1980. */
  1981. if (get_period < data->synct[0].period_num) {
  1982. /*
  1983. * Negotiation is failed, the target send back
  1984. * unexpected period value.
  1985. */
  1986. goto reject;
  1987. }
  1988. entry = nsp32_search_period_entry(data, target, get_period);
  1989. if (entry < 0) {
  1990. /*
  1991. * Target want to use long period which is not
  1992. * acceptable NinjaSCSI-32Bi/UDE.
  1993. */
  1994. goto reject;
  1995. }
  1996. /*
  1997. * Set new sync table and offset in this I_T nexus.
  1998. */
  1999. nsp32_set_sync_entry(data, target, entry, get_offset);
  2000. } else {
  2001. /* Target send SDTR to initiator. */
  2002. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
  2003. target->sync_flag |= SDTR_INITIATOR;
  2004. /* offset: */
  2005. if (get_offset > SYNC_OFFSET) {
  2006. /* send back as SYNC_OFFSET */
  2007. get_offset = SYNC_OFFSET;
  2008. }
  2009. /* period: */
  2010. if (get_period < data->synct[0].period_num) {
  2011. get_period = data->synct[0].period_num;
  2012. }
  2013. entry = nsp32_search_period_entry(data, target, get_period);
  2014. if (get_offset == ASYNC_OFFSET || entry < 0) {
  2015. nsp32_set_async(data, target);
  2016. nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
  2017. } else {
  2018. nsp32_set_sync_entry(data, target, entry, get_offset);
  2019. nsp32_build_sdtr(SCpnt, get_period, get_offset);
  2020. }
  2021. }
  2022. target->period = get_period;
  2023. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  2024. return;
  2025. reject:
  2026. /*
  2027. * If the current message is unacceptable, send back to the target
  2028. * with reject message.
  2029. */
  2030. nsp32_build_reject(SCpnt);
  2031. async:
  2032. nsp32_set_async(data, target); /* set as ASYNC transfer mode */
  2033. target->period = 0;
  2034. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
  2035. return;
  2036. }
  2037. /*
  2038. * Search config entry number matched in sync_table from given
  2039. * target and speed period value. If failed to search, return negative value.
  2040. */
  2041. static int nsp32_search_period_entry(nsp32_hw_data *data,
  2042. nsp32_target *target,
  2043. unsigned char period)
  2044. {
  2045. int i;
  2046. if (target->limit_entry >= data->syncnum) {
  2047. nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
  2048. target->limit_entry = 0;
  2049. }
  2050. for (i = target->limit_entry; i < data->syncnum; i++) {
  2051. if (period >= data->synct[i].start_period &&
  2052. period <= data->synct[i].end_period) {
  2053. break;
  2054. }
  2055. }
  2056. /*
  2057. * Check given period value is over the sync_table value.
  2058. * If so, return max value.
  2059. */
  2060. if (i == data->syncnum) {
  2061. i = -1;
  2062. }
  2063. return i;
  2064. }
  2065. /*
  2066. * target <-> initiator use ASYNC transfer
  2067. */
  2068. static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
  2069. {
  2070. unsigned char period = data->synct[target->limit_entry].period_num;
  2071. target->offset = ASYNC_OFFSET;
  2072. target->period = 0;
  2073. target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
  2074. target->ackwidth = 0;
  2075. target->sample_reg = 0;
  2076. nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
  2077. }
  2078. /*
  2079. * target <-> initiator use maximum SYNC transfer
  2080. */
  2081. static void nsp32_set_max_sync(nsp32_hw_data *data,
  2082. nsp32_target *target,
  2083. unsigned char *period,
  2084. unsigned char *offset)
  2085. {
  2086. unsigned char period_num, ackwidth;
  2087. period_num = data->synct[target->limit_entry].period_num;
  2088. *period = data->synct[target->limit_entry].start_period;
  2089. ackwidth = data->synct[target->limit_entry].ackwidth;
  2090. *offset = SYNC_OFFSET;
  2091. target->syncreg = TO_SYNCREG(period_num, *offset);
  2092. target->ackwidth = ackwidth;
  2093. target->offset = *offset;
  2094. target->sample_reg = 0; /* disable SREQ sampling */
  2095. }
  2096. /*
  2097. * target <-> initiator use entry number speed
  2098. */
  2099. static void nsp32_set_sync_entry(nsp32_hw_data *data,
  2100. nsp32_target *target,
  2101. int entry,
  2102. unsigned char offset)
  2103. {
  2104. unsigned char period, ackwidth, sample_rate;
  2105. period = data->synct[entry].period_num;
  2106. ackwidth = data->synct[entry].ackwidth;
  2107. offset = offset;
  2108. sample_rate = data->synct[entry].sample_rate;
  2109. target->syncreg = TO_SYNCREG(period, offset);
  2110. target->ackwidth = ackwidth;
  2111. target->offset = offset;
  2112. target->sample_reg = sample_rate | SAMPLING_ENABLE;
  2113. nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
  2114. }
  2115. /*
  2116. * It waits until SCSI REQ becomes assertion or negation state.
  2117. *
  2118. * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
  2119. * connected target responds SCSI REQ negation. We have to wait
  2120. * SCSI REQ becomes negation in order to negate SCSI ACK signal for
  2121. * REQ-ACK handshake.
  2122. */
  2123. static void nsp32_wait_req(nsp32_hw_data *data, int state)
  2124. {
  2125. unsigned int base = data->BaseAddress;
  2126. int wait_time = 0;
  2127. unsigned char bus, req_bit;
  2128. if (!((state == ASSERT) || (state == NEGATE))) {
  2129. nsp32_msg(KERN_ERR, "unknown state designation");
  2130. }
  2131. /* REQ is BIT(5) */
  2132. req_bit = (state == ASSERT ? BUSMON_REQ : 0);
  2133. do {
  2134. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2135. if ((bus & BUSMON_REQ) == req_bit) {
  2136. nsp32_dbg(NSP32_DEBUG_WAIT,
  2137. "wait_time: %d", wait_time);
  2138. return;
  2139. }
  2140. udelay(1);
  2141. wait_time++;
  2142. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2143. nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
  2144. }
  2145. /*
  2146. * It waits until SCSI SACK becomes assertion or negation state.
  2147. */
  2148. static void nsp32_wait_sack(nsp32_hw_data *data, int state)
  2149. {
  2150. unsigned int base = data->BaseAddress;
  2151. int wait_time = 0;
  2152. unsigned char bus, ack_bit;
  2153. if (!((state == ASSERT) || (state == NEGATE))) {
  2154. nsp32_msg(KERN_ERR, "unknown state designation");
  2155. }
  2156. /* ACK is BIT(4) */
  2157. ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
  2158. do {
  2159. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2160. if ((bus & BUSMON_ACK) == ack_bit) {
  2161. nsp32_dbg(NSP32_DEBUG_WAIT,
  2162. "wait_time: %d", wait_time);
  2163. return;
  2164. }
  2165. udelay(1);
  2166. wait_time++;
  2167. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2168. nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
  2169. }
  2170. /*
  2171. * assert SCSI ACK
  2172. *
  2173. * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
  2174. */
  2175. static void nsp32_sack_assert(nsp32_hw_data *data)
  2176. {
  2177. unsigned int base = data->BaseAddress;
  2178. unsigned char busctrl;
  2179. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2180. busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
  2181. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2182. }
  2183. /*
  2184. * negate SCSI ACK
  2185. */
  2186. static void nsp32_sack_negate(nsp32_hw_data *data)
  2187. {
  2188. unsigned int base = data->BaseAddress;
  2189. unsigned char busctrl;
  2190. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2191. busctrl &= ~BUSCTL_ACK;
  2192. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2193. }
  2194. /*
  2195. * Note: n_io_port is defined as 0x7f because I/O register port is
  2196. * assigned as:
  2197. * 0x800-0x8ff: memory mapped I/O port
  2198. * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
  2199. * 0xc00-0xfff: CardBus status registers
  2200. */
  2201. static int nsp32_detect(struct pci_dev *pdev)
  2202. {
  2203. struct Scsi_Host *host; /* registered host structure */
  2204. struct resource *res;
  2205. nsp32_hw_data *data;
  2206. int ret;
  2207. int i, j;
  2208. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2209. /*
  2210. * register this HBA as SCSI device
  2211. */
  2212. host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
  2213. if (host == NULL) {
  2214. nsp32_msg (KERN_ERR, "failed to scsi register");
  2215. goto err;
  2216. }
  2217. /*
  2218. * set nsp32_hw_data
  2219. */
  2220. data = (nsp32_hw_data *)host->hostdata;
  2221. memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
  2222. host->irq = data->IrqNumber;
  2223. host->io_port = data->BaseAddress;
  2224. host->unique_id = data->BaseAddress;
  2225. host->n_io_port = data->NumAddress;
  2226. host->base = (unsigned long)data->MmioAddress;
  2227. data->Host = host;
  2228. spin_lock_init(&(data->Lock));
  2229. data->cur_lunt = NULL;
  2230. data->cur_target = NULL;
  2231. /*
  2232. * Bus master transfer mode is supported currently.
  2233. */
  2234. data->trans_method = NSP32_TRANSFER_BUSMASTER;
  2235. /*
  2236. * Set clock div, CLOCK_4 (HBA has own external clock, and
  2237. * dividing * 100ns/4).
  2238. * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
  2239. */
  2240. data->clock = CLOCK_4;
  2241. /*
  2242. * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
  2243. */
  2244. switch (data->clock) {
  2245. case CLOCK_4:
  2246. /* If data->clock is CLOCK_4, then select 40M sync table. */
  2247. data->synct = nsp32_sync_table_40M;
  2248. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2249. break;
  2250. case CLOCK_2:
  2251. /* If data->clock is CLOCK_2, then select 20M sync table. */
  2252. data->synct = nsp32_sync_table_20M;
  2253. data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
  2254. break;
  2255. case PCICLK:
  2256. /* If data->clock is PCICLK, then select pci sync table. */
  2257. data->synct = nsp32_sync_table_pci;
  2258. data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
  2259. break;
  2260. default:
  2261. nsp32_msg(KERN_WARNING,
  2262. "Invalid clock div is selected, set CLOCK_4.");
  2263. /* Use default value CLOCK_4 */
  2264. data->clock = CLOCK_4;
  2265. data->synct = nsp32_sync_table_40M;
  2266. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2267. }
  2268. /*
  2269. * setup nsp32_lunt
  2270. */
  2271. /*
  2272. * setup DMA
  2273. */
  2274. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
  2275. nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
  2276. goto scsi_unregister;
  2277. }
  2278. /*
  2279. * allocate autoparam DMA resource.
  2280. */
  2281. data->autoparam = pci_alloc_consistent(pdev, sizeof(nsp32_autoparam), &(data->auto_paddr));
  2282. if (data->autoparam == NULL) {
  2283. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2284. goto scsi_unregister;
  2285. }
  2286. /*
  2287. * allocate scatter-gather DMA resource.
  2288. */
  2289. data->sg_list = pci_alloc_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2290. &(data->sg_paddr));
  2291. if (data->sg_list == NULL) {
  2292. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2293. goto free_autoparam;
  2294. }
  2295. for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
  2296. for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
  2297. int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
  2298. nsp32_lunt tmp = {
  2299. .SCpnt = NULL,
  2300. .save_datp = 0,
  2301. .msgin03 = FALSE,
  2302. .sg_num = 0,
  2303. .cur_entry = 0,
  2304. .sglun = &(data->sg_list[offset]),
  2305. .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
  2306. };
  2307. data->lunt[i][j] = tmp;
  2308. }
  2309. }
  2310. /*
  2311. * setup target
  2312. */
  2313. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2314. nsp32_target *target = &(data->target[i]);
  2315. target->limit_entry = 0;
  2316. target->sync_flag = 0;
  2317. nsp32_set_async(data, target);
  2318. }
  2319. /*
  2320. * EEPROM check
  2321. */
  2322. ret = nsp32_getprom_param(data);
  2323. if (ret == FALSE) {
  2324. data->resettime = 3; /* default 3 */
  2325. }
  2326. /*
  2327. * setup HBA
  2328. */
  2329. nsp32hw_init(data);
  2330. snprintf(data->info_str, sizeof(data->info_str),
  2331. "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
  2332. host->irq, host->io_port, host->n_io_port);
  2333. /*
  2334. * SCSI bus reset
  2335. *
  2336. * Note: It's important to reset SCSI bus in initialization phase.
  2337. * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
  2338. * system is coming up, so SCSI devices connected to HBA is set as
  2339. * un-asynchronous mode. It brings the merit that this HBA is
  2340. * ready to start synchronous transfer without any preparation,
  2341. * but we are difficult to control transfer speed. In addition,
  2342. * it prevents device transfer speed from effecting EEPROM start-up
  2343. * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
  2344. * Auto Mode, then FAST-10M is selected when SCSI devices are
  2345. * connected same or more than 4 devices. It should be avoided
  2346. * depending on this specification. Thus, resetting the SCSI bus
  2347. * restores all connected SCSI devices to asynchronous mode, then
  2348. * this driver set SDTR safely later, and we can control all SCSI
  2349. * device transfer mode.
  2350. */
  2351. nsp32_do_bus_reset(data);
  2352. ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
  2353. if (ret < 0) {
  2354. nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
  2355. "SCSI PCI controller. Interrupt: %d", host->irq);
  2356. goto free_sg_list;
  2357. }
  2358. /*
  2359. * PCI IO register
  2360. */
  2361. res = request_region(host->io_port, host->n_io_port, "nsp32");
  2362. if (res == NULL) {
  2363. nsp32_msg(KERN_ERR,
  2364. "I/O region 0x%lx+0x%lx is already used",
  2365. data->BaseAddress, data->NumAddress);
  2366. goto free_irq;
  2367. }
  2368. ret = scsi_add_host(host, &pdev->dev);
  2369. if (ret) {
  2370. nsp32_msg(KERN_ERR, "failed to add scsi host");
  2371. goto free_region;
  2372. }
  2373. scsi_scan_host(host);
  2374. pci_set_drvdata(pdev, host);
  2375. return 0;
  2376. free_region:
  2377. release_region(host->io_port, host->n_io_port);
  2378. free_irq:
  2379. free_irq(host->irq, data);
  2380. free_sg_list:
  2381. pci_free_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2382. data->sg_list, data->sg_paddr);
  2383. free_autoparam:
  2384. pci_free_consistent(pdev, sizeof(nsp32_autoparam),
  2385. data->autoparam, data->auto_paddr);
  2386. scsi_unregister:
  2387. scsi_host_put(host);
  2388. err:
  2389. return 1;
  2390. }
  2391. static int nsp32_release(struct Scsi_Host *host)
  2392. {
  2393. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2394. if (data->autoparam) {
  2395. pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
  2396. data->autoparam, data->auto_paddr);
  2397. }
  2398. if (data->sg_list) {
  2399. pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
  2400. data->sg_list, data->sg_paddr);
  2401. }
  2402. if (host->irq) {
  2403. free_irq(host->irq, data);
  2404. }
  2405. if (host->io_port && host->n_io_port) {
  2406. release_region(host->io_port, host->n_io_port);
  2407. }
  2408. if (data->MmioAddress) {
  2409. iounmap(data->MmioAddress);
  2410. }
  2411. return 0;
  2412. }
  2413. static const char *nsp32_info(struct Scsi_Host *shpnt)
  2414. {
  2415. nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
  2416. return data->info_str;
  2417. }
  2418. /****************************************************************************
  2419. * error handler
  2420. */
  2421. static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
  2422. {
  2423. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2424. unsigned int base = SCpnt->device->host->io_port;
  2425. nsp32_msg(KERN_WARNING, "abort");
  2426. if (data->cur_lunt->SCpnt == NULL) {
  2427. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
  2428. return FAILED;
  2429. }
  2430. if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
  2431. /* reset SDTR negotiation */
  2432. data->cur_target->sync_flag = 0;
  2433. nsp32_set_async(data, data->cur_target);
  2434. }
  2435. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2436. nsp32_write2(base, BM_CNT, 0);
  2437. SCpnt->result = DID_ABORT << 16;
  2438. nsp32_scsi_done(SCpnt);
  2439. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
  2440. return SUCCESS;
  2441. }
  2442. static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt)
  2443. {
  2444. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2445. unsigned int base = SCpnt->device->host->io_port;
  2446. spin_lock_irq(SCpnt->device->host->host_lock);
  2447. nsp32_msg(KERN_INFO, "Bus Reset");
  2448. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2449. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2450. nsp32_do_bus_reset(data);
  2451. nsp32_write2(base, IRQ_CONTROL, 0);
  2452. spin_unlock_irq(SCpnt->device->host->host_lock);
  2453. return SUCCESS; /* SCSI bus reset is succeeded at any time. */
  2454. }
  2455. static void nsp32_do_bus_reset(nsp32_hw_data *data)
  2456. {
  2457. unsigned int base = data->BaseAddress;
  2458. unsigned short intrdat;
  2459. int i;
  2460. nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
  2461. /*
  2462. * stop all transfer
  2463. * clear TRANSFERCONTROL_BM_START
  2464. * clear counter
  2465. */
  2466. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2467. nsp32_write4(base, BM_CNT, 0);
  2468. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  2469. /*
  2470. * fall back to asynchronous transfer mode
  2471. * initialize SDTR negotiation flag
  2472. */
  2473. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2474. nsp32_target *target = &data->target[i];
  2475. target->sync_flag = 0;
  2476. nsp32_set_async(data, target);
  2477. }
  2478. /*
  2479. * reset SCSI bus
  2480. */
  2481. nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
  2482. udelay(RESET_HOLD_TIME);
  2483. nsp32_write1(base, SCSI_BUS_CONTROL, 0);
  2484. for(i = 0; i < 5; i++) {
  2485. intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
  2486. nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
  2487. }
  2488. data->CurrentSC = NULL;
  2489. }
  2490. static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
  2491. {
  2492. struct Scsi_Host *host = SCpnt->device->host;
  2493. unsigned int base = SCpnt->device->host->io_port;
  2494. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2495. nsp32_msg(KERN_INFO, "Host Reset");
  2496. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2497. spin_lock_irq(SCpnt->device->host->host_lock);
  2498. nsp32hw_init(data);
  2499. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2500. nsp32_do_bus_reset(data);
  2501. nsp32_write2(base, IRQ_CONTROL, 0);
  2502. spin_unlock_irq(SCpnt->device->host->host_lock);
  2503. return SUCCESS; /* Host reset is succeeded at any time. */
  2504. }
  2505. /**************************************************************************
  2506. * EEPROM handler
  2507. */
  2508. /*
  2509. * getting EEPROM parameter
  2510. */
  2511. static int nsp32_getprom_param(nsp32_hw_data *data)
  2512. {
  2513. int vendor = data->pci_devid->vendor;
  2514. int device = data->pci_devid->device;
  2515. int ret, val, i;
  2516. /*
  2517. * EEPROM checking.
  2518. */
  2519. ret = nsp32_prom_read(data, 0x7e);
  2520. if (ret != 0x55) {
  2521. nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
  2522. return FALSE;
  2523. }
  2524. ret = nsp32_prom_read(data, 0x7f);
  2525. if (ret != 0xaa) {
  2526. nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
  2527. return FALSE;
  2528. }
  2529. /*
  2530. * check EEPROM type
  2531. */
  2532. if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2533. device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
  2534. ret = nsp32_getprom_c16(data);
  2535. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2536. device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
  2537. ret = nsp32_getprom_at24(data);
  2538. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2539. device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
  2540. ret = nsp32_getprom_at24(data);
  2541. } else {
  2542. nsp32_msg(KERN_WARNING, "Unknown EEPROM");
  2543. ret = FALSE;
  2544. }
  2545. /* for debug : SPROM data full checking */
  2546. for (i = 0; i <= 0x1f; i++) {
  2547. val = nsp32_prom_read(data, i);
  2548. nsp32_dbg(NSP32_DEBUG_EEPROM,
  2549. "rom address 0x%x : 0x%x", i, val);
  2550. }
  2551. return ret;
  2552. }
  2553. /*
  2554. * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
  2555. *
  2556. * ROMADDR
  2557. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2558. * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
  2559. * 0x07 : HBA Synchronous Transfer Period
  2560. * Value 0: AutoSync, 1: Manual Setting
  2561. * 0x08 - 0x0f : Not Used? (0x0)
  2562. * 0x10 : Bus Termination
  2563. * Value 0: Auto[ON], 1: ON, 2: OFF
  2564. * 0x11 : Not Used? (0)
  2565. * 0x12 : Bus Reset Delay Time (0x03)
  2566. * 0x13 : Bootable CD Support
  2567. * Value 0: Disable, 1: Enable
  2568. * 0x14 : Device Scan
  2569. * Bit 7 6 5 4 3 2 1 0
  2570. * | <----------------->
  2571. * | SCSI ID: Value 0: Skip, 1: YES
  2572. * |-> Value 0: ALL scan, Value 1: Manual
  2573. * 0x15 - 0x1b : Not Used? (0)
  2574. * 0x1c : Constant? (0x01) (clock div?)
  2575. * 0x1d - 0x7c : Not Used (0xff)
  2576. * 0x7d : Not Used? (0xff)
  2577. * 0x7e : Constant (0x55), Validity signature
  2578. * 0x7f : Constant (0xaa), Validity signature
  2579. */
  2580. static int nsp32_getprom_at24(nsp32_hw_data *data)
  2581. {
  2582. int ret, i;
  2583. int auto_sync;
  2584. nsp32_target *target;
  2585. int entry;
  2586. /*
  2587. * Reset time which is designated by EEPROM.
  2588. *
  2589. * TODO: Not used yet.
  2590. */
  2591. data->resettime = nsp32_prom_read(data, 0x12);
  2592. /*
  2593. * HBA Synchronous Transfer Period
  2594. *
  2595. * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
  2596. * that if auto_sync is 0 (auto), and connected SCSI devices are
  2597. * same or lower than 3, then transfer speed is set as ULTRA-20M.
  2598. * On the contrary if connected SCSI devices are same or higher
  2599. * than 4, then transfer speed is set as FAST-10M.
  2600. *
  2601. * I break this rule. The number of connected SCSI devices are
  2602. * only ignored. If auto_sync is 0 (auto), then transfer speed is
  2603. * forced as ULTRA-20M.
  2604. */
  2605. ret = nsp32_prom_read(data, 0x07);
  2606. switch (ret) {
  2607. case 0:
  2608. auto_sync = TRUE;
  2609. break;
  2610. case 1:
  2611. auto_sync = FALSE;
  2612. break;
  2613. default:
  2614. nsp32_msg(KERN_WARNING,
  2615. "Unsupported Auto Sync mode. Fall back to manual mode.");
  2616. auto_sync = TRUE;
  2617. }
  2618. if (trans_mode == ULTRA20M_MODE) {
  2619. auto_sync = TRUE;
  2620. }
  2621. /*
  2622. * each device Synchronous Transfer Period
  2623. */
  2624. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2625. target = &data->target[i];
  2626. if (auto_sync == TRUE) {
  2627. target->limit_entry = 0; /* set as ULTRA20M */
  2628. } else {
  2629. ret = nsp32_prom_read(data, i);
  2630. entry = nsp32_search_period_entry(data, target, ret);
  2631. if (entry < 0) {
  2632. /* search failed... set maximum speed */
  2633. entry = 0;
  2634. }
  2635. target->limit_entry = entry;
  2636. }
  2637. }
  2638. return TRUE;
  2639. }
  2640. /*
  2641. * C16 110 (I-O Data: SC-NBD) data map:
  2642. *
  2643. * ROMADDR
  2644. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2645. * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
  2646. * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
  2647. * 0x08 - 0x0f : Not Used? (0x0)
  2648. * 0x10 : Transfer Mode
  2649. * Value 0: PIO, 1: Busmater
  2650. * 0x11 : Bus Reset Delay Time (0x00-0x20)
  2651. * 0x12 : Bus Termination
  2652. * Value 0: Disable, 1: Enable
  2653. * 0x13 - 0x19 : Disconnection
  2654. * Value 0: Disable, 1: Enable
  2655. * 0x1a - 0x7c : Not Used? (0)
  2656. * 0x7d : Not Used? (0xf8)
  2657. * 0x7e : Constant (0x55), Validity signature
  2658. * 0x7f : Constant (0xaa), Validity signature
  2659. */
  2660. static int nsp32_getprom_c16(nsp32_hw_data *data)
  2661. {
  2662. int ret, i;
  2663. nsp32_target *target;
  2664. int entry, val;
  2665. /*
  2666. * Reset time which is designated by EEPROM.
  2667. *
  2668. * TODO: Not used yet.
  2669. */
  2670. data->resettime = nsp32_prom_read(data, 0x11);
  2671. /*
  2672. * each device Synchronous Transfer Period
  2673. */
  2674. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2675. target = &data->target[i];
  2676. ret = nsp32_prom_read(data, i);
  2677. switch (ret) {
  2678. case 0: /* 20MB/s */
  2679. val = 0x0c;
  2680. break;
  2681. case 1: /* 10MB/s */
  2682. val = 0x19;
  2683. break;
  2684. case 2: /* 5MB/s */
  2685. val = 0x32;
  2686. break;
  2687. case 3: /* ASYNC */
  2688. val = 0x00;
  2689. break;
  2690. default: /* default 20MB/s */
  2691. val = 0x0c;
  2692. break;
  2693. }
  2694. entry = nsp32_search_period_entry(data, target, val);
  2695. if (entry < 0 || trans_mode == ULTRA20M_MODE) {
  2696. /* search failed... set maximum speed */
  2697. entry = 0;
  2698. }
  2699. target->limit_entry = entry;
  2700. }
  2701. return TRUE;
  2702. }
  2703. /*
  2704. * Atmel AT24C01A (drived in 5V) serial EEPROM routines
  2705. */
  2706. static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
  2707. {
  2708. int i, val;
  2709. /* start condition */
  2710. nsp32_prom_start(data);
  2711. /* device address */
  2712. nsp32_prom_write_bit(data, 1); /* 1 */
  2713. nsp32_prom_write_bit(data, 0); /* 0 */
  2714. nsp32_prom_write_bit(data, 1); /* 1 */
  2715. nsp32_prom_write_bit(data, 0); /* 0 */
  2716. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2717. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2718. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2719. /* R/W: W for dummy write */
  2720. nsp32_prom_write_bit(data, 0);
  2721. /* ack */
  2722. nsp32_prom_write_bit(data, 0);
  2723. /* word address */
  2724. for (i = 7; i >= 0; i--) {
  2725. nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
  2726. }
  2727. /* ack */
  2728. nsp32_prom_write_bit(data, 0);
  2729. /* start condition */
  2730. nsp32_prom_start(data);
  2731. /* device address */
  2732. nsp32_prom_write_bit(data, 1); /* 1 */
  2733. nsp32_prom_write_bit(data, 0); /* 0 */
  2734. nsp32_prom_write_bit(data, 1); /* 1 */
  2735. nsp32_prom_write_bit(data, 0); /* 0 */
  2736. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2737. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2738. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2739. /* R/W: R */
  2740. nsp32_prom_write_bit(data, 1);
  2741. /* ack */
  2742. nsp32_prom_write_bit(data, 0);
  2743. /* data... */
  2744. val = 0;
  2745. for (i = 7; i >= 0; i--) {
  2746. val += (nsp32_prom_read_bit(data) << i);
  2747. }
  2748. /* no ack */
  2749. nsp32_prom_write_bit(data, 1);
  2750. /* stop condition */
  2751. nsp32_prom_stop(data);
  2752. return val;
  2753. }
  2754. static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
  2755. {
  2756. int base = data->BaseAddress;
  2757. int tmp;
  2758. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
  2759. if (val == 0) {
  2760. tmp &= ~bit;
  2761. } else {
  2762. tmp |= bit;
  2763. }
  2764. nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
  2765. udelay(10);
  2766. }
  2767. static int nsp32_prom_get(nsp32_hw_data *data, int bit)
  2768. {
  2769. int base = data->BaseAddress;
  2770. int tmp, ret;
  2771. if (bit != SDA) {
  2772. nsp32_msg(KERN_ERR, "return value is not appropriate");
  2773. return 0;
  2774. }
  2775. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
  2776. if (tmp == 0) {
  2777. ret = 0;
  2778. } else {
  2779. ret = 1;
  2780. }
  2781. udelay(10);
  2782. return ret;
  2783. }
  2784. static void nsp32_prom_start (nsp32_hw_data *data)
  2785. {
  2786. /* start condition */
  2787. nsp32_prom_set(data, SCL, 1);
  2788. nsp32_prom_set(data, SDA, 1);
  2789. nsp32_prom_set(data, ENA, 1); /* output mode */
  2790. nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
  2791. * SDA 1->0 is start condition */
  2792. nsp32_prom_set(data, SCL, 0);
  2793. }
  2794. static void nsp32_prom_stop (nsp32_hw_data *data)
  2795. {
  2796. /* stop condition */
  2797. nsp32_prom_set(data, SCL, 1);
  2798. nsp32_prom_set(data, SDA, 0);
  2799. nsp32_prom_set(data, ENA, 1); /* output mode */
  2800. nsp32_prom_set(data, SDA, 1);
  2801. nsp32_prom_set(data, SCL, 0);
  2802. }
  2803. static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
  2804. {
  2805. /* write */
  2806. nsp32_prom_set(data, SDA, val);
  2807. nsp32_prom_set(data, SCL, 1 );
  2808. nsp32_prom_set(data, SCL, 0 );
  2809. }
  2810. static int nsp32_prom_read_bit(nsp32_hw_data *data)
  2811. {
  2812. int val;
  2813. /* read */
  2814. nsp32_prom_set(data, ENA, 0); /* input mode */
  2815. nsp32_prom_set(data, SCL, 1);
  2816. val = nsp32_prom_get(data, SDA);
  2817. nsp32_prom_set(data, SCL, 0);
  2818. nsp32_prom_set(data, ENA, 1); /* output mode */
  2819. return val;
  2820. }
  2821. /**************************************************************************
  2822. * Power Management
  2823. */
  2824. #ifdef CONFIG_PM
  2825. /* Device suspended */
  2826. static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
  2827. {
  2828. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2829. nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
  2830. pci_save_state (pdev);
  2831. pci_disable_device (pdev);
  2832. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2833. return 0;
  2834. }
  2835. /* Device woken up */
  2836. static int nsp32_resume(struct pci_dev *pdev)
  2837. {
  2838. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2839. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2840. unsigned short reg;
  2841. nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
  2842. pci_set_power_state(pdev, PCI_D0);
  2843. pci_enable_wake (pdev, PCI_D0, 0);
  2844. pci_restore_state (pdev);
  2845. reg = nsp32_read2(data->BaseAddress, INDEX_REG);
  2846. nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
  2847. if (reg == 0xffff) {
  2848. nsp32_msg(KERN_INFO, "missing device. abort resume.");
  2849. return 0;
  2850. }
  2851. nsp32hw_init (data);
  2852. nsp32_do_bus_reset(data);
  2853. nsp32_msg(KERN_INFO, "resume success");
  2854. return 0;
  2855. }
  2856. #endif
  2857. /************************************************************************
  2858. * PCI/Cardbus probe/remove routine
  2859. */
  2860. static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2861. {
  2862. int ret;
  2863. nsp32_hw_data *data = &nsp32_data_base;
  2864. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2865. ret = pci_enable_device(pdev);
  2866. if (ret) {
  2867. nsp32_msg(KERN_ERR, "failed to enable pci device");
  2868. return ret;
  2869. }
  2870. data->Pci = pdev;
  2871. data->pci_devid = id;
  2872. data->IrqNumber = pdev->irq;
  2873. data->BaseAddress = pci_resource_start(pdev, 0);
  2874. data->NumAddress = pci_resource_len (pdev, 0);
  2875. data->MmioAddress = pci_ioremap_bar(pdev, 1);
  2876. data->MmioLength = pci_resource_len (pdev, 1);
  2877. pci_set_master(pdev);
  2878. ret = nsp32_detect(pdev);
  2879. nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
  2880. pdev->irq,
  2881. data->MmioAddress, data->MmioLength,
  2882. pci_name(pdev),
  2883. nsp32_model[id->driver_data]);
  2884. nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
  2885. return ret;
  2886. }
  2887. static void __devexit nsp32_remove(struct pci_dev *pdev)
  2888. {
  2889. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2890. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2891. scsi_remove_host(host);
  2892. nsp32_release(host);
  2893. scsi_host_put(host);
  2894. }
  2895. static struct pci_driver nsp32_driver = {
  2896. .name = "nsp32",
  2897. .id_table = nsp32_pci_table,
  2898. .probe = nsp32_probe,
  2899. .remove = __devexit_p(nsp32_remove),
  2900. #ifdef CONFIG_PM
  2901. .suspend = nsp32_suspend,
  2902. .resume = nsp32_resume,
  2903. #endif
  2904. };
  2905. /*********************************************************************
  2906. * Moule entry point
  2907. */
  2908. static int __init init_nsp32(void) {
  2909. nsp32_msg(KERN_INFO, "loading...");
  2910. return pci_register_driver(&nsp32_driver);
  2911. }
  2912. static void __exit exit_nsp32(void) {
  2913. nsp32_msg(KERN_INFO, "unloading...");
  2914. pci_unregister_driver(&nsp32_driver);
  2915. }
  2916. module_init(init_nsp32);
  2917. module_exit(exit_nsp32);
  2918. /* end */