rtc-sa1100.c 9.5 KB

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  1. /*
  2. * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
  3. *
  4. * Copyright (c) 2000 Nils Faerber
  5. *
  6. * Based on rtc.c by Paul Gortmaker
  7. *
  8. * Original Driver by Nils Faerber <nils@kernelconcepts.de>
  9. *
  10. * Modifications from:
  11. * CIH <cih@coventive.com>
  12. * Nicolas Pitre <nico@fluxnic.net>
  13. * Andrew Christian <andrew.christian@hp.com>
  14. *
  15. * Converted to the RTC subsystem and Driver Model
  16. * by Richard Purdie <rpurdie@rpsys.net>
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License
  20. * as published by the Free Software Foundation; either version
  21. * 2 of the License, or (at your option) any later version.
  22. */
  23. #include <linux/platform_device.h>
  24. #include <linux/module.h>
  25. #include <linux/rtc.h>
  26. #include <linux/init.h>
  27. #include <linux/fs.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/string.h>
  30. #include <linux/pm.h>
  31. #include <linux/bitops.h>
  32. #include <mach/hardware.h>
  33. #include <asm/irq.h>
  34. #ifdef CONFIG_ARCH_PXA
  35. #include <mach/regs-rtc.h>
  36. #include <mach/regs-ost.h>
  37. #endif
  38. #define RTC_DEF_DIVIDER (32768 - 1)
  39. #define RTC_DEF_TRIM 0
  40. static const unsigned long RTC_FREQ = 1024;
  41. static struct rtc_time rtc_alarm;
  42. static DEFINE_SPINLOCK(sa1100_rtc_lock);
  43. static inline int rtc_periodic_alarm(struct rtc_time *tm)
  44. {
  45. return (tm->tm_year == -1) ||
  46. ((unsigned)tm->tm_mon >= 12) ||
  47. ((unsigned)(tm->tm_mday - 1) >= 31) ||
  48. ((unsigned)tm->tm_hour > 23) ||
  49. ((unsigned)tm->tm_min > 59) ||
  50. ((unsigned)tm->tm_sec > 59);
  51. }
  52. /*
  53. * Calculate the next alarm time given the requested alarm time mask
  54. * and the current time.
  55. */
  56. static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
  57. struct rtc_time *alrm)
  58. {
  59. unsigned long next_time;
  60. unsigned long now_time;
  61. next->tm_year = now->tm_year;
  62. next->tm_mon = now->tm_mon;
  63. next->tm_mday = now->tm_mday;
  64. next->tm_hour = alrm->tm_hour;
  65. next->tm_min = alrm->tm_min;
  66. next->tm_sec = alrm->tm_sec;
  67. rtc_tm_to_time(now, &now_time);
  68. rtc_tm_to_time(next, &next_time);
  69. if (next_time < now_time) {
  70. /* Advance one day */
  71. next_time += 60 * 60 * 24;
  72. rtc_time_to_tm(next_time, next);
  73. }
  74. }
  75. static int rtc_update_alarm(struct rtc_time *alrm)
  76. {
  77. struct rtc_time alarm_tm, now_tm;
  78. unsigned long now, time;
  79. int ret;
  80. do {
  81. now = RCNR;
  82. rtc_time_to_tm(now, &now_tm);
  83. rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
  84. ret = rtc_tm_to_time(&alarm_tm, &time);
  85. if (ret != 0)
  86. break;
  87. RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
  88. RTAR = time;
  89. } while (now != RCNR);
  90. return ret;
  91. }
  92. static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
  93. {
  94. struct platform_device *pdev = to_platform_device(dev_id);
  95. struct rtc_device *rtc = platform_get_drvdata(pdev);
  96. unsigned int rtsr;
  97. unsigned long events = 0;
  98. spin_lock(&sa1100_rtc_lock);
  99. rtsr = RTSR;
  100. /* clear interrupt sources */
  101. RTSR = 0;
  102. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  103. * See also the comments in sa1100_rtc_probe(). */
  104. if (rtsr & (RTSR_ALE | RTSR_HZE)) {
  105. /* This is the original code, before there was the if test
  106. * above. This code does not clear interrupts that were not
  107. * enabled. */
  108. RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
  109. } else {
  110. /* For some reason, it is possible to enter this routine
  111. * without interruptions enabled, it has been tested with
  112. * several units (Bug in SA11xx chip?).
  113. *
  114. * This situation leads to an infinite "loop" of interrupt
  115. * routine calling and as a result the processor seems to
  116. * lock on its first call to open(). */
  117. RTSR = RTSR_AL | RTSR_HZ;
  118. }
  119. /* clear alarm interrupt if it has occurred */
  120. if (rtsr & RTSR_AL)
  121. rtsr &= ~RTSR_ALE;
  122. RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
  123. /* update irq data & counter */
  124. if (rtsr & RTSR_AL)
  125. events |= RTC_AF | RTC_IRQF;
  126. if (rtsr & RTSR_HZ)
  127. events |= RTC_UF | RTC_IRQF;
  128. rtc_update_irq(rtc, 1, events);
  129. if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
  130. rtc_update_alarm(&rtc_alarm);
  131. spin_unlock(&sa1100_rtc_lock);
  132. return IRQ_HANDLED;
  133. }
  134. static int sa1100_rtc_open(struct device *dev)
  135. {
  136. int ret;
  137. struct platform_device *plat_dev = to_platform_device(dev);
  138. struct rtc_device *rtc = platform_get_drvdata(plat_dev);
  139. ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
  140. "rtc 1Hz", dev);
  141. if (ret) {
  142. dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
  143. goto fail_ui;
  144. }
  145. ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
  146. "rtc Alrm", dev);
  147. if (ret) {
  148. dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
  149. goto fail_ai;
  150. }
  151. rtc->max_user_freq = RTC_FREQ;
  152. rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
  153. return 0;
  154. fail_ai:
  155. free_irq(IRQ_RTC1Hz, dev);
  156. fail_ui:
  157. return ret;
  158. }
  159. static void sa1100_rtc_release(struct device *dev)
  160. {
  161. spin_lock_irq(&sa1100_rtc_lock);
  162. RTSR = 0;
  163. OIER &= ~OIER_E1;
  164. OSSR = OSSR_M1;
  165. spin_unlock_irq(&sa1100_rtc_lock);
  166. free_irq(IRQ_RTCAlrm, dev);
  167. free_irq(IRQ_RTC1Hz, dev);
  168. }
  169. static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  170. {
  171. spin_lock_irq(&sa1100_rtc_lock);
  172. if (enabled)
  173. RTSR |= RTSR_ALE;
  174. else
  175. RTSR &= ~RTSR_ALE;
  176. spin_unlock_irq(&sa1100_rtc_lock);
  177. return 0;
  178. }
  179. static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
  180. {
  181. rtc_time_to_tm(RCNR, tm);
  182. return 0;
  183. }
  184. static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
  185. {
  186. unsigned long time;
  187. int ret;
  188. ret = rtc_tm_to_time(tm, &time);
  189. if (ret == 0)
  190. RCNR = time;
  191. return ret;
  192. }
  193. static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  194. {
  195. u32 rtsr;
  196. memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
  197. rtsr = RTSR;
  198. alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
  199. alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
  200. return 0;
  201. }
  202. static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  203. {
  204. int ret;
  205. spin_lock_irq(&sa1100_rtc_lock);
  206. ret = rtc_update_alarm(&alrm->time);
  207. if (ret == 0) {
  208. if (alrm->enabled)
  209. RTSR |= RTSR_ALE;
  210. else
  211. RTSR &= ~RTSR_ALE;
  212. }
  213. spin_unlock_irq(&sa1100_rtc_lock);
  214. return ret;
  215. }
  216. static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
  217. {
  218. seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
  219. seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
  220. return 0;
  221. }
  222. static const struct rtc_class_ops sa1100_rtc_ops = {
  223. .open = sa1100_rtc_open,
  224. .release = sa1100_rtc_release,
  225. .read_time = sa1100_rtc_read_time,
  226. .set_time = sa1100_rtc_set_time,
  227. .read_alarm = sa1100_rtc_read_alarm,
  228. .set_alarm = sa1100_rtc_set_alarm,
  229. .proc = sa1100_rtc_proc,
  230. .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
  231. };
  232. static int sa1100_rtc_probe(struct platform_device *pdev)
  233. {
  234. struct rtc_device *rtc;
  235. /*
  236. * According to the manual we should be able to let RTTR be zero
  237. * and then a default diviser for a 32.768KHz clock is used.
  238. * Apparently this doesn't work, at least for my SA1110 rev 5.
  239. * If the clock divider is uninitialized then reset it to the
  240. * default value to get the 1Hz clock.
  241. */
  242. if (RTTR == 0) {
  243. RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
  244. dev_warn(&pdev->dev, "warning: "
  245. "initializing default clock divider/trim value\n");
  246. /* The current RTC value probably doesn't make sense either */
  247. RCNR = 0;
  248. }
  249. device_init_wakeup(&pdev->dev, 1);
  250. rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
  251. THIS_MODULE);
  252. if (IS_ERR(rtc))
  253. return PTR_ERR(rtc);
  254. platform_set_drvdata(pdev, rtc);
  255. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  256. * See also the comments in sa1100_rtc_interrupt().
  257. *
  258. * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
  259. * interrupt pending, even though interrupts were never enabled.
  260. * In this case, this bit it must be reset before enabling
  261. * interruptions to avoid a nonexistent interrupt to occur.
  262. *
  263. * In principle, the same problem would apply to bit 0, although it has
  264. * never been observed to happen.
  265. *
  266. * This issue is addressed both here and in sa1100_rtc_interrupt().
  267. * If the issue is not addressed here, in the times when the processor
  268. * wakes up with the bit set there will be one spurious interrupt.
  269. *
  270. * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
  271. * safe side, once the condition that lead to this strange
  272. * initialization is unknown and could in principle happen during
  273. * normal processing.
  274. *
  275. * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
  276. * the corresponding bits in RTSR. */
  277. RTSR = RTSR_AL | RTSR_HZ;
  278. return 0;
  279. }
  280. static int sa1100_rtc_remove(struct platform_device *pdev)
  281. {
  282. struct rtc_device *rtc = platform_get_drvdata(pdev);
  283. if (rtc)
  284. rtc_device_unregister(rtc);
  285. return 0;
  286. }
  287. #ifdef CONFIG_PM
  288. static int sa1100_rtc_suspend(struct device *dev)
  289. {
  290. if (device_may_wakeup(dev))
  291. enable_irq_wake(IRQ_RTCAlrm);
  292. return 0;
  293. }
  294. static int sa1100_rtc_resume(struct device *dev)
  295. {
  296. if (device_may_wakeup(dev))
  297. disable_irq_wake(IRQ_RTCAlrm);
  298. return 0;
  299. }
  300. static const struct dev_pm_ops sa1100_rtc_pm_ops = {
  301. .suspend = sa1100_rtc_suspend,
  302. .resume = sa1100_rtc_resume,
  303. };
  304. #endif
  305. static struct platform_driver sa1100_rtc_driver = {
  306. .probe = sa1100_rtc_probe,
  307. .remove = sa1100_rtc_remove,
  308. .driver = {
  309. .name = "sa1100-rtc",
  310. #ifdef CONFIG_PM
  311. .pm = &sa1100_rtc_pm_ops,
  312. #endif
  313. },
  314. };
  315. static int __init sa1100_rtc_init(void)
  316. {
  317. return platform_driver_register(&sa1100_rtc_driver);
  318. }
  319. static void __exit sa1100_rtc_exit(void)
  320. {
  321. platform_driver_unregister(&sa1100_rtc_driver);
  322. }
  323. module_init(sa1100_rtc_init);
  324. module_exit(sa1100_rtc_exit);
  325. MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
  326. MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
  327. MODULE_LICENSE("GPL");
  328. MODULE_ALIAS("platform:sa1100-rtc");