rtc-ds1307.c 24 KB

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  1. /*
  2. * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
  3. *
  4. * Copyright (C) 2005 James Chapman (ds1337 core)
  5. * Copyright (C) 2006 David Brownell
  6. * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/slab.h>
  15. #include <linux/i2c.h>
  16. #include <linux/string.h>
  17. #include <linux/rtc.h>
  18. #include <linux/bcd.h>
  19. /* We can't determine type by probing, but if we expect pre-Linux code
  20. * to have set the chip up as a clock (turning on the oscillator and
  21. * setting the date and time), Linux can ignore the non-clock features.
  22. * That's a natural job for a factory or repair bench.
  23. */
  24. enum ds_type {
  25. ds_1307,
  26. ds_1337,
  27. ds_1338,
  28. ds_1339,
  29. ds_1340,
  30. ds_1388,
  31. ds_3231,
  32. m41t00,
  33. rx_8025,
  34. // rs5c372 too? different address...
  35. };
  36. /* RTC registers don't differ much, except for the century flag */
  37. #define DS1307_REG_SECS 0x00 /* 00-59 */
  38. # define DS1307_BIT_CH 0x80
  39. # define DS1340_BIT_nEOSC 0x80
  40. #define DS1307_REG_MIN 0x01 /* 00-59 */
  41. #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
  42. # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
  43. # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
  44. # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
  45. # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
  46. #define DS1307_REG_WDAY 0x03 /* 01-07 */
  47. #define DS1307_REG_MDAY 0x04 /* 01-31 */
  48. #define DS1307_REG_MONTH 0x05 /* 01-12 */
  49. # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
  50. #define DS1307_REG_YEAR 0x06 /* 00-99 */
  51. /* Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  52. * start at 7, and they differ a LOT. Only control and status matter for
  53. * basic RTC date and time functionality; be careful using them.
  54. */
  55. #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
  56. # define DS1307_BIT_OUT 0x80
  57. # define DS1338_BIT_OSF 0x20
  58. # define DS1307_BIT_SQWE 0x10
  59. # define DS1307_BIT_RS1 0x02
  60. # define DS1307_BIT_RS0 0x01
  61. #define DS1337_REG_CONTROL 0x0e
  62. # define DS1337_BIT_nEOSC 0x80
  63. # define DS1339_BIT_BBSQI 0x20
  64. # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
  65. # define DS1337_BIT_RS2 0x10
  66. # define DS1337_BIT_RS1 0x08
  67. # define DS1337_BIT_INTCN 0x04
  68. # define DS1337_BIT_A2IE 0x02
  69. # define DS1337_BIT_A1IE 0x01
  70. #define DS1340_REG_CONTROL 0x07
  71. # define DS1340_BIT_OUT 0x80
  72. # define DS1340_BIT_FT 0x40
  73. # define DS1340_BIT_CALIB_SIGN 0x20
  74. # define DS1340_M_CALIBRATION 0x1f
  75. #define DS1340_REG_FLAG 0x09
  76. # define DS1340_BIT_OSF 0x80
  77. #define DS1337_REG_STATUS 0x0f
  78. # define DS1337_BIT_OSF 0x80
  79. # define DS1337_BIT_A2I 0x02
  80. # define DS1337_BIT_A1I 0x01
  81. #define DS1339_REG_ALARM1_SECS 0x07
  82. #define DS1339_REG_TRICKLE 0x10
  83. #define RX8025_REG_CTRL1 0x0e
  84. # define RX8025_BIT_2412 0x20
  85. #define RX8025_REG_CTRL2 0x0f
  86. # define RX8025_BIT_PON 0x10
  87. # define RX8025_BIT_VDET 0x40
  88. # define RX8025_BIT_XST 0x20
  89. struct ds1307 {
  90. u8 offset; /* register's offset */
  91. u8 regs[11];
  92. enum ds_type type;
  93. unsigned long flags;
  94. #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
  95. #define HAS_ALARM 1 /* bit 1 == irq claimed */
  96. struct i2c_client *client;
  97. struct rtc_device *rtc;
  98. struct work_struct work;
  99. s32 (*read_block_data)(const struct i2c_client *client, u8 command,
  100. u8 length, u8 *values);
  101. s32 (*write_block_data)(const struct i2c_client *client, u8 command,
  102. u8 length, const u8 *values);
  103. };
  104. struct chip_desc {
  105. unsigned nvram56:1;
  106. unsigned alarm:1;
  107. };
  108. static const struct chip_desc chips[] = {
  109. [ds_1307] = {
  110. .nvram56 = 1,
  111. },
  112. [ds_1337] = {
  113. .alarm = 1,
  114. },
  115. [ds_1338] = {
  116. .nvram56 = 1,
  117. },
  118. [ds_1339] = {
  119. .alarm = 1,
  120. },
  121. [ds_1340] = {
  122. },
  123. [ds_3231] = {
  124. .alarm = 1,
  125. },
  126. [m41t00] = {
  127. },
  128. [rx_8025] = {
  129. }, };
  130. static const struct i2c_device_id ds1307_id[] = {
  131. { "ds1307", ds_1307 },
  132. { "ds1337", ds_1337 },
  133. { "ds1338", ds_1338 },
  134. { "ds1339", ds_1339 },
  135. { "ds1388", ds_1388 },
  136. { "ds1340", ds_1340 },
  137. { "ds3231", ds_3231 },
  138. { "m41t00", m41t00 },
  139. { "pt7c4338", ds_1307 },
  140. { "rx8025", rx_8025 },
  141. { }
  142. };
  143. MODULE_DEVICE_TABLE(i2c, ds1307_id);
  144. /*----------------------------------------------------------------------*/
  145. #define BLOCK_DATA_MAX_TRIES 10
  146. static s32 ds1307_read_block_data_once(const struct i2c_client *client,
  147. u8 command, u8 length, u8 *values)
  148. {
  149. s32 i, data;
  150. for (i = 0; i < length; i++) {
  151. data = i2c_smbus_read_byte_data(client, command + i);
  152. if (data < 0)
  153. return data;
  154. values[i] = data;
  155. }
  156. return i;
  157. }
  158. static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
  159. u8 length, u8 *values)
  160. {
  161. u8 oldvalues[I2C_SMBUS_BLOCK_MAX];
  162. s32 ret;
  163. int tries = 0;
  164. dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
  165. ret = ds1307_read_block_data_once(client, command, length, values);
  166. if (ret < 0)
  167. return ret;
  168. do {
  169. if (++tries > BLOCK_DATA_MAX_TRIES) {
  170. dev_err(&client->dev,
  171. "ds1307_read_block_data failed\n");
  172. return -EIO;
  173. }
  174. memcpy(oldvalues, values, length);
  175. ret = ds1307_read_block_data_once(client, command, length,
  176. values);
  177. if (ret < 0)
  178. return ret;
  179. } while (memcmp(oldvalues, values, length));
  180. return length;
  181. }
  182. static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
  183. u8 length, const u8 *values)
  184. {
  185. u8 currvalues[I2C_SMBUS_BLOCK_MAX];
  186. int tries = 0;
  187. dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
  188. do {
  189. s32 i, ret;
  190. if (++tries > BLOCK_DATA_MAX_TRIES) {
  191. dev_err(&client->dev,
  192. "ds1307_write_block_data failed\n");
  193. return -EIO;
  194. }
  195. for (i = 0; i < length; i++) {
  196. ret = i2c_smbus_write_byte_data(client, command + i,
  197. values[i]);
  198. if (ret < 0)
  199. return ret;
  200. }
  201. ret = ds1307_read_block_data_once(client, command, length,
  202. currvalues);
  203. if (ret < 0)
  204. return ret;
  205. } while (memcmp(currvalues, values, length));
  206. return length;
  207. }
  208. /*----------------------------------------------------------------------*/
  209. /*
  210. * The IRQ logic includes a "real" handler running in IRQ context just
  211. * long enough to schedule this workqueue entry. We need a task context
  212. * to talk to the RTC, since I2C I/O calls require that; and disable the
  213. * IRQ until we clear its status on the chip, so that this handler can
  214. * work with any type of triggering (not just falling edge).
  215. *
  216. * The ds1337 and ds1339 both have two alarms, but we only use the first
  217. * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
  218. * signal; ds1339 chips have only one alarm signal.
  219. */
  220. static void ds1307_work(struct work_struct *work)
  221. {
  222. struct ds1307 *ds1307;
  223. struct i2c_client *client;
  224. struct mutex *lock;
  225. int stat, control;
  226. ds1307 = container_of(work, struct ds1307, work);
  227. client = ds1307->client;
  228. lock = &ds1307->rtc->ops_lock;
  229. mutex_lock(lock);
  230. stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
  231. if (stat < 0)
  232. goto out;
  233. if (stat & DS1337_BIT_A1I) {
  234. stat &= ~DS1337_BIT_A1I;
  235. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
  236. control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  237. if (control < 0)
  238. goto out;
  239. control &= ~DS1337_BIT_A1IE;
  240. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
  241. rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
  242. }
  243. out:
  244. if (test_bit(HAS_ALARM, &ds1307->flags))
  245. enable_irq(client->irq);
  246. mutex_unlock(lock);
  247. }
  248. static irqreturn_t ds1307_irq(int irq, void *dev_id)
  249. {
  250. struct i2c_client *client = dev_id;
  251. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  252. disable_irq_nosync(irq);
  253. schedule_work(&ds1307->work);
  254. return IRQ_HANDLED;
  255. }
  256. /*----------------------------------------------------------------------*/
  257. static int ds1307_get_time(struct device *dev, struct rtc_time *t)
  258. {
  259. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  260. int tmp;
  261. /* read the RTC date and time registers all at once */
  262. tmp = ds1307->read_block_data(ds1307->client,
  263. ds1307->offset, 7, ds1307->regs);
  264. if (tmp != 7) {
  265. dev_err(dev, "%s error %d\n", "read", tmp);
  266. return -EIO;
  267. }
  268. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  269. "read",
  270. ds1307->regs[0], ds1307->regs[1],
  271. ds1307->regs[2], ds1307->regs[3],
  272. ds1307->regs[4], ds1307->regs[5],
  273. ds1307->regs[6]);
  274. t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
  275. t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
  276. tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
  277. t->tm_hour = bcd2bin(tmp);
  278. t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
  279. t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
  280. tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
  281. t->tm_mon = bcd2bin(tmp) - 1;
  282. /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
  283. t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
  284. dev_dbg(dev, "%s secs=%d, mins=%d, "
  285. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  286. "read", t->tm_sec, t->tm_min,
  287. t->tm_hour, t->tm_mday,
  288. t->tm_mon, t->tm_year, t->tm_wday);
  289. /* initial clock setting can be undefined */
  290. return rtc_valid_tm(t);
  291. }
  292. static int ds1307_set_time(struct device *dev, struct rtc_time *t)
  293. {
  294. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  295. int result;
  296. int tmp;
  297. u8 *buf = ds1307->regs;
  298. dev_dbg(dev, "%s secs=%d, mins=%d, "
  299. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  300. "write", t->tm_sec, t->tm_min,
  301. t->tm_hour, t->tm_mday,
  302. t->tm_mon, t->tm_year, t->tm_wday);
  303. buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
  304. buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
  305. buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
  306. buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
  307. buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
  308. buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
  309. /* assume 20YY not 19YY */
  310. tmp = t->tm_year - 100;
  311. buf[DS1307_REG_YEAR] = bin2bcd(tmp);
  312. switch (ds1307->type) {
  313. case ds_1337:
  314. case ds_1339:
  315. case ds_3231:
  316. buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
  317. break;
  318. case ds_1340:
  319. buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
  320. | DS1340_BIT_CENTURY;
  321. break;
  322. default:
  323. break;
  324. }
  325. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  326. "write", buf[0], buf[1], buf[2], buf[3],
  327. buf[4], buf[5], buf[6]);
  328. result = ds1307->write_block_data(ds1307->client,
  329. ds1307->offset, 7, buf);
  330. if (result < 0) {
  331. dev_err(dev, "%s error %d\n", "write", result);
  332. return result;
  333. }
  334. return 0;
  335. }
  336. static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  337. {
  338. struct i2c_client *client = to_i2c_client(dev);
  339. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  340. int ret;
  341. if (!test_bit(HAS_ALARM, &ds1307->flags))
  342. return -EINVAL;
  343. /* read all ALARM1, ALARM2, and status registers at once */
  344. ret = ds1307->read_block_data(client,
  345. DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
  346. if (ret != 9) {
  347. dev_err(dev, "%s error %d\n", "alarm read", ret);
  348. return -EIO;
  349. }
  350. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  351. "alarm read",
  352. ds1307->regs[0], ds1307->regs[1],
  353. ds1307->regs[2], ds1307->regs[3],
  354. ds1307->regs[4], ds1307->regs[5],
  355. ds1307->regs[6], ds1307->regs[7],
  356. ds1307->regs[8]);
  357. /* report alarm time (ALARM1); assume 24 hour and day-of-month modes,
  358. * and that all four fields are checked matches
  359. */
  360. t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
  361. t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
  362. t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
  363. t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
  364. t->time.tm_mon = -1;
  365. t->time.tm_year = -1;
  366. t->time.tm_wday = -1;
  367. t->time.tm_yday = -1;
  368. t->time.tm_isdst = -1;
  369. /* ... and status */
  370. t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
  371. t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
  372. dev_dbg(dev, "%s secs=%d, mins=%d, "
  373. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  374. "alarm read", t->time.tm_sec, t->time.tm_min,
  375. t->time.tm_hour, t->time.tm_mday,
  376. t->enabled, t->pending);
  377. return 0;
  378. }
  379. static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  380. {
  381. struct i2c_client *client = to_i2c_client(dev);
  382. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  383. unsigned char *buf = ds1307->regs;
  384. u8 control, status;
  385. int ret;
  386. if (!test_bit(HAS_ALARM, &ds1307->flags))
  387. return -EINVAL;
  388. dev_dbg(dev, "%s secs=%d, mins=%d, "
  389. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  390. "alarm set", t->time.tm_sec, t->time.tm_min,
  391. t->time.tm_hour, t->time.tm_mday,
  392. t->enabled, t->pending);
  393. /* read current status of both alarms and the chip */
  394. ret = ds1307->read_block_data(client,
  395. DS1339_REG_ALARM1_SECS, 9, buf);
  396. if (ret != 9) {
  397. dev_err(dev, "%s error %d\n", "alarm write", ret);
  398. return -EIO;
  399. }
  400. control = ds1307->regs[7];
  401. status = ds1307->regs[8];
  402. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  403. "alarm set (old status)",
  404. ds1307->regs[0], ds1307->regs[1],
  405. ds1307->regs[2], ds1307->regs[3],
  406. ds1307->regs[4], ds1307->regs[5],
  407. ds1307->regs[6], control, status);
  408. /* set ALARM1, using 24 hour and day-of-month modes */
  409. buf[0] = bin2bcd(t->time.tm_sec);
  410. buf[1] = bin2bcd(t->time.tm_min);
  411. buf[2] = bin2bcd(t->time.tm_hour);
  412. buf[3] = bin2bcd(t->time.tm_mday);
  413. /* set ALARM2 to non-garbage */
  414. buf[4] = 0;
  415. buf[5] = 0;
  416. buf[6] = 0;
  417. /* optionally enable ALARM1 */
  418. buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
  419. if (t->enabled) {
  420. dev_dbg(dev, "alarm IRQ armed\n");
  421. buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
  422. }
  423. buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
  424. ret = ds1307->write_block_data(client,
  425. DS1339_REG_ALARM1_SECS, 9, buf);
  426. if (ret < 0) {
  427. dev_err(dev, "can't set alarm time\n");
  428. return ret;
  429. }
  430. return 0;
  431. }
  432. static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
  433. {
  434. struct i2c_client *client = to_i2c_client(dev);
  435. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  436. int ret;
  437. if (!test_bit(HAS_ALARM, &ds1307->flags))
  438. return -ENOTTY;
  439. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  440. if (ret < 0)
  441. return ret;
  442. if (enabled)
  443. ret |= DS1337_BIT_A1IE;
  444. else
  445. ret &= ~DS1337_BIT_A1IE;
  446. ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
  447. if (ret < 0)
  448. return ret;
  449. return 0;
  450. }
  451. static const struct rtc_class_ops ds13xx_rtc_ops = {
  452. .read_time = ds1307_get_time,
  453. .set_time = ds1307_set_time,
  454. .read_alarm = ds1337_read_alarm,
  455. .set_alarm = ds1337_set_alarm,
  456. .alarm_irq_enable = ds1307_alarm_irq_enable,
  457. };
  458. /*----------------------------------------------------------------------*/
  459. #define NVRAM_SIZE 56
  460. static ssize_t
  461. ds1307_nvram_read(struct file *filp, struct kobject *kobj,
  462. struct bin_attribute *attr,
  463. char *buf, loff_t off, size_t count)
  464. {
  465. struct i2c_client *client;
  466. struct ds1307 *ds1307;
  467. int result;
  468. client = kobj_to_i2c_client(kobj);
  469. ds1307 = i2c_get_clientdata(client);
  470. if (unlikely(off >= NVRAM_SIZE))
  471. return 0;
  472. if ((off + count) > NVRAM_SIZE)
  473. count = NVRAM_SIZE - off;
  474. if (unlikely(!count))
  475. return count;
  476. result = ds1307->read_block_data(client, 8 + off, count, buf);
  477. if (result < 0)
  478. dev_err(&client->dev, "%s error %d\n", "nvram read", result);
  479. return result;
  480. }
  481. static ssize_t
  482. ds1307_nvram_write(struct file *filp, struct kobject *kobj,
  483. struct bin_attribute *attr,
  484. char *buf, loff_t off, size_t count)
  485. {
  486. struct i2c_client *client;
  487. struct ds1307 *ds1307;
  488. int result;
  489. client = kobj_to_i2c_client(kobj);
  490. ds1307 = i2c_get_clientdata(client);
  491. if (unlikely(off >= NVRAM_SIZE))
  492. return -EFBIG;
  493. if ((off + count) > NVRAM_SIZE)
  494. count = NVRAM_SIZE - off;
  495. if (unlikely(!count))
  496. return count;
  497. result = ds1307->write_block_data(client, 8 + off, count, buf);
  498. if (result < 0) {
  499. dev_err(&client->dev, "%s error %d\n", "nvram write", result);
  500. return result;
  501. }
  502. return count;
  503. }
  504. static struct bin_attribute nvram = {
  505. .attr = {
  506. .name = "nvram",
  507. .mode = S_IRUGO | S_IWUSR,
  508. },
  509. .read = ds1307_nvram_read,
  510. .write = ds1307_nvram_write,
  511. .size = NVRAM_SIZE,
  512. };
  513. /*----------------------------------------------------------------------*/
  514. static struct i2c_driver ds1307_driver;
  515. static int __devinit ds1307_probe(struct i2c_client *client,
  516. const struct i2c_device_id *id)
  517. {
  518. struct ds1307 *ds1307;
  519. int err = -ENODEV;
  520. int tmp;
  521. const struct chip_desc *chip = &chips[id->driver_data];
  522. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  523. int want_irq = false;
  524. unsigned char *buf;
  525. static const int bbsqi_bitpos[] = {
  526. [ds_1337] = 0,
  527. [ds_1339] = DS1339_BIT_BBSQI,
  528. [ds_3231] = DS3231_BIT_BBSQW,
  529. };
  530. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
  531. && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
  532. return -EIO;
  533. if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL)))
  534. return -ENOMEM;
  535. i2c_set_clientdata(client, ds1307);
  536. ds1307->client = client;
  537. ds1307->type = id->driver_data;
  538. ds1307->offset = 0;
  539. buf = ds1307->regs;
  540. if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
  541. ds1307->read_block_data = i2c_smbus_read_i2c_block_data;
  542. ds1307->write_block_data = i2c_smbus_write_i2c_block_data;
  543. } else {
  544. ds1307->read_block_data = ds1307_read_block_data;
  545. ds1307->write_block_data = ds1307_write_block_data;
  546. }
  547. switch (ds1307->type) {
  548. case ds_1337:
  549. case ds_1339:
  550. case ds_3231:
  551. /* has IRQ? */
  552. if (ds1307->client->irq > 0 && chip->alarm) {
  553. INIT_WORK(&ds1307->work, ds1307_work);
  554. want_irq = true;
  555. }
  556. /* get registers that the "rtc" read below won't read... */
  557. tmp = ds1307->read_block_data(ds1307->client,
  558. DS1337_REG_CONTROL, 2, buf);
  559. if (tmp != 2) {
  560. pr_debug("read error %d\n", tmp);
  561. err = -EIO;
  562. goto exit_free;
  563. }
  564. /* oscillator off? turn it on, so clock can tick. */
  565. if (ds1307->regs[0] & DS1337_BIT_nEOSC)
  566. ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
  567. /* Using IRQ? Disable the square wave and both alarms.
  568. * For some variants, be sure alarms can trigger when we're
  569. * running on Vbackup (BBSQI/BBSQW)
  570. */
  571. if (want_irq) {
  572. ds1307->regs[0] |= DS1337_BIT_INTCN
  573. | bbsqi_bitpos[ds1307->type];
  574. ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
  575. }
  576. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
  577. ds1307->regs[0]);
  578. /* oscillator fault? clear flag, and warn */
  579. if (ds1307->regs[1] & DS1337_BIT_OSF) {
  580. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
  581. ds1307->regs[1] & ~DS1337_BIT_OSF);
  582. dev_warn(&client->dev, "SET TIME!\n");
  583. }
  584. break;
  585. case rx_8025:
  586. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  587. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  588. if (tmp != 2) {
  589. pr_debug("read error %d\n", tmp);
  590. err = -EIO;
  591. goto exit_free;
  592. }
  593. /* oscillator off? turn it on, so clock can tick. */
  594. if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
  595. ds1307->regs[1] |= RX8025_BIT_XST;
  596. i2c_smbus_write_byte_data(client,
  597. RX8025_REG_CTRL2 << 4 | 0x08,
  598. ds1307->regs[1]);
  599. dev_warn(&client->dev,
  600. "oscillator stop detected - SET TIME!\n");
  601. }
  602. if (ds1307->regs[1] & RX8025_BIT_PON) {
  603. ds1307->regs[1] &= ~RX8025_BIT_PON;
  604. i2c_smbus_write_byte_data(client,
  605. RX8025_REG_CTRL2 << 4 | 0x08,
  606. ds1307->regs[1]);
  607. dev_warn(&client->dev, "power-on detected\n");
  608. }
  609. if (ds1307->regs[1] & RX8025_BIT_VDET) {
  610. ds1307->regs[1] &= ~RX8025_BIT_VDET;
  611. i2c_smbus_write_byte_data(client,
  612. RX8025_REG_CTRL2 << 4 | 0x08,
  613. ds1307->regs[1]);
  614. dev_warn(&client->dev, "voltage drop detected\n");
  615. }
  616. /* make sure we are running in 24hour mode */
  617. if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
  618. u8 hour;
  619. /* switch to 24 hour mode */
  620. i2c_smbus_write_byte_data(client,
  621. RX8025_REG_CTRL1 << 4 | 0x08,
  622. ds1307->regs[0] |
  623. RX8025_BIT_2412);
  624. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  625. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  626. if (tmp != 2) {
  627. pr_debug("read error %d\n", tmp);
  628. err = -EIO;
  629. goto exit_free;
  630. }
  631. /* correct hour */
  632. hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
  633. if (hour == 12)
  634. hour = 0;
  635. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  636. hour += 12;
  637. i2c_smbus_write_byte_data(client,
  638. DS1307_REG_HOUR << 4 | 0x08,
  639. hour);
  640. }
  641. break;
  642. case ds_1388:
  643. ds1307->offset = 1; /* Seconds starts at 1 */
  644. break;
  645. default:
  646. break;
  647. }
  648. read_rtc:
  649. /* read RTC registers */
  650. tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
  651. if (tmp != 8) {
  652. pr_debug("read error %d\n", tmp);
  653. err = -EIO;
  654. goto exit_free;
  655. }
  656. /* minimal sanity checking; some chips (like DS1340) don't
  657. * specify the extra bits as must-be-zero, but there are
  658. * still a few values that are clearly out-of-range.
  659. */
  660. tmp = ds1307->regs[DS1307_REG_SECS];
  661. switch (ds1307->type) {
  662. case ds_1307:
  663. case m41t00:
  664. /* clock halted? turn it on, so clock can tick. */
  665. if (tmp & DS1307_BIT_CH) {
  666. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  667. dev_warn(&client->dev, "SET TIME!\n");
  668. goto read_rtc;
  669. }
  670. break;
  671. case ds_1338:
  672. /* clock halted? turn it on, so clock can tick. */
  673. if (tmp & DS1307_BIT_CH)
  674. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  675. /* oscillator fault? clear flag, and warn */
  676. if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
  677. i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
  678. ds1307->regs[DS1307_REG_CONTROL]
  679. & ~DS1338_BIT_OSF);
  680. dev_warn(&client->dev, "SET TIME!\n");
  681. goto read_rtc;
  682. }
  683. break;
  684. case ds_1340:
  685. /* clock halted? turn it on, so clock can tick. */
  686. if (tmp & DS1340_BIT_nEOSC)
  687. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  688. tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
  689. if (tmp < 0) {
  690. pr_debug("read error %d\n", tmp);
  691. err = -EIO;
  692. goto exit_free;
  693. }
  694. /* oscillator fault? clear flag, and warn */
  695. if (tmp & DS1340_BIT_OSF) {
  696. i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
  697. dev_warn(&client->dev, "SET TIME!\n");
  698. }
  699. break;
  700. case rx_8025:
  701. case ds_1337:
  702. case ds_1339:
  703. case ds_1388:
  704. case ds_3231:
  705. break;
  706. }
  707. tmp = ds1307->regs[DS1307_REG_HOUR];
  708. switch (ds1307->type) {
  709. case ds_1340:
  710. case m41t00:
  711. /* NOTE: ignores century bits; fix before deploying
  712. * systems that will run through year 2100.
  713. */
  714. break;
  715. case rx_8025:
  716. break;
  717. default:
  718. if (!(tmp & DS1307_BIT_12HR))
  719. break;
  720. /* Be sure we're in 24 hour mode. Multi-master systems
  721. * take note...
  722. */
  723. tmp = bcd2bin(tmp & 0x1f);
  724. if (tmp == 12)
  725. tmp = 0;
  726. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  727. tmp += 12;
  728. i2c_smbus_write_byte_data(client,
  729. ds1307->offset + DS1307_REG_HOUR,
  730. bin2bcd(tmp));
  731. }
  732. ds1307->rtc = rtc_device_register(client->name, &client->dev,
  733. &ds13xx_rtc_ops, THIS_MODULE);
  734. if (IS_ERR(ds1307->rtc)) {
  735. err = PTR_ERR(ds1307->rtc);
  736. dev_err(&client->dev,
  737. "unable to register the class device\n");
  738. goto exit_free;
  739. }
  740. if (want_irq) {
  741. err = request_irq(client->irq, ds1307_irq, IRQF_SHARED,
  742. ds1307->rtc->name, client);
  743. if (err) {
  744. dev_err(&client->dev,
  745. "unable to request IRQ!\n");
  746. goto exit_irq;
  747. }
  748. device_set_wakeup_capable(&client->dev, 1);
  749. set_bit(HAS_ALARM, &ds1307->flags);
  750. dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
  751. }
  752. if (chip->nvram56) {
  753. err = sysfs_create_bin_file(&client->dev.kobj, &nvram);
  754. if (err == 0) {
  755. set_bit(HAS_NVRAM, &ds1307->flags);
  756. dev_info(&client->dev, "56 bytes nvram\n");
  757. }
  758. }
  759. return 0;
  760. exit_irq:
  761. rtc_device_unregister(ds1307->rtc);
  762. exit_free:
  763. kfree(ds1307);
  764. return err;
  765. }
  766. static int __devexit ds1307_remove(struct i2c_client *client)
  767. {
  768. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  769. if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
  770. free_irq(client->irq, client);
  771. cancel_work_sync(&ds1307->work);
  772. }
  773. if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
  774. sysfs_remove_bin_file(&client->dev.kobj, &nvram);
  775. rtc_device_unregister(ds1307->rtc);
  776. kfree(ds1307);
  777. return 0;
  778. }
  779. static struct i2c_driver ds1307_driver = {
  780. .driver = {
  781. .name = "rtc-ds1307",
  782. .owner = THIS_MODULE,
  783. },
  784. .probe = ds1307_probe,
  785. .remove = __devexit_p(ds1307_remove),
  786. .id_table = ds1307_id,
  787. };
  788. static int __init ds1307_init(void)
  789. {
  790. return i2c_add_driver(&ds1307_driver);
  791. }
  792. module_init(ds1307_init);
  793. static void __exit ds1307_exit(void)
  794. {
  795. i2c_del_driver(&ds1307_driver);
  796. }
  797. module_exit(ds1307_exit);
  798. MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
  799. MODULE_LICENSE("GPL");