sunlance.c 40 KB

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  1. /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
  2. * lance.c: Linux/Sparc/Lance driver
  3. *
  4. * Written 1995, 1996 by Miguel de Icaza
  5. * Sources:
  6. * The Linux depca driver
  7. * The Linux lance driver.
  8. * The Linux skeleton driver.
  9. * The NetBSD Sparc/Lance driver.
  10. * Theo de Raadt (deraadt@openbsd.org)
  11. * NCR92C990 Lan Controller manual
  12. *
  13. * 1.4:
  14. * Added support to run with a ledma on the Sun4m
  15. *
  16. * 1.5:
  17. * Added multiple card detection.
  18. *
  19. * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
  20. * (ecd@skynet.be)
  21. *
  22. * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
  23. * (ecd@skynet.be)
  24. *
  25. * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
  26. * (davem@caip.rutgers.edu)
  27. *
  28. * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
  29. * this disables auto carrier detection on sun4m. Eddie C. Dost
  30. * (ecd@skynet.be)
  31. *
  32. * 1.7:
  33. * 6/26/96: Bug fix for multiple ledmas, miguel.
  34. *
  35. * 1.8:
  36. * Stole multicast code from depca.c, fixed lance_tx.
  37. *
  38. * 1.9:
  39. * 8/21/96: Fixed the multicast code (Pedro Roque)
  40. *
  41. * 8/28/96: Send fake packet in lance_open() if auto_select is true,
  42. * so we can detect the carrier loss condition in time.
  43. * Eddie C. Dost (ecd@skynet.be)
  44. *
  45. * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
  46. * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
  47. *
  48. * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
  49. *
  50. * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
  51. * This was the sun4c killer. Shit, stupid bug.
  52. * (ecd@skynet.be)
  53. *
  54. * 1.10:
  55. * 1/26/97: Modularize driver. (ecd@skynet.be)
  56. *
  57. * 1.11:
  58. * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
  59. *
  60. * 1.12:
  61. * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
  62. * Anton Blanchard (anton@progsoc.uts.edu.au)
  63. * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
  64. * David S. Miller (davem@redhat.com)
  65. * 2.01:
  66. * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
  67. *
  68. */
  69. #undef DEBUG_DRIVER
  70. static char lancestr[] = "LANCE";
  71. #include <linux/module.h>
  72. #include <linux/kernel.h>
  73. #include <linux/types.h>
  74. #include <linux/fcntl.h>
  75. #include <linux/interrupt.h>
  76. #include <linux/ioport.h>
  77. #include <linux/in.h>
  78. #include <linux/string.h>
  79. #include <linux/delay.h>
  80. #include <linux/init.h>
  81. #include <linux/crc32.h>
  82. #include <linux/errno.h>
  83. #include <linux/socket.h> /* Used for the temporal inet entries and routing */
  84. #include <linux/route.h>
  85. #include <linux/netdevice.h>
  86. #include <linux/etherdevice.h>
  87. #include <linux/skbuff.h>
  88. #include <linux/ethtool.h>
  89. #include <linux/bitops.h>
  90. #include <linux/dma-mapping.h>
  91. #include <linux/of.h>
  92. #include <linux/of_device.h>
  93. #include <linux/gfp.h>
  94. #include <asm/system.h>
  95. #include <asm/io.h>
  96. #include <asm/dma.h>
  97. #include <asm/pgtable.h>
  98. #include <asm/byteorder.h> /* Used by the checksum routines */
  99. #include <asm/idprom.h>
  100. #include <asm/prom.h>
  101. #include <asm/auxio.h> /* For tpe-link-test? setting */
  102. #include <asm/irq.h>
  103. #define DRV_NAME "sunlance"
  104. #define DRV_VERSION "2.02"
  105. #define DRV_RELDATE "8/24/03"
  106. #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)"
  107. static char version[] =
  108. DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
  109. MODULE_VERSION(DRV_VERSION);
  110. MODULE_AUTHOR(DRV_AUTHOR);
  111. MODULE_DESCRIPTION("Sun Lance ethernet driver");
  112. MODULE_LICENSE("GPL");
  113. /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
  114. #ifndef LANCE_LOG_TX_BUFFERS
  115. #define LANCE_LOG_TX_BUFFERS 4
  116. #define LANCE_LOG_RX_BUFFERS 4
  117. #endif
  118. #define LE_CSR0 0
  119. #define LE_CSR1 1
  120. #define LE_CSR2 2
  121. #define LE_CSR3 3
  122. #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
  123. #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
  124. #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
  125. #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
  126. #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
  127. #define LE_C0_MERR 0x0800 /* ME: Memory error */
  128. #define LE_C0_RINT 0x0400 /* Received interrupt */
  129. #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
  130. #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
  131. #define LE_C0_INTR 0x0080 /* Interrupt or error */
  132. #define LE_C0_INEA 0x0040 /* Interrupt enable */
  133. #define LE_C0_RXON 0x0020 /* Receiver on */
  134. #define LE_C0_TXON 0x0010 /* Transmitter on */
  135. #define LE_C0_TDMD 0x0008 /* Transmitter demand */
  136. #define LE_C0_STOP 0x0004 /* Stop the card */
  137. #define LE_C0_STRT 0x0002 /* Start the card */
  138. #define LE_C0_INIT 0x0001 /* Init the card */
  139. #define LE_C3_BSWP 0x4 /* SWAP */
  140. #define LE_C3_ACON 0x2 /* ALE Control */
  141. #define LE_C3_BCON 0x1 /* Byte control */
  142. /* Receive message descriptor 1 */
  143. #define LE_R1_OWN 0x80 /* Who owns the entry */
  144. #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
  145. #define LE_R1_FRA 0x20 /* FRA: Frame error */
  146. #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
  147. #define LE_R1_CRC 0x08 /* CRC error */
  148. #define LE_R1_BUF 0x04 /* BUF: Buffer error */
  149. #define LE_R1_SOP 0x02 /* Start of packet */
  150. #define LE_R1_EOP 0x01 /* End of packet */
  151. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  152. #define LE_T1_OWN 0x80 /* Lance owns the packet */
  153. #define LE_T1_ERR 0x40 /* Error summary */
  154. #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
  155. #define LE_T1_EONE 0x08 /* Error: one retry needed */
  156. #define LE_T1_EDEF 0x04 /* Error: deferred */
  157. #define LE_T1_SOP 0x02 /* Start of packet */
  158. #define LE_T1_EOP 0x01 /* End of packet */
  159. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  160. #define LE_T3_BUF 0x8000 /* Buffer error */
  161. #define LE_T3_UFL 0x4000 /* Error underflow */
  162. #define LE_T3_LCOL 0x1000 /* Error late collision */
  163. #define LE_T3_CLOS 0x0800 /* Error carrier loss */
  164. #define LE_T3_RTY 0x0400 /* Error retry */
  165. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
  166. #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
  167. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  168. #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
  169. #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
  170. #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
  171. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  172. #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
  173. #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
  174. #define PKT_BUF_SZ 1544
  175. #define RX_BUFF_SIZE PKT_BUF_SZ
  176. #define TX_BUFF_SIZE PKT_BUF_SZ
  177. struct lance_rx_desc {
  178. u16 rmd0; /* low address of packet */
  179. u8 rmd1_bits; /* descriptor bits */
  180. u8 rmd1_hadr; /* high address of packet */
  181. s16 length; /* This length is 2s complement (negative)!
  182. * Buffer length
  183. */
  184. u16 mblength; /* This is the actual number of bytes received */
  185. };
  186. struct lance_tx_desc {
  187. u16 tmd0; /* low address of packet */
  188. u8 tmd1_bits; /* descriptor bits */
  189. u8 tmd1_hadr; /* high address of packet */
  190. s16 length; /* Length is 2s complement (negative)! */
  191. u16 misc;
  192. };
  193. /* The LANCE initialization block, described in databook. */
  194. /* On the Sparc, this block should be on a DMA region */
  195. struct lance_init_block {
  196. u16 mode; /* Pre-set mode (reg. 15) */
  197. u8 phys_addr[6]; /* Physical ethernet address */
  198. u32 filter[2]; /* Multicast filter. */
  199. /* Receive and transmit ring base, along with extra bits. */
  200. u16 rx_ptr; /* receive descriptor addr */
  201. u16 rx_len; /* receive len and high addr */
  202. u16 tx_ptr; /* transmit descriptor addr */
  203. u16 tx_len; /* transmit len and high addr */
  204. /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
  205. struct lance_rx_desc brx_ring[RX_RING_SIZE];
  206. struct lance_tx_desc btx_ring[TX_RING_SIZE];
  207. u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
  208. u8 pad[2]; /* align rx_buf for copy_and_sum(). */
  209. u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
  210. };
  211. #define libdesc_offset(rt, elem) \
  212. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
  213. #define libbuff_offset(rt, elem) \
  214. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
  215. struct lance_private {
  216. void __iomem *lregs; /* Lance RAP/RDP regs. */
  217. void __iomem *dregs; /* DMA controller regs. */
  218. struct lance_init_block __iomem *init_block_iomem;
  219. struct lance_init_block *init_block_mem;
  220. spinlock_t lock;
  221. int rx_new, tx_new;
  222. int rx_old, tx_old;
  223. struct platform_device *ledma; /* If set this points to ledma */
  224. char tpe; /* cable-selection is TPE */
  225. char auto_select; /* cable-selection by carrier */
  226. char burst_sizes; /* ledma SBus burst sizes */
  227. char pio_buffer; /* init block in PIO space? */
  228. unsigned short busmaster_regval;
  229. void (*init_ring)(struct net_device *);
  230. void (*rx)(struct net_device *);
  231. void (*tx)(struct net_device *);
  232. char *name;
  233. dma_addr_t init_block_dvma;
  234. struct net_device *dev; /* Backpointer */
  235. struct platform_device *op;
  236. struct platform_device *lebuffer;
  237. struct timer_list multicast_timer;
  238. };
  239. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  240. lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
  241. lp->tx_old - lp->tx_new-1)
  242. /* Lance registers. */
  243. #define RDP 0x00UL /* register data port */
  244. #define RAP 0x02UL /* register address port */
  245. #define LANCE_REG_SIZE 0x04UL
  246. #define STOP_LANCE(__lp) \
  247. do { void __iomem *__base = (__lp)->lregs; \
  248. sbus_writew(LE_CSR0, __base + RAP); \
  249. sbus_writew(LE_C0_STOP, __base + RDP); \
  250. } while (0)
  251. int sparc_lance_debug = 2;
  252. /* The Lance uses 24 bit addresses */
  253. /* On the Sun4c the DVMA will provide the remaining bytes for us */
  254. /* On the Sun4m we have to instruct the ledma to provide them */
  255. /* Even worse, on scsi/ether SBUS cards, the init block and the
  256. * transmit/receive buffers are addresses as offsets from absolute
  257. * zero on the lebuffer PIO area. -DaveM
  258. */
  259. #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
  260. /* Load the CSR registers */
  261. static void load_csrs(struct lance_private *lp)
  262. {
  263. u32 leptr;
  264. if (lp->pio_buffer)
  265. leptr = 0;
  266. else
  267. leptr = LANCE_ADDR(lp->init_block_dvma);
  268. sbus_writew(LE_CSR1, lp->lregs + RAP);
  269. sbus_writew(leptr & 0xffff, lp->lregs + RDP);
  270. sbus_writew(LE_CSR2, lp->lregs + RAP);
  271. sbus_writew(leptr >> 16, lp->lregs + RDP);
  272. sbus_writew(LE_CSR3, lp->lregs + RAP);
  273. sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
  274. /* Point back to csr0 */
  275. sbus_writew(LE_CSR0, lp->lregs + RAP);
  276. }
  277. /* Setup the Lance Rx and Tx rings */
  278. static void lance_init_ring_dvma(struct net_device *dev)
  279. {
  280. struct lance_private *lp = netdev_priv(dev);
  281. struct lance_init_block *ib = lp->init_block_mem;
  282. dma_addr_t aib = lp->init_block_dvma;
  283. __u32 leptr;
  284. int i;
  285. /* Lock out other processes while setting up hardware */
  286. netif_stop_queue(dev);
  287. lp->rx_new = lp->tx_new = 0;
  288. lp->rx_old = lp->tx_old = 0;
  289. /* Copy the ethernet address to the lance init block
  290. * Note that on the sparc you need to swap the ethernet address.
  291. */
  292. ib->phys_addr [0] = dev->dev_addr [1];
  293. ib->phys_addr [1] = dev->dev_addr [0];
  294. ib->phys_addr [2] = dev->dev_addr [3];
  295. ib->phys_addr [3] = dev->dev_addr [2];
  296. ib->phys_addr [4] = dev->dev_addr [5];
  297. ib->phys_addr [5] = dev->dev_addr [4];
  298. /* Setup the Tx ring entries */
  299. for (i = 0; i < TX_RING_SIZE; i++) {
  300. leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
  301. ib->btx_ring [i].tmd0 = leptr;
  302. ib->btx_ring [i].tmd1_hadr = leptr >> 16;
  303. ib->btx_ring [i].tmd1_bits = 0;
  304. ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
  305. ib->btx_ring [i].misc = 0;
  306. }
  307. /* Setup the Rx ring entries */
  308. for (i = 0; i < RX_RING_SIZE; i++) {
  309. leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
  310. ib->brx_ring [i].rmd0 = leptr;
  311. ib->brx_ring [i].rmd1_hadr = leptr >> 16;
  312. ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
  313. ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
  314. ib->brx_ring [i].mblength = 0;
  315. }
  316. /* Setup the initialization block */
  317. /* Setup rx descriptor pointer */
  318. leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
  319. ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
  320. ib->rx_ptr = leptr;
  321. /* Setup tx descriptor pointer */
  322. leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
  323. ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
  324. ib->tx_ptr = leptr;
  325. }
  326. static void lance_init_ring_pio(struct net_device *dev)
  327. {
  328. struct lance_private *lp = netdev_priv(dev);
  329. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  330. u32 leptr;
  331. int i;
  332. /* Lock out other processes while setting up hardware */
  333. netif_stop_queue(dev);
  334. lp->rx_new = lp->tx_new = 0;
  335. lp->rx_old = lp->tx_old = 0;
  336. /* Copy the ethernet address to the lance init block
  337. * Note that on the sparc you need to swap the ethernet address.
  338. */
  339. sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
  340. sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
  341. sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
  342. sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
  343. sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
  344. sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
  345. /* Setup the Tx ring entries */
  346. for (i = 0; i < TX_RING_SIZE; i++) {
  347. leptr = libbuff_offset(tx_buf, i);
  348. sbus_writew(leptr, &ib->btx_ring [i].tmd0);
  349. sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
  350. sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
  351. /* The ones required by tmd2 */
  352. sbus_writew(0xf000, &ib->btx_ring [i].length);
  353. sbus_writew(0, &ib->btx_ring [i].misc);
  354. }
  355. /* Setup the Rx ring entries */
  356. for (i = 0; i < RX_RING_SIZE; i++) {
  357. leptr = libbuff_offset(rx_buf, i);
  358. sbus_writew(leptr, &ib->brx_ring [i].rmd0);
  359. sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
  360. sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
  361. sbus_writew(-RX_BUFF_SIZE|0xf000,
  362. &ib->brx_ring [i].length);
  363. sbus_writew(0, &ib->brx_ring [i].mblength);
  364. }
  365. /* Setup the initialization block */
  366. /* Setup rx descriptor pointer */
  367. leptr = libdesc_offset(brx_ring, 0);
  368. sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
  369. &ib->rx_len);
  370. sbus_writew(leptr, &ib->rx_ptr);
  371. /* Setup tx descriptor pointer */
  372. leptr = libdesc_offset(btx_ring, 0);
  373. sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
  374. &ib->tx_len);
  375. sbus_writew(leptr, &ib->tx_ptr);
  376. }
  377. static void init_restart_ledma(struct lance_private *lp)
  378. {
  379. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  380. if (!(csr & DMA_HNDL_ERROR)) {
  381. /* E-Cache draining */
  382. while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
  383. barrier();
  384. }
  385. csr = sbus_readl(lp->dregs + DMA_CSR);
  386. csr &= ~DMA_E_BURSTS;
  387. if (lp->burst_sizes & DMA_BURST32)
  388. csr |= DMA_E_BURST32;
  389. else
  390. csr |= DMA_E_BURST16;
  391. csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
  392. if (lp->tpe)
  393. csr |= DMA_EN_ENETAUI;
  394. else
  395. csr &= ~DMA_EN_ENETAUI;
  396. udelay(20);
  397. sbus_writel(csr, lp->dregs + DMA_CSR);
  398. udelay(200);
  399. }
  400. static int init_restart_lance(struct lance_private *lp)
  401. {
  402. u16 regval = 0;
  403. int i;
  404. if (lp->dregs)
  405. init_restart_ledma(lp);
  406. sbus_writew(LE_CSR0, lp->lregs + RAP);
  407. sbus_writew(LE_C0_INIT, lp->lregs + RDP);
  408. /* Wait for the lance to complete initialization */
  409. for (i = 0; i < 100; i++) {
  410. regval = sbus_readw(lp->lregs + RDP);
  411. if (regval & (LE_C0_ERR | LE_C0_IDON))
  412. break;
  413. barrier();
  414. }
  415. if (i == 100 || (regval & LE_C0_ERR)) {
  416. printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
  417. i, regval);
  418. if (lp->dregs)
  419. printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
  420. return -1;
  421. }
  422. /* Clear IDON by writing a "1", enable interrupts and start lance */
  423. sbus_writew(LE_C0_IDON, lp->lregs + RDP);
  424. sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
  425. if (lp->dregs) {
  426. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  427. csr |= DMA_INT_ENAB;
  428. sbus_writel(csr, lp->dregs + DMA_CSR);
  429. }
  430. return 0;
  431. }
  432. static void lance_rx_dvma(struct net_device *dev)
  433. {
  434. struct lance_private *lp = netdev_priv(dev);
  435. struct lance_init_block *ib = lp->init_block_mem;
  436. struct lance_rx_desc *rd;
  437. u8 bits;
  438. int len, entry = lp->rx_new;
  439. struct sk_buff *skb;
  440. for (rd = &ib->brx_ring [entry];
  441. !((bits = rd->rmd1_bits) & LE_R1_OWN);
  442. rd = &ib->brx_ring [entry]) {
  443. /* We got an incomplete frame? */
  444. if ((bits & LE_R1_POK) != LE_R1_POK) {
  445. dev->stats.rx_over_errors++;
  446. dev->stats.rx_errors++;
  447. } else if (bits & LE_R1_ERR) {
  448. /* Count only the end frame as a rx error,
  449. * not the beginning
  450. */
  451. if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
  452. if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
  453. if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
  454. if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
  455. if (bits & LE_R1_EOP) dev->stats.rx_errors++;
  456. } else {
  457. len = (rd->mblength & 0xfff) - 4;
  458. skb = dev_alloc_skb(len + 2);
  459. if (skb == NULL) {
  460. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  461. dev->name);
  462. dev->stats.rx_dropped++;
  463. rd->mblength = 0;
  464. rd->rmd1_bits = LE_R1_OWN;
  465. lp->rx_new = RX_NEXT(entry);
  466. return;
  467. }
  468. dev->stats.rx_bytes += len;
  469. skb_reserve(skb, 2); /* 16 byte align */
  470. skb_put(skb, len); /* make room */
  471. skb_copy_to_linear_data(skb,
  472. (unsigned char *)&(ib->rx_buf [entry][0]),
  473. len);
  474. skb->protocol = eth_type_trans(skb, dev);
  475. netif_rx(skb);
  476. dev->stats.rx_packets++;
  477. }
  478. /* Return the packet to the pool */
  479. rd->mblength = 0;
  480. rd->rmd1_bits = LE_R1_OWN;
  481. entry = RX_NEXT(entry);
  482. }
  483. lp->rx_new = entry;
  484. }
  485. static void lance_tx_dvma(struct net_device *dev)
  486. {
  487. struct lance_private *lp = netdev_priv(dev);
  488. struct lance_init_block *ib = lp->init_block_mem;
  489. int i, j;
  490. spin_lock(&lp->lock);
  491. j = lp->tx_old;
  492. for (i = j; i != lp->tx_new; i = j) {
  493. struct lance_tx_desc *td = &ib->btx_ring [i];
  494. u8 bits = td->tmd1_bits;
  495. /* If we hit a packet not owned by us, stop */
  496. if (bits & LE_T1_OWN)
  497. break;
  498. if (bits & LE_T1_ERR) {
  499. u16 status = td->misc;
  500. dev->stats.tx_errors++;
  501. if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
  502. if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
  503. if (status & LE_T3_CLOS) {
  504. dev->stats.tx_carrier_errors++;
  505. if (lp->auto_select) {
  506. lp->tpe = 1 - lp->tpe;
  507. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  508. dev->name, lp->tpe?"TPE":"AUI");
  509. STOP_LANCE(lp);
  510. lp->init_ring(dev);
  511. load_csrs(lp);
  512. init_restart_lance(lp);
  513. goto out;
  514. }
  515. }
  516. /* Buffer errors and underflows turn off the
  517. * transmitter, restart the adapter.
  518. */
  519. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  520. dev->stats.tx_fifo_errors++;
  521. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  522. dev->name);
  523. STOP_LANCE(lp);
  524. lp->init_ring(dev);
  525. load_csrs(lp);
  526. init_restart_lance(lp);
  527. goto out;
  528. }
  529. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  530. /*
  531. * So we don't count the packet more than once.
  532. */
  533. td->tmd1_bits = bits & ~(LE_T1_POK);
  534. /* One collision before packet was sent. */
  535. if (bits & LE_T1_EONE)
  536. dev->stats.collisions++;
  537. /* More than one collision, be optimistic. */
  538. if (bits & LE_T1_EMORE)
  539. dev->stats.collisions += 2;
  540. dev->stats.tx_packets++;
  541. }
  542. j = TX_NEXT(j);
  543. }
  544. lp->tx_old = j;
  545. out:
  546. if (netif_queue_stopped(dev) &&
  547. TX_BUFFS_AVAIL > 0)
  548. netif_wake_queue(dev);
  549. spin_unlock(&lp->lock);
  550. }
  551. static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
  552. {
  553. u16 *p16 = (u16 *) skb->data;
  554. u32 *p32;
  555. u8 *p8;
  556. void __iomem *pbuf = piobuf;
  557. /* We know here that both src and dest are on a 16bit boundary. */
  558. *p16++ = sbus_readw(pbuf);
  559. p32 = (u32 *) p16;
  560. pbuf += 2;
  561. len -= 2;
  562. while (len >= 4) {
  563. *p32++ = sbus_readl(pbuf);
  564. pbuf += 4;
  565. len -= 4;
  566. }
  567. p8 = (u8 *) p32;
  568. if (len >= 2) {
  569. p16 = (u16 *) p32;
  570. *p16++ = sbus_readw(pbuf);
  571. pbuf += 2;
  572. len -= 2;
  573. p8 = (u8 *) p16;
  574. }
  575. if (len >= 1)
  576. *p8 = sbus_readb(pbuf);
  577. }
  578. static void lance_rx_pio(struct net_device *dev)
  579. {
  580. struct lance_private *lp = netdev_priv(dev);
  581. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  582. struct lance_rx_desc __iomem *rd;
  583. unsigned char bits;
  584. int len, entry;
  585. struct sk_buff *skb;
  586. entry = lp->rx_new;
  587. for (rd = &ib->brx_ring [entry];
  588. !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
  589. rd = &ib->brx_ring [entry]) {
  590. /* We got an incomplete frame? */
  591. if ((bits & LE_R1_POK) != LE_R1_POK) {
  592. dev->stats.rx_over_errors++;
  593. dev->stats.rx_errors++;
  594. } else if (bits & LE_R1_ERR) {
  595. /* Count only the end frame as a rx error,
  596. * not the beginning
  597. */
  598. if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
  599. if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
  600. if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
  601. if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
  602. if (bits & LE_R1_EOP) dev->stats.rx_errors++;
  603. } else {
  604. len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
  605. skb = dev_alloc_skb(len + 2);
  606. if (skb == NULL) {
  607. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  608. dev->name);
  609. dev->stats.rx_dropped++;
  610. sbus_writew(0, &rd->mblength);
  611. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  612. lp->rx_new = RX_NEXT(entry);
  613. return;
  614. }
  615. dev->stats.rx_bytes += len;
  616. skb_reserve (skb, 2); /* 16 byte align */
  617. skb_put(skb, len); /* make room */
  618. lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
  619. skb->protocol = eth_type_trans(skb, dev);
  620. netif_rx(skb);
  621. dev->stats.rx_packets++;
  622. }
  623. /* Return the packet to the pool */
  624. sbus_writew(0, &rd->mblength);
  625. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  626. entry = RX_NEXT(entry);
  627. }
  628. lp->rx_new = entry;
  629. }
  630. static void lance_tx_pio(struct net_device *dev)
  631. {
  632. struct lance_private *lp = netdev_priv(dev);
  633. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  634. int i, j;
  635. spin_lock(&lp->lock);
  636. j = lp->tx_old;
  637. for (i = j; i != lp->tx_new; i = j) {
  638. struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
  639. u8 bits = sbus_readb(&td->tmd1_bits);
  640. /* If we hit a packet not owned by us, stop */
  641. if (bits & LE_T1_OWN)
  642. break;
  643. if (bits & LE_T1_ERR) {
  644. u16 status = sbus_readw(&td->misc);
  645. dev->stats.tx_errors++;
  646. if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
  647. if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
  648. if (status & LE_T3_CLOS) {
  649. dev->stats.tx_carrier_errors++;
  650. if (lp->auto_select) {
  651. lp->tpe = 1 - lp->tpe;
  652. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  653. dev->name, lp->tpe?"TPE":"AUI");
  654. STOP_LANCE(lp);
  655. lp->init_ring(dev);
  656. load_csrs(lp);
  657. init_restart_lance(lp);
  658. goto out;
  659. }
  660. }
  661. /* Buffer errors and underflows turn off the
  662. * transmitter, restart the adapter.
  663. */
  664. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  665. dev->stats.tx_fifo_errors++;
  666. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  667. dev->name);
  668. STOP_LANCE(lp);
  669. lp->init_ring(dev);
  670. load_csrs(lp);
  671. init_restart_lance(lp);
  672. goto out;
  673. }
  674. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  675. /*
  676. * So we don't count the packet more than once.
  677. */
  678. sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
  679. /* One collision before packet was sent. */
  680. if (bits & LE_T1_EONE)
  681. dev->stats.collisions++;
  682. /* More than one collision, be optimistic. */
  683. if (bits & LE_T1_EMORE)
  684. dev->stats.collisions += 2;
  685. dev->stats.tx_packets++;
  686. }
  687. j = TX_NEXT(j);
  688. }
  689. lp->tx_old = j;
  690. if (netif_queue_stopped(dev) &&
  691. TX_BUFFS_AVAIL > 0)
  692. netif_wake_queue(dev);
  693. out:
  694. spin_unlock(&lp->lock);
  695. }
  696. static irqreturn_t lance_interrupt(int irq, void *dev_id)
  697. {
  698. struct net_device *dev = dev_id;
  699. struct lance_private *lp = netdev_priv(dev);
  700. int csr0;
  701. sbus_writew(LE_CSR0, lp->lregs + RAP);
  702. csr0 = sbus_readw(lp->lregs + RDP);
  703. /* Acknowledge all the interrupt sources ASAP */
  704. sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
  705. lp->lregs + RDP);
  706. if ((csr0 & LE_C0_ERR) != 0) {
  707. /* Clear the error condition */
  708. sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
  709. LE_C0_CERR | LE_C0_MERR),
  710. lp->lregs + RDP);
  711. }
  712. if (csr0 & LE_C0_RINT)
  713. lp->rx(dev);
  714. if (csr0 & LE_C0_TINT)
  715. lp->tx(dev);
  716. if (csr0 & LE_C0_BABL)
  717. dev->stats.tx_errors++;
  718. if (csr0 & LE_C0_MISS)
  719. dev->stats.rx_errors++;
  720. if (csr0 & LE_C0_MERR) {
  721. if (lp->dregs) {
  722. u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
  723. printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
  724. dev->name, csr0, addr & 0xffffff);
  725. } else {
  726. printk(KERN_ERR "%s: Memory error, status %04x\n",
  727. dev->name, csr0);
  728. }
  729. sbus_writew(LE_C0_STOP, lp->lregs + RDP);
  730. if (lp->dregs) {
  731. u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
  732. dma_csr |= DMA_FIFO_INV;
  733. sbus_writel(dma_csr, lp->dregs + DMA_CSR);
  734. }
  735. lp->init_ring(dev);
  736. load_csrs(lp);
  737. init_restart_lance(lp);
  738. netif_wake_queue(dev);
  739. }
  740. sbus_writew(LE_C0_INEA, lp->lregs + RDP);
  741. return IRQ_HANDLED;
  742. }
  743. /* Build a fake network packet and send it to ourselves. */
  744. static void build_fake_packet(struct lance_private *lp)
  745. {
  746. struct net_device *dev = lp->dev;
  747. int i, entry;
  748. entry = lp->tx_new & TX_RING_MOD_MASK;
  749. if (lp->pio_buffer) {
  750. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  751. u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
  752. struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
  753. for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
  754. sbus_writew(0, &packet[i]);
  755. for (i = 0; i < 6; i++) {
  756. sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
  757. sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
  758. }
  759. sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
  760. sbus_writew(0, &ib->btx_ring[entry].misc);
  761. sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  762. } else {
  763. struct lance_init_block *ib = lp->init_block_mem;
  764. u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
  765. struct ethhdr *eth = (struct ethhdr *) packet;
  766. memset(packet, 0, ETH_ZLEN);
  767. for (i = 0; i < 6; i++) {
  768. eth->h_dest[i] = dev->dev_addr[i];
  769. eth->h_source[i] = dev->dev_addr[i];
  770. }
  771. ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
  772. ib->btx_ring[entry].misc = 0;
  773. ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
  774. }
  775. lp->tx_new = TX_NEXT(entry);
  776. }
  777. static int lance_open(struct net_device *dev)
  778. {
  779. struct lance_private *lp = netdev_priv(dev);
  780. int status = 0;
  781. STOP_LANCE(lp);
  782. if (request_irq(dev->irq, lance_interrupt, IRQF_SHARED,
  783. lancestr, (void *) dev)) {
  784. printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq);
  785. return -EAGAIN;
  786. }
  787. /* On the 4m, setup the ledma to provide the upper bits for buffers */
  788. if (lp->dregs) {
  789. u32 regval = lp->init_block_dvma & 0xff000000;
  790. sbus_writel(regval, lp->dregs + DMA_TEST);
  791. }
  792. /* Set mode and clear multicast filter only at device open,
  793. * so that lance_init_ring() called at any error will not
  794. * forget multicast filters.
  795. *
  796. * BTW it is common bug in all lance drivers! --ANK
  797. */
  798. if (lp->pio_buffer) {
  799. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  800. sbus_writew(0, &ib->mode);
  801. sbus_writel(0, &ib->filter[0]);
  802. sbus_writel(0, &ib->filter[1]);
  803. } else {
  804. struct lance_init_block *ib = lp->init_block_mem;
  805. ib->mode = 0;
  806. ib->filter [0] = 0;
  807. ib->filter [1] = 0;
  808. }
  809. lp->init_ring(dev);
  810. load_csrs(lp);
  811. netif_start_queue(dev);
  812. status = init_restart_lance(lp);
  813. if (!status && lp->auto_select) {
  814. build_fake_packet(lp);
  815. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  816. }
  817. return status;
  818. }
  819. static int lance_close(struct net_device *dev)
  820. {
  821. struct lance_private *lp = netdev_priv(dev);
  822. netif_stop_queue(dev);
  823. del_timer_sync(&lp->multicast_timer);
  824. STOP_LANCE(lp);
  825. free_irq(dev->irq, (void *) dev);
  826. return 0;
  827. }
  828. static int lance_reset(struct net_device *dev)
  829. {
  830. struct lance_private *lp = netdev_priv(dev);
  831. int status;
  832. STOP_LANCE(lp);
  833. /* On the 4m, reset the dma too */
  834. if (lp->dregs) {
  835. u32 csr, addr;
  836. printk(KERN_ERR "resetting ledma\n");
  837. csr = sbus_readl(lp->dregs + DMA_CSR);
  838. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  839. udelay(200);
  840. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  841. addr = lp->init_block_dvma & 0xff000000;
  842. sbus_writel(addr, lp->dregs + DMA_TEST);
  843. }
  844. lp->init_ring(dev);
  845. load_csrs(lp);
  846. dev->trans_start = jiffies; /* prevent tx timeout */
  847. status = init_restart_lance(lp);
  848. return status;
  849. }
  850. static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
  851. {
  852. void __iomem *piobuf = dest;
  853. u32 *p32;
  854. u16 *p16;
  855. u8 *p8;
  856. switch ((unsigned long)src & 0x3) {
  857. case 0:
  858. p32 = (u32 *) src;
  859. while (len >= 4) {
  860. sbus_writel(*p32, piobuf);
  861. p32++;
  862. piobuf += 4;
  863. len -= 4;
  864. }
  865. src = (char *) p32;
  866. break;
  867. case 1:
  868. case 3:
  869. p8 = (u8 *) src;
  870. while (len >= 4) {
  871. u32 val;
  872. val = p8[0] << 24;
  873. val |= p8[1] << 16;
  874. val |= p8[2] << 8;
  875. val |= p8[3];
  876. sbus_writel(val, piobuf);
  877. p8 += 4;
  878. piobuf += 4;
  879. len -= 4;
  880. }
  881. src = (char *) p8;
  882. break;
  883. case 2:
  884. p16 = (u16 *) src;
  885. while (len >= 4) {
  886. u32 val = p16[0]<<16 | p16[1];
  887. sbus_writel(val, piobuf);
  888. p16 += 2;
  889. piobuf += 4;
  890. len -= 4;
  891. }
  892. src = (char *) p16;
  893. break;
  894. }
  895. if (len >= 2) {
  896. u16 val = src[0] << 8 | src[1];
  897. sbus_writew(val, piobuf);
  898. src += 2;
  899. piobuf += 2;
  900. len -= 2;
  901. }
  902. if (len >= 1)
  903. sbus_writeb(src[0], piobuf);
  904. }
  905. static void lance_piozero(void __iomem *dest, int len)
  906. {
  907. void __iomem *piobuf = dest;
  908. if ((unsigned long)piobuf & 1) {
  909. sbus_writeb(0, piobuf);
  910. piobuf += 1;
  911. len -= 1;
  912. if (len == 0)
  913. return;
  914. }
  915. if (len == 1) {
  916. sbus_writeb(0, piobuf);
  917. return;
  918. }
  919. if ((unsigned long)piobuf & 2) {
  920. sbus_writew(0, piobuf);
  921. piobuf += 2;
  922. len -= 2;
  923. if (len == 0)
  924. return;
  925. }
  926. while (len >= 4) {
  927. sbus_writel(0, piobuf);
  928. piobuf += 4;
  929. len -= 4;
  930. }
  931. if (len >= 2) {
  932. sbus_writew(0, piobuf);
  933. piobuf += 2;
  934. len -= 2;
  935. }
  936. if (len >= 1)
  937. sbus_writeb(0, piobuf);
  938. }
  939. static void lance_tx_timeout(struct net_device *dev)
  940. {
  941. struct lance_private *lp = netdev_priv(dev);
  942. printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
  943. dev->name, sbus_readw(lp->lregs + RDP));
  944. lance_reset(dev);
  945. netif_wake_queue(dev);
  946. }
  947. static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
  948. {
  949. struct lance_private *lp = netdev_priv(dev);
  950. int entry, skblen, len;
  951. skblen = skb->len;
  952. len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
  953. spin_lock_irq(&lp->lock);
  954. dev->stats.tx_bytes += len;
  955. entry = lp->tx_new & TX_RING_MOD_MASK;
  956. if (lp->pio_buffer) {
  957. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  958. sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
  959. sbus_writew(0, &ib->btx_ring[entry].misc);
  960. lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
  961. if (len != skblen)
  962. lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
  963. sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  964. } else {
  965. struct lance_init_block *ib = lp->init_block_mem;
  966. ib->btx_ring [entry].length = (-len) | 0xf000;
  967. ib->btx_ring [entry].misc = 0;
  968. skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen);
  969. if (len != skblen)
  970. memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
  971. ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
  972. }
  973. lp->tx_new = TX_NEXT(entry);
  974. if (TX_BUFFS_AVAIL <= 0)
  975. netif_stop_queue(dev);
  976. /* Kick the lance: transmit now */
  977. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  978. /* Read back CSR to invalidate the E-Cache.
  979. * This is needed, because DMA_DSBL_WR_INV is set.
  980. */
  981. if (lp->dregs)
  982. sbus_readw(lp->lregs + RDP);
  983. spin_unlock_irq(&lp->lock);
  984. dev_kfree_skb(skb);
  985. return NETDEV_TX_OK;
  986. }
  987. /* taken from the depca driver */
  988. static void lance_load_multicast(struct net_device *dev)
  989. {
  990. struct lance_private *lp = netdev_priv(dev);
  991. struct netdev_hw_addr *ha;
  992. char *addrs;
  993. u32 crc;
  994. u32 val;
  995. /* set all multicast bits */
  996. if (dev->flags & IFF_ALLMULTI)
  997. val = ~0;
  998. else
  999. val = 0;
  1000. if (lp->pio_buffer) {
  1001. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1002. sbus_writel(val, &ib->filter[0]);
  1003. sbus_writel(val, &ib->filter[1]);
  1004. } else {
  1005. struct lance_init_block *ib = lp->init_block_mem;
  1006. ib->filter [0] = val;
  1007. ib->filter [1] = val;
  1008. }
  1009. if (dev->flags & IFF_ALLMULTI)
  1010. return;
  1011. /* Add addresses */
  1012. netdev_for_each_mc_addr(ha, dev) {
  1013. addrs = ha->addr;
  1014. /* multicast address? */
  1015. if (!(*addrs & 1))
  1016. continue;
  1017. crc = ether_crc_le(6, addrs);
  1018. crc = crc >> 26;
  1019. if (lp->pio_buffer) {
  1020. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1021. u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
  1022. u16 tmp = sbus_readw(&mcast_table[crc>>4]);
  1023. tmp |= 1 << (crc & 0xf);
  1024. sbus_writew(tmp, &mcast_table[crc>>4]);
  1025. } else {
  1026. struct lance_init_block *ib = lp->init_block_mem;
  1027. u16 *mcast_table = (u16 *) &ib->filter;
  1028. mcast_table [crc >> 4] |= 1 << (crc & 0xf);
  1029. }
  1030. }
  1031. }
  1032. static void lance_set_multicast(struct net_device *dev)
  1033. {
  1034. struct lance_private *lp = netdev_priv(dev);
  1035. struct lance_init_block *ib_mem = lp->init_block_mem;
  1036. struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
  1037. u16 mode;
  1038. if (!netif_running(dev))
  1039. return;
  1040. if (lp->tx_old != lp->tx_new) {
  1041. mod_timer(&lp->multicast_timer, jiffies + 4);
  1042. netif_wake_queue(dev);
  1043. return;
  1044. }
  1045. netif_stop_queue(dev);
  1046. STOP_LANCE(lp);
  1047. lp->init_ring(dev);
  1048. if (lp->pio_buffer)
  1049. mode = sbus_readw(&ib_iomem->mode);
  1050. else
  1051. mode = ib_mem->mode;
  1052. if (dev->flags & IFF_PROMISC) {
  1053. mode |= LE_MO_PROM;
  1054. if (lp->pio_buffer)
  1055. sbus_writew(mode, &ib_iomem->mode);
  1056. else
  1057. ib_mem->mode = mode;
  1058. } else {
  1059. mode &= ~LE_MO_PROM;
  1060. if (lp->pio_buffer)
  1061. sbus_writew(mode, &ib_iomem->mode);
  1062. else
  1063. ib_mem->mode = mode;
  1064. lance_load_multicast(dev);
  1065. }
  1066. load_csrs(lp);
  1067. init_restart_lance(lp);
  1068. netif_wake_queue(dev);
  1069. }
  1070. static void lance_set_multicast_retry(unsigned long _opaque)
  1071. {
  1072. struct net_device *dev = (struct net_device *) _opaque;
  1073. lance_set_multicast(dev);
  1074. }
  1075. static void lance_free_hwresources(struct lance_private *lp)
  1076. {
  1077. if (lp->lregs)
  1078. of_iounmap(&lp->op->resource[0], lp->lregs, LANCE_REG_SIZE);
  1079. if (lp->dregs) {
  1080. struct platform_device *ledma = lp->ledma;
  1081. of_iounmap(&ledma->resource[0], lp->dregs,
  1082. resource_size(&ledma->resource[0]));
  1083. }
  1084. if (lp->init_block_iomem) {
  1085. of_iounmap(&lp->lebuffer->resource[0], lp->init_block_iomem,
  1086. sizeof(struct lance_init_block));
  1087. } else if (lp->init_block_mem) {
  1088. dma_free_coherent(&lp->op->dev,
  1089. sizeof(struct lance_init_block),
  1090. lp->init_block_mem,
  1091. lp->init_block_dvma);
  1092. }
  1093. }
  1094. /* Ethtool support... */
  1095. static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1096. {
  1097. strcpy(info->driver, "sunlance");
  1098. strcpy(info->version, "2.02");
  1099. }
  1100. static const struct ethtool_ops sparc_lance_ethtool_ops = {
  1101. .get_drvinfo = sparc_lance_get_drvinfo,
  1102. .get_link = ethtool_op_get_link,
  1103. };
  1104. static const struct net_device_ops sparc_lance_ops = {
  1105. .ndo_open = lance_open,
  1106. .ndo_stop = lance_close,
  1107. .ndo_start_xmit = lance_start_xmit,
  1108. .ndo_set_multicast_list = lance_set_multicast,
  1109. .ndo_tx_timeout = lance_tx_timeout,
  1110. .ndo_change_mtu = eth_change_mtu,
  1111. .ndo_set_mac_address = eth_mac_addr,
  1112. .ndo_validate_addr = eth_validate_addr,
  1113. };
  1114. static int __devinit sparc_lance_probe_one(struct platform_device *op,
  1115. struct platform_device *ledma,
  1116. struct platform_device *lebuffer)
  1117. {
  1118. struct device_node *dp = op->dev.of_node;
  1119. static unsigned version_printed;
  1120. struct lance_private *lp;
  1121. struct net_device *dev;
  1122. int i;
  1123. dev = alloc_etherdev(sizeof(struct lance_private) + 8);
  1124. if (!dev)
  1125. return -ENOMEM;
  1126. lp = netdev_priv(dev);
  1127. if (sparc_lance_debug && version_printed++ == 0)
  1128. printk (KERN_INFO "%s", version);
  1129. spin_lock_init(&lp->lock);
  1130. /* Copy the IDPROM ethernet address to the device structure, later we
  1131. * will copy the address in the device structure to the lance
  1132. * initialization block.
  1133. */
  1134. for (i = 0; i < 6; i++)
  1135. dev->dev_addr[i] = idprom->id_ethaddr[i];
  1136. /* Get the IO region */
  1137. lp->lregs = of_ioremap(&op->resource[0], 0,
  1138. LANCE_REG_SIZE, lancestr);
  1139. if (!lp->lregs) {
  1140. printk(KERN_ERR "SunLance: Cannot map registers.\n");
  1141. goto fail;
  1142. }
  1143. lp->ledma = ledma;
  1144. if (lp->ledma) {
  1145. lp->dregs = of_ioremap(&ledma->resource[0], 0,
  1146. resource_size(&ledma->resource[0]),
  1147. "ledma");
  1148. if (!lp->dregs) {
  1149. printk(KERN_ERR "SunLance: Cannot map "
  1150. "ledma registers.\n");
  1151. goto fail;
  1152. }
  1153. }
  1154. lp->op = op;
  1155. lp->lebuffer = lebuffer;
  1156. if (lebuffer) {
  1157. /* sanity check */
  1158. if (lebuffer->resource[0].start & 7) {
  1159. printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
  1160. goto fail;
  1161. }
  1162. lp->init_block_iomem =
  1163. of_ioremap(&lebuffer->resource[0], 0,
  1164. sizeof(struct lance_init_block), "lebuffer");
  1165. if (!lp->init_block_iomem) {
  1166. printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
  1167. goto fail;
  1168. }
  1169. lp->init_block_dvma = 0;
  1170. lp->pio_buffer = 1;
  1171. lp->init_ring = lance_init_ring_pio;
  1172. lp->rx = lance_rx_pio;
  1173. lp->tx = lance_tx_pio;
  1174. } else {
  1175. lp->init_block_mem =
  1176. dma_alloc_coherent(&op->dev,
  1177. sizeof(struct lance_init_block),
  1178. &lp->init_block_dvma, GFP_ATOMIC);
  1179. if (!lp->init_block_mem) {
  1180. printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n");
  1181. goto fail;
  1182. }
  1183. lp->pio_buffer = 0;
  1184. lp->init_ring = lance_init_ring_dvma;
  1185. lp->rx = lance_rx_dvma;
  1186. lp->tx = lance_tx_dvma;
  1187. }
  1188. lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval",
  1189. (LE_C3_BSWP |
  1190. LE_C3_ACON |
  1191. LE_C3_BCON));
  1192. lp->name = lancestr;
  1193. lp->burst_sizes = 0;
  1194. if (lp->ledma) {
  1195. struct device_node *ledma_dp = ledma->dev.of_node;
  1196. struct device_node *sbus_dp;
  1197. unsigned int sbmask;
  1198. const char *prop;
  1199. u32 csr;
  1200. /* Find burst-size property for ledma */
  1201. lp->burst_sizes = of_getintprop_default(ledma_dp,
  1202. "burst-sizes", 0);
  1203. /* ledma may be capable of fast bursts, but sbus may not. */
  1204. sbus_dp = ledma_dp->parent;
  1205. sbmask = of_getintprop_default(sbus_dp, "burst-sizes",
  1206. DMA_BURSTBITS);
  1207. lp->burst_sizes &= sbmask;
  1208. /* Get the cable-selection property */
  1209. prop = of_get_property(ledma_dp, "cable-selection", NULL);
  1210. if (!prop || prop[0] == '\0') {
  1211. struct device_node *nd;
  1212. printk(KERN_INFO "SunLance: using "
  1213. "auto-carrier-detection.\n");
  1214. nd = of_find_node_by_path("/options");
  1215. if (!nd)
  1216. goto no_link_test;
  1217. prop = of_get_property(nd, "tpe-link-test?", NULL);
  1218. if (!prop)
  1219. goto no_link_test;
  1220. if (strcmp(prop, "true")) {
  1221. printk(KERN_NOTICE "SunLance: warning: overriding option "
  1222. "'tpe-link-test?'\n");
  1223. printk(KERN_NOTICE "SunLance: warning: mail any problems "
  1224. "to ecd@skynet.be\n");
  1225. auxio_set_lte(AUXIO_LTE_ON);
  1226. }
  1227. no_link_test:
  1228. lp->auto_select = 1;
  1229. lp->tpe = 0;
  1230. } else if (!strcmp(prop, "aui")) {
  1231. lp->auto_select = 0;
  1232. lp->tpe = 0;
  1233. } else {
  1234. lp->auto_select = 0;
  1235. lp->tpe = 1;
  1236. }
  1237. /* Reset ledma */
  1238. csr = sbus_readl(lp->dregs + DMA_CSR);
  1239. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  1240. udelay(200);
  1241. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  1242. } else
  1243. lp->dregs = NULL;
  1244. lp->dev = dev;
  1245. SET_NETDEV_DEV(dev, &op->dev);
  1246. dev->watchdog_timeo = 5*HZ;
  1247. dev->ethtool_ops = &sparc_lance_ethtool_ops;
  1248. dev->netdev_ops = &sparc_lance_ops;
  1249. dev->irq = op->archdata.irqs[0];
  1250. /* We cannot sleep if the chip is busy during a
  1251. * multicast list update event, because such events
  1252. * can occur from interrupts (ex. IPv6). So we
  1253. * use a timer to try again later when necessary. -DaveM
  1254. */
  1255. init_timer(&lp->multicast_timer);
  1256. lp->multicast_timer.data = (unsigned long) dev;
  1257. lp->multicast_timer.function = lance_set_multicast_retry;
  1258. if (register_netdev(dev)) {
  1259. printk(KERN_ERR "SunLance: Cannot register device.\n");
  1260. goto fail;
  1261. }
  1262. dev_set_drvdata(&op->dev, lp);
  1263. printk(KERN_INFO "%s: LANCE %pM\n",
  1264. dev->name, dev->dev_addr);
  1265. return 0;
  1266. fail:
  1267. lance_free_hwresources(lp);
  1268. free_netdev(dev);
  1269. return -ENODEV;
  1270. }
  1271. static int __devinit sunlance_sbus_probe(struct platform_device *op)
  1272. {
  1273. struct platform_device *parent = to_platform_device(op->dev.parent);
  1274. struct device_node *parent_dp = parent->dev.of_node;
  1275. int err;
  1276. if (!strcmp(parent_dp->name, "ledma")) {
  1277. err = sparc_lance_probe_one(op, parent, NULL);
  1278. } else if (!strcmp(parent_dp->name, "lebuffer")) {
  1279. err = sparc_lance_probe_one(op, NULL, parent);
  1280. } else
  1281. err = sparc_lance_probe_one(op, NULL, NULL);
  1282. return err;
  1283. }
  1284. static int __devexit sunlance_sbus_remove(struct platform_device *op)
  1285. {
  1286. struct lance_private *lp = dev_get_drvdata(&op->dev);
  1287. struct net_device *net_dev = lp->dev;
  1288. unregister_netdev(net_dev);
  1289. lance_free_hwresources(lp);
  1290. free_netdev(net_dev);
  1291. dev_set_drvdata(&op->dev, NULL);
  1292. return 0;
  1293. }
  1294. static const struct of_device_id sunlance_sbus_match[] = {
  1295. {
  1296. .name = "le",
  1297. },
  1298. {},
  1299. };
  1300. MODULE_DEVICE_TABLE(of, sunlance_sbus_match);
  1301. static struct platform_driver sunlance_sbus_driver = {
  1302. .driver = {
  1303. .name = "sunlance",
  1304. .owner = THIS_MODULE,
  1305. .of_match_table = sunlance_sbus_match,
  1306. },
  1307. .probe = sunlance_sbus_probe,
  1308. .remove = __devexit_p(sunlance_sbus_remove),
  1309. };
  1310. /* Find all the lance cards on the system and initialize them */
  1311. static int __init sparc_lance_init(void)
  1312. {
  1313. return platform_driver_register(&sunlance_sbus_driver);
  1314. }
  1315. static void __exit sparc_lance_exit(void)
  1316. {
  1317. platform_driver_unregister(&sunlance_sbus_driver);
  1318. }
  1319. module_init(sparc_lance_init);
  1320. module_exit(sparc_lance_exit);