rrunner.c 42 KB

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  1. /*
  2. * rrunner.c: Linux driver for the Essential RoadRunner HIPPI board.
  3. *
  4. * Copyright (C) 1998-2002 by Jes Sorensen, <jes@wildopensource.com>.
  5. *
  6. * Thanks to Essential Communication for providing us with hardware
  7. * and very comprehensive documentation without which I would not have
  8. * been able to write this driver. A special thank you to John Gibbon
  9. * for sorting out the legal issues, with the NDA, allowing the code to
  10. * be released under the GPL.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * Thanks to Jayaram Bhat from ODS/Essential for fixing some of the
  18. * stupid bugs in my code.
  19. *
  20. * Softnet support and various other patches from Val Henson of
  21. * ODS/Essential.
  22. *
  23. * PCI DMA mapping code partly based on work by Francois Romieu.
  24. */
  25. #define DEBUG 1
  26. #define RX_DMA_SKBUFF 1
  27. #define PKT_COPY_THRESHOLD 512
  28. #include <linux/module.h>
  29. #include <linux/types.h>
  30. #include <linux/errno.h>
  31. #include <linux/ioport.h>
  32. #include <linux/pci.h>
  33. #include <linux/kernel.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/hippidevice.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/init.h>
  38. #include <linux/delay.h>
  39. #include <linux/mm.h>
  40. #include <linux/slab.h>
  41. #include <net/sock.h>
  42. #include <asm/system.h>
  43. #include <asm/cache.h>
  44. #include <asm/byteorder.h>
  45. #include <asm/io.h>
  46. #include <asm/irq.h>
  47. #include <asm/uaccess.h>
  48. #define rr_if_busy(dev) netif_queue_stopped(dev)
  49. #define rr_if_running(dev) netif_running(dev)
  50. #include "rrunner.h"
  51. #define RUN_AT(x) (jiffies + (x))
  52. MODULE_AUTHOR("Jes Sorensen <jes@wildopensource.com>");
  53. MODULE_DESCRIPTION("Essential RoadRunner HIPPI driver");
  54. MODULE_LICENSE("GPL");
  55. static char version[] __devinitdata = "rrunner.c: v0.50 11/11/2002 Jes Sorensen (jes@wildopensource.com)\n";
  56. static const struct net_device_ops rr_netdev_ops = {
  57. .ndo_open = rr_open,
  58. .ndo_stop = rr_close,
  59. .ndo_do_ioctl = rr_ioctl,
  60. .ndo_start_xmit = rr_start_xmit,
  61. .ndo_change_mtu = hippi_change_mtu,
  62. .ndo_set_mac_address = hippi_mac_addr,
  63. };
  64. /*
  65. * Implementation notes:
  66. *
  67. * The DMA engine only allows for DMA within physical 64KB chunks of
  68. * memory. The current approach of the driver (and stack) is to use
  69. * linear blocks of memory for the skbuffs. However, as the data block
  70. * is always the first part of the skb and skbs are 2^n aligned so we
  71. * are guarantted to get the whole block within one 64KB align 64KB
  72. * chunk.
  73. *
  74. * On the long term, relying on being able to allocate 64KB linear
  75. * chunks of memory is not feasible and the skb handling code and the
  76. * stack will need to know about I/O vectors or something similar.
  77. */
  78. static int __devinit rr_init_one(struct pci_dev *pdev,
  79. const struct pci_device_id *ent)
  80. {
  81. struct net_device *dev;
  82. static int version_disp;
  83. u8 pci_latency;
  84. struct rr_private *rrpriv;
  85. void *tmpptr;
  86. dma_addr_t ring_dma;
  87. int ret = -ENOMEM;
  88. dev = alloc_hippi_dev(sizeof(struct rr_private));
  89. if (!dev)
  90. goto out3;
  91. ret = pci_enable_device(pdev);
  92. if (ret) {
  93. ret = -ENODEV;
  94. goto out2;
  95. }
  96. rrpriv = netdev_priv(dev);
  97. SET_NETDEV_DEV(dev, &pdev->dev);
  98. if (pci_request_regions(pdev, "rrunner")) {
  99. ret = -EIO;
  100. goto out;
  101. }
  102. pci_set_drvdata(pdev, dev);
  103. rrpriv->pci_dev = pdev;
  104. spin_lock_init(&rrpriv->lock);
  105. dev->irq = pdev->irq;
  106. dev->netdev_ops = &rr_netdev_ops;
  107. dev->base_addr = pci_resource_start(pdev, 0);
  108. /* display version info if adapter is found */
  109. if (!version_disp) {
  110. /* set display flag to TRUE so that */
  111. /* we only display this string ONCE */
  112. version_disp = 1;
  113. printk(version);
  114. }
  115. pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
  116. if (pci_latency <= 0x58){
  117. pci_latency = 0x58;
  118. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, pci_latency);
  119. }
  120. pci_set_master(pdev);
  121. printk(KERN_INFO "%s: Essential RoadRunner serial HIPPI "
  122. "at 0x%08lx, irq %i, PCI latency %i\n", dev->name,
  123. dev->base_addr, dev->irq, pci_latency);
  124. /*
  125. * Remap the regs into kernel space.
  126. */
  127. rrpriv->regs = ioremap(dev->base_addr, 0x1000);
  128. if (!rrpriv->regs){
  129. printk(KERN_ERR "%s: Unable to map I/O register, "
  130. "RoadRunner will be disabled.\n", dev->name);
  131. ret = -EIO;
  132. goto out;
  133. }
  134. tmpptr = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
  135. rrpriv->tx_ring = tmpptr;
  136. rrpriv->tx_ring_dma = ring_dma;
  137. if (!tmpptr) {
  138. ret = -ENOMEM;
  139. goto out;
  140. }
  141. tmpptr = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
  142. rrpriv->rx_ring = tmpptr;
  143. rrpriv->rx_ring_dma = ring_dma;
  144. if (!tmpptr) {
  145. ret = -ENOMEM;
  146. goto out;
  147. }
  148. tmpptr = pci_alloc_consistent(pdev, EVT_RING_SIZE, &ring_dma);
  149. rrpriv->evt_ring = tmpptr;
  150. rrpriv->evt_ring_dma = ring_dma;
  151. if (!tmpptr) {
  152. ret = -ENOMEM;
  153. goto out;
  154. }
  155. /*
  156. * Don't access any register before this point!
  157. */
  158. #ifdef __BIG_ENDIAN
  159. writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP,
  160. &rrpriv->regs->HostCtrl);
  161. #endif
  162. /*
  163. * Need to add a case for little-endian 64-bit hosts here.
  164. */
  165. rr_init(dev);
  166. dev->base_addr = 0;
  167. ret = register_netdev(dev);
  168. if (ret)
  169. goto out;
  170. return 0;
  171. out:
  172. if (rrpriv->rx_ring)
  173. pci_free_consistent(pdev, RX_TOTAL_SIZE, rrpriv->rx_ring,
  174. rrpriv->rx_ring_dma);
  175. if (rrpriv->tx_ring)
  176. pci_free_consistent(pdev, TX_TOTAL_SIZE, rrpriv->tx_ring,
  177. rrpriv->tx_ring_dma);
  178. if (rrpriv->regs)
  179. iounmap(rrpriv->regs);
  180. if (pdev) {
  181. pci_release_regions(pdev);
  182. pci_set_drvdata(pdev, NULL);
  183. }
  184. out2:
  185. free_netdev(dev);
  186. out3:
  187. return ret;
  188. }
  189. static void __devexit rr_remove_one (struct pci_dev *pdev)
  190. {
  191. struct net_device *dev = pci_get_drvdata(pdev);
  192. if (dev) {
  193. struct rr_private *rr = netdev_priv(dev);
  194. if (!(readl(&rr->regs->HostCtrl) & NIC_HALTED)){
  195. printk(KERN_ERR "%s: trying to unload running NIC\n",
  196. dev->name);
  197. writel(HALT_NIC, &rr->regs->HostCtrl);
  198. }
  199. pci_free_consistent(pdev, EVT_RING_SIZE, rr->evt_ring,
  200. rr->evt_ring_dma);
  201. pci_free_consistent(pdev, RX_TOTAL_SIZE, rr->rx_ring,
  202. rr->rx_ring_dma);
  203. pci_free_consistent(pdev, TX_TOTAL_SIZE, rr->tx_ring,
  204. rr->tx_ring_dma);
  205. unregister_netdev(dev);
  206. iounmap(rr->regs);
  207. free_netdev(dev);
  208. pci_release_regions(pdev);
  209. pci_disable_device(pdev);
  210. pci_set_drvdata(pdev, NULL);
  211. }
  212. }
  213. /*
  214. * Commands are considered to be slow, thus there is no reason to
  215. * inline this.
  216. */
  217. static void rr_issue_cmd(struct rr_private *rrpriv, struct cmd *cmd)
  218. {
  219. struct rr_regs __iomem *regs;
  220. u32 idx;
  221. regs = rrpriv->regs;
  222. /*
  223. * This is temporary - it will go away in the final version.
  224. * We probably also want to make this function inline.
  225. */
  226. if (readl(&regs->HostCtrl) & NIC_HALTED){
  227. printk("issuing command for halted NIC, code 0x%x, "
  228. "HostCtrl %08x\n", cmd->code, readl(&regs->HostCtrl));
  229. if (readl(&regs->Mode) & FATAL_ERR)
  230. printk("error codes Fail1 %02x, Fail2 %02x\n",
  231. readl(&regs->Fail1), readl(&regs->Fail2));
  232. }
  233. idx = rrpriv->info->cmd_ctrl.pi;
  234. writel(*(u32*)(cmd), &regs->CmdRing[idx]);
  235. wmb();
  236. idx = (idx - 1) % CMD_RING_ENTRIES;
  237. rrpriv->info->cmd_ctrl.pi = idx;
  238. wmb();
  239. if (readl(&regs->Mode) & FATAL_ERR)
  240. printk("error code %02x\n", readl(&regs->Fail1));
  241. }
  242. /*
  243. * Reset the board in a sensible manner. The NIC is already halted
  244. * when we get here and a spin-lock is held.
  245. */
  246. static int rr_reset(struct net_device *dev)
  247. {
  248. struct rr_private *rrpriv;
  249. struct rr_regs __iomem *regs;
  250. u32 start_pc;
  251. int i;
  252. rrpriv = netdev_priv(dev);
  253. regs = rrpriv->regs;
  254. rr_load_firmware(dev);
  255. writel(0x01000000, &regs->TX_state);
  256. writel(0xff800000, &regs->RX_state);
  257. writel(0, &regs->AssistState);
  258. writel(CLEAR_INTA, &regs->LocalCtrl);
  259. writel(0x01, &regs->BrkPt);
  260. writel(0, &regs->Timer);
  261. writel(0, &regs->TimerRef);
  262. writel(RESET_DMA, &regs->DmaReadState);
  263. writel(RESET_DMA, &regs->DmaWriteState);
  264. writel(0, &regs->DmaWriteHostHi);
  265. writel(0, &regs->DmaWriteHostLo);
  266. writel(0, &regs->DmaReadHostHi);
  267. writel(0, &regs->DmaReadHostLo);
  268. writel(0, &regs->DmaReadLen);
  269. writel(0, &regs->DmaWriteLen);
  270. writel(0, &regs->DmaWriteLcl);
  271. writel(0, &regs->DmaWriteIPchecksum);
  272. writel(0, &regs->DmaReadLcl);
  273. writel(0, &regs->DmaReadIPchecksum);
  274. writel(0, &regs->PciState);
  275. #if (BITS_PER_LONG == 64) && defined __LITTLE_ENDIAN
  276. writel(SWAP_DATA | PTR64BIT | PTR_WD_SWAP, &regs->Mode);
  277. #elif (BITS_PER_LONG == 64)
  278. writel(SWAP_DATA | PTR64BIT | PTR_WD_NOSWAP, &regs->Mode);
  279. #else
  280. writel(SWAP_DATA | PTR32BIT | PTR_WD_NOSWAP, &regs->Mode);
  281. #endif
  282. #if 0
  283. /*
  284. * Don't worry, this is just black magic.
  285. */
  286. writel(0xdf000, &regs->RxBase);
  287. writel(0xdf000, &regs->RxPrd);
  288. writel(0xdf000, &regs->RxCon);
  289. writel(0xce000, &regs->TxBase);
  290. writel(0xce000, &regs->TxPrd);
  291. writel(0xce000, &regs->TxCon);
  292. writel(0, &regs->RxIndPro);
  293. writel(0, &regs->RxIndCon);
  294. writel(0, &regs->RxIndRef);
  295. writel(0, &regs->TxIndPro);
  296. writel(0, &regs->TxIndCon);
  297. writel(0, &regs->TxIndRef);
  298. writel(0xcc000, &regs->pad10[0]);
  299. writel(0, &regs->DrCmndPro);
  300. writel(0, &regs->DrCmndCon);
  301. writel(0, &regs->DwCmndPro);
  302. writel(0, &regs->DwCmndCon);
  303. writel(0, &regs->DwCmndRef);
  304. writel(0, &regs->DrDataPro);
  305. writel(0, &regs->DrDataCon);
  306. writel(0, &regs->DrDataRef);
  307. writel(0, &regs->DwDataPro);
  308. writel(0, &regs->DwDataCon);
  309. writel(0, &regs->DwDataRef);
  310. #endif
  311. writel(0xffffffff, &regs->MbEvent);
  312. writel(0, &regs->Event);
  313. writel(0, &regs->TxPi);
  314. writel(0, &regs->IpRxPi);
  315. writel(0, &regs->EvtCon);
  316. writel(0, &regs->EvtPrd);
  317. rrpriv->info->evt_ctrl.pi = 0;
  318. for (i = 0; i < CMD_RING_ENTRIES; i++)
  319. writel(0, &regs->CmdRing[i]);
  320. /*
  321. * Why 32 ? is this not cache line size dependent?
  322. */
  323. writel(RBURST_64|WBURST_64, &regs->PciState);
  324. wmb();
  325. start_pc = rr_read_eeprom_word(rrpriv,
  326. offsetof(struct eeprom, rncd_info.FwStart));
  327. #if (DEBUG > 1)
  328. printk("%s: Executing firmware at address 0x%06x\n",
  329. dev->name, start_pc);
  330. #endif
  331. writel(start_pc + 0x800, &regs->Pc);
  332. wmb();
  333. udelay(5);
  334. writel(start_pc, &regs->Pc);
  335. wmb();
  336. return 0;
  337. }
  338. /*
  339. * Read a string from the EEPROM.
  340. */
  341. static unsigned int rr_read_eeprom(struct rr_private *rrpriv,
  342. unsigned long offset,
  343. unsigned char *buf,
  344. unsigned long length)
  345. {
  346. struct rr_regs __iomem *regs = rrpriv->regs;
  347. u32 misc, io, host, i;
  348. io = readl(&regs->ExtIo);
  349. writel(0, &regs->ExtIo);
  350. misc = readl(&regs->LocalCtrl);
  351. writel(0, &regs->LocalCtrl);
  352. host = readl(&regs->HostCtrl);
  353. writel(host | HALT_NIC, &regs->HostCtrl);
  354. mb();
  355. for (i = 0; i < length; i++){
  356. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  357. mb();
  358. buf[i] = (readl(&regs->WinData) >> 24) & 0xff;
  359. mb();
  360. }
  361. writel(host, &regs->HostCtrl);
  362. writel(misc, &regs->LocalCtrl);
  363. writel(io, &regs->ExtIo);
  364. mb();
  365. return i;
  366. }
  367. /*
  368. * Shortcut to read one word (4 bytes) out of the EEPROM and convert
  369. * it to our CPU byte-order.
  370. */
  371. static u32 rr_read_eeprom_word(struct rr_private *rrpriv,
  372. size_t offset)
  373. {
  374. __be32 word;
  375. if ((rr_read_eeprom(rrpriv, offset,
  376. (unsigned char *)&word, 4) == 4))
  377. return be32_to_cpu(word);
  378. return 0;
  379. }
  380. /*
  381. * Write a string to the EEPROM.
  382. *
  383. * This is only called when the firmware is not running.
  384. */
  385. static unsigned int write_eeprom(struct rr_private *rrpriv,
  386. unsigned long offset,
  387. unsigned char *buf,
  388. unsigned long length)
  389. {
  390. struct rr_regs __iomem *regs = rrpriv->regs;
  391. u32 misc, io, data, i, j, ready, error = 0;
  392. io = readl(&regs->ExtIo);
  393. writel(0, &regs->ExtIo);
  394. misc = readl(&regs->LocalCtrl);
  395. writel(ENABLE_EEPROM_WRITE, &regs->LocalCtrl);
  396. mb();
  397. for (i = 0; i < length; i++){
  398. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  399. mb();
  400. data = buf[i] << 24;
  401. /*
  402. * Only try to write the data if it is not the same
  403. * value already.
  404. */
  405. if ((readl(&regs->WinData) & 0xff000000) != data){
  406. writel(data, &regs->WinData);
  407. ready = 0;
  408. j = 0;
  409. mb();
  410. while(!ready){
  411. udelay(20);
  412. if ((readl(&regs->WinData) & 0xff000000) ==
  413. data)
  414. ready = 1;
  415. mb();
  416. if (j++ > 5000){
  417. printk("data mismatch: %08x, "
  418. "WinData %08x\n", data,
  419. readl(&regs->WinData));
  420. ready = 1;
  421. error = 1;
  422. }
  423. }
  424. }
  425. }
  426. writel(misc, &regs->LocalCtrl);
  427. writel(io, &regs->ExtIo);
  428. mb();
  429. return error;
  430. }
  431. static int __devinit rr_init(struct net_device *dev)
  432. {
  433. struct rr_private *rrpriv;
  434. struct rr_regs __iomem *regs;
  435. u32 sram_size, rev;
  436. rrpriv = netdev_priv(dev);
  437. regs = rrpriv->regs;
  438. rev = readl(&regs->FwRev);
  439. rrpriv->fw_rev = rev;
  440. if (rev > 0x00020024)
  441. printk(" Firmware revision: %i.%i.%i\n", (rev >> 16),
  442. ((rev >> 8) & 0xff), (rev & 0xff));
  443. else if (rev >= 0x00020000) {
  444. printk(" Firmware revision: %i.%i.%i (2.0.37 or "
  445. "later is recommended)\n", (rev >> 16),
  446. ((rev >> 8) & 0xff), (rev & 0xff));
  447. }else{
  448. printk(" Firmware revision too old: %i.%i.%i, please "
  449. "upgrade to 2.0.37 or later.\n",
  450. (rev >> 16), ((rev >> 8) & 0xff), (rev & 0xff));
  451. }
  452. #if (DEBUG > 2)
  453. printk(" Maximum receive rings %i\n", readl(&regs->MaxRxRng));
  454. #endif
  455. /*
  456. * Read the hardware address from the eeprom. The HW address
  457. * is not really necessary for HIPPI but awfully convenient.
  458. * The pointer arithmetic to put it in dev_addr is ugly, but
  459. * Donald Becker does it this way for the GigE version of this
  460. * card and it's shorter and more portable than any
  461. * other method I've seen. -VAL
  462. */
  463. *(__be16 *)(dev->dev_addr) =
  464. htons(rr_read_eeprom_word(rrpriv, offsetof(struct eeprom, manf.BoardULA)));
  465. *(__be32 *)(dev->dev_addr+2) =
  466. htonl(rr_read_eeprom_word(rrpriv, offsetof(struct eeprom, manf.BoardULA[4])));
  467. printk(" MAC: %pM\n", dev->dev_addr);
  468. sram_size = rr_read_eeprom_word(rrpriv, 8);
  469. printk(" SRAM size 0x%06x\n", sram_size);
  470. return 0;
  471. }
  472. static int rr_init1(struct net_device *dev)
  473. {
  474. struct rr_private *rrpriv;
  475. struct rr_regs __iomem *regs;
  476. unsigned long myjif, flags;
  477. struct cmd cmd;
  478. u32 hostctrl;
  479. int ecode = 0;
  480. short i;
  481. rrpriv = netdev_priv(dev);
  482. regs = rrpriv->regs;
  483. spin_lock_irqsave(&rrpriv->lock, flags);
  484. hostctrl = readl(&regs->HostCtrl);
  485. writel(hostctrl | HALT_NIC | RR_CLEAR_INT, &regs->HostCtrl);
  486. wmb();
  487. if (hostctrl & PARITY_ERR){
  488. printk("%s: Parity error halting NIC - this is serious!\n",
  489. dev->name);
  490. spin_unlock_irqrestore(&rrpriv->lock, flags);
  491. ecode = -EFAULT;
  492. goto error;
  493. }
  494. set_rxaddr(regs, rrpriv->rx_ctrl_dma);
  495. set_infoaddr(regs, rrpriv->info_dma);
  496. rrpriv->info->evt_ctrl.entry_size = sizeof(struct event);
  497. rrpriv->info->evt_ctrl.entries = EVT_RING_ENTRIES;
  498. rrpriv->info->evt_ctrl.mode = 0;
  499. rrpriv->info->evt_ctrl.pi = 0;
  500. set_rraddr(&rrpriv->info->evt_ctrl.rngptr, rrpriv->evt_ring_dma);
  501. rrpriv->info->cmd_ctrl.entry_size = sizeof(struct cmd);
  502. rrpriv->info->cmd_ctrl.entries = CMD_RING_ENTRIES;
  503. rrpriv->info->cmd_ctrl.mode = 0;
  504. rrpriv->info->cmd_ctrl.pi = 15;
  505. for (i = 0; i < CMD_RING_ENTRIES; i++) {
  506. writel(0, &regs->CmdRing[i]);
  507. }
  508. for (i = 0; i < TX_RING_ENTRIES; i++) {
  509. rrpriv->tx_ring[i].size = 0;
  510. set_rraddr(&rrpriv->tx_ring[i].addr, 0);
  511. rrpriv->tx_skbuff[i] = NULL;
  512. }
  513. rrpriv->info->tx_ctrl.entry_size = sizeof(struct tx_desc);
  514. rrpriv->info->tx_ctrl.entries = TX_RING_ENTRIES;
  515. rrpriv->info->tx_ctrl.mode = 0;
  516. rrpriv->info->tx_ctrl.pi = 0;
  517. set_rraddr(&rrpriv->info->tx_ctrl.rngptr, rrpriv->tx_ring_dma);
  518. /*
  519. * Set dirty_tx before we start receiving interrupts, otherwise
  520. * the interrupt handler might think it is supposed to process
  521. * tx ints before we are up and running, which may cause a null
  522. * pointer access in the int handler.
  523. */
  524. rrpriv->tx_full = 0;
  525. rrpriv->cur_rx = 0;
  526. rrpriv->dirty_rx = rrpriv->dirty_tx = 0;
  527. rr_reset(dev);
  528. /* Tuning values */
  529. writel(0x5000, &regs->ConRetry);
  530. writel(0x100, &regs->ConRetryTmr);
  531. writel(0x500000, &regs->ConTmout);
  532. writel(0x60, &regs->IntrTmr);
  533. writel(0x500000, &regs->TxDataMvTimeout);
  534. writel(0x200000, &regs->RxDataMvTimeout);
  535. writel(0x80, &regs->WriteDmaThresh);
  536. writel(0x80, &regs->ReadDmaThresh);
  537. rrpriv->fw_running = 0;
  538. wmb();
  539. hostctrl &= ~(HALT_NIC | INVALID_INST_B | PARITY_ERR);
  540. writel(hostctrl, &regs->HostCtrl);
  541. wmb();
  542. spin_unlock_irqrestore(&rrpriv->lock, flags);
  543. for (i = 0; i < RX_RING_ENTRIES; i++) {
  544. struct sk_buff *skb;
  545. dma_addr_t addr;
  546. rrpriv->rx_ring[i].mode = 0;
  547. skb = alloc_skb(dev->mtu + HIPPI_HLEN, GFP_ATOMIC);
  548. if (!skb) {
  549. printk(KERN_WARNING "%s: Unable to allocate memory "
  550. "for receive ring - halting NIC\n", dev->name);
  551. ecode = -ENOMEM;
  552. goto error;
  553. }
  554. rrpriv->rx_skbuff[i] = skb;
  555. addr = pci_map_single(rrpriv->pci_dev, skb->data,
  556. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  557. /*
  558. * Sanity test to see if we conflict with the DMA
  559. * limitations of the Roadrunner.
  560. */
  561. if ((((unsigned long)skb->data) & 0xfff) > ~65320)
  562. printk("skb alloc error\n");
  563. set_rraddr(&rrpriv->rx_ring[i].addr, addr);
  564. rrpriv->rx_ring[i].size = dev->mtu + HIPPI_HLEN;
  565. }
  566. rrpriv->rx_ctrl[4].entry_size = sizeof(struct rx_desc);
  567. rrpriv->rx_ctrl[4].entries = RX_RING_ENTRIES;
  568. rrpriv->rx_ctrl[4].mode = 8;
  569. rrpriv->rx_ctrl[4].pi = 0;
  570. wmb();
  571. set_rraddr(&rrpriv->rx_ctrl[4].rngptr, rrpriv->rx_ring_dma);
  572. udelay(1000);
  573. /*
  574. * Now start the FirmWare.
  575. */
  576. cmd.code = C_START_FW;
  577. cmd.ring = 0;
  578. cmd.index = 0;
  579. rr_issue_cmd(rrpriv, &cmd);
  580. /*
  581. * Give the FirmWare time to chew on the `get running' command.
  582. */
  583. myjif = jiffies + 5 * HZ;
  584. while (time_before(jiffies, myjif) && !rrpriv->fw_running)
  585. cpu_relax();
  586. netif_start_queue(dev);
  587. return ecode;
  588. error:
  589. /*
  590. * We might have gotten here because we are out of memory,
  591. * make sure we release everything we allocated before failing
  592. */
  593. for (i = 0; i < RX_RING_ENTRIES; i++) {
  594. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  595. if (skb) {
  596. pci_unmap_single(rrpriv->pci_dev,
  597. rrpriv->rx_ring[i].addr.addrlo,
  598. dev->mtu + HIPPI_HLEN,
  599. PCI_DMA_FROMDEVICE);
  600. rrpriv->rx_ring[i].size = 0;
  601. set_rraddr(&rrpriv->rx_ring[i].addr, 0);
  602. dev_kfree_skb(skb);
  603. rrpriv->rx_skbuff[i] = NULL;
  604. }
  605. }
  606. return ecode;
  607. }
  608. /*
  609. * All events are considered to be slow (RX/TX ints do not generate
  610. * events) and are handled here, outside the main interrupt handler,
  611. * to reduce the size of the handler.
  612. */
  613. static u32 rr_handle_event(struct net_device *dev, u32 prodidx, u32 eidx)
  614. {
  615. struct rr_private *rrpriv;
  616. struct rr_regs __iomem *regs;
  617. u32 tmp;
  618. rrpriv = netdev_priv(dev);
  619. regs = rrpriv->regs;
  620. while (prodidx != eidx){
  621. switch (rrpriv->evt_ring[eidx].code){
  622. case E_NIC_UP:
  623. tmp = readl(&regs->FwRev);
  624. printk(KERN_INFO "%s: Firmware revision %i.%i.%i "
  625. "up and running\n", dev->name,
  626. (tmp >> 16), ((tmp >> 8) & 0xff), (tmp & 0xff));
  627. rrpriv->fw_running = 1;
  628. writel(RX_RING_ENTRIES - 1, &regs->IpRxPi);
  629. wmb();
  630. break;
  631. case E_LINK_ON:
  632. printk(KERN_INFO "%s: Optical link ON\n", dev->name);
  633. break;
  634. case E_LINK_OFF:
  635. printk(KERN_INFO "%s: Optical link OFF\n", dev->name);
  636. break;
  637. case E_RX_IDLE:
  638. printk(KERN_WARNING "%s: RX data not moving\n",
  639. dev->name);
  640. goto drop;
  641. case E_WATCHDOG:
  642. printk(KERN_INFO "%s: The watchdog is here to see "
  643. "us\n", dev->name);
  644. break;
  645. case E_INTERN_ERR:
  646. printk(KERN_ERR "%s: HIPPI Internal NIC error\n",
  647. dev->name);
  648. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  649. &regs->HostCtrl);
  650. wmb();
  651. break;
  652. case E_HOST_ERR:
  653. printk(KERN_ERR "%s: Host software error\n",
  654. dev->name);
  655. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  656. &regs->HostCtrl);
  657. wmb();
  658. break;
  659. /*
  660. * TX events.
  661. */
  662. case E_CON_REJ:
  663. printk(KERN_WARNING "%s: Connection rejected\n",
  664. dev->name);
  665. dev->stats.tx_aborted_errors++;
  666. break;
  667. case E_CON_TMOUT:
  668. printk(KERN_WARNING "%s: Connection timeout\n",
  669. dev->name);
  670. break;
  671. case E_DISC_ERR:
  672. printk(KERN_WARNING "%s: HIPPI disconnect error\n",
  673. dev->name);
  674. dev->stats.tx_aborted_errors++;
  675. break;
  676. case E_INT_PRTY:
  677. printk(KERN_ERR "%s: HIPPI Internal Parity error\n",
  678. dev->name);
  679. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  680. &regs->HostCtrl);
  681. wmb();
  682. break;
  683. case E_TX_IDLE:
  684. printk(KERN_WARNING "%s: Transmitter idle\n",
  685. dev->name);
  686. break;
  687. case E_TX_LINK_DROP:
  688. printk(KERN_WARNING "%s: Link lost during transmit\n",
  689. dev->name);
  690. dev->stats.tx_aborted_errors++;
  691. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  692. &regs->HostCtrl);
  693. wmb();
  694. break;
  695. case E_TX_INV_RNG:
  696. printk(KERN_ERR "%s: Invalid send ring block\n",
  697. dev->name);
  698. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  699. &regs->HostCtrl);
  700. wmb();
  701. break;
  702. case E_TX_INV_BUF:
  703. printk(KERN_ERR "%s: Invalid send buffer address\n",
  704. dev->name);
  705. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  706. &regs->HostCtrl);
  707. wmb();
  708. break;
  709. case E_TX_INV_DSC:
  710. printk(KERN_ERR "%s: Invalid descriptor address\n",
  711. dev->name);
  712. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  713. &regs->HostCtrl);
  714. wmb();
  715. break;
  716. /*
  717. * RX events.
  718. */
  719. case E_RX_RNG_OUT:
  720. printk(KERN_INFO "%s: Receive ring full\n", dev->name);
  721. break;
  722. case E_RX_PAR_ERR:
  723. printk(KERN_WARNING "%s: Receive parity error\n",
  724. dev->name);
  725. goto drop;
  726. case E_RX_LLRC_ERR:
  727. printk(KERN_WARNING "%s: Receive LLRC error\n",
  728. dev->name);
  729. goto drop;
  730. case E_PKT_LN_ERR:
  731. printk(KERN_WARNING "%s: Receive packet length "
  732. "error\n", dev->name);
  733. goto drop;
  734. case E_DTA_CKSM_ERR:
  735. printk(KERN_WARNING "%s: Data checksum error\n",
  736. dev->name);
  737. goto drop;
  738. case E_SHT_BST:
  739. printk(KERN_WARNING "%s: Unexpected short burst "
  740. "error\n", dev->name);
  741. goto drop;
  742. case E_STATE_ERR:
  743. printk(KERN_WARNING "%s: Recv. state transition"
  744. " error\n", dev->name);
  745. goto drop;
  746. case E_UNEXP_DATA:
  747. printk(KERN_WARNING "%s: Unexpected data error\n",
  748. dev->name);
  749. goto drop;
  750. case E_LST_LNK_ERR:
  751. printk(KERN_WARNING "%s: Link lost error\n",
  752. dev->name);
  753. goto drop;
  754. case E_FRM_ERR:
  755. printk(KERN_WARNING "%s: Framming Error\n",
  756. dev->name);
  757. goto drop;
  758. case E_FLG_SYN_ERR:
  759. printk(KERN_WARNING "%s: Flag sync. lost during "
  760. "packet\n", dev->name);
  761. goto drop;
  762. case E_RX_INV_BUF:
  763. printk(KERN_ERR "%s: Invalid receive buffer "
  764. "address\n", dev->name);
  765. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  766. &regs->HostCtrl);
  767. wmb();
  768. break;
  769. case E_RX_INV_DSC:
  770. printk(KERN_ERR "%s: Invalid receive descriptor "
  771. "address\n", dev->name);
  772. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  773. &regs->HostCtrl);
  774. wmb();
  775. break;
  776. case E_RNG_BLK:
  777. printk(KERN_ERR "%s: Invalid ring block\n",
  778. dev->name);
  779. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  780. &regs->HostCtrl);
  781. wmb();
  782. break;
  783. drop:
  784. /* Label packet to be dropped.
  785. * Actual dropping occurs in rx
  786. * handling.
  787. *
  788. * The index of packet we get to drop is
  789. * the index of the packet following
  790. * the bad packet. -kbf
  791. */
  792. {
  793. u16 index = rrpriv->evt_ring[eidx].index;
  794. index = (index + (RX_RING_ENTRIES - 1)) %
  795. RX_RING_ENTRIES;
  796. rrpriv->rx_ring[index].mode |=
  797. (PACKET_BAD | PACKET_END);
  798. }
  799. break;
  800. default:
  801. printk(KERN_WARNING "%s: Unhandled event 0x%02x\n",
  802. dev->name, rrpriv->evt_ring[eidx].code);
  803. }
  804. eidx = (eidx + 1) % EVT_RING_ENTRIES;
  805. }
  806. rrpriv->info->evt_ctrl.pi = eidx;
  807. wmb();
  808. return eidx;
  809. }
  810. static void rx_int(struct net_device *dev, u32 rxlimit, u32 index)
  811. {
  812. struct rr_private *rrpriv = netdev_priv(dev);
  813. struct rr_regs __iomem *regs = rrpriv->regs;
  814. do {
  815. struct rx_desc *desc;
  816. u32 pkt_len;
  817. desc = &(rrpriv->rx_ring[index]);
  818. pkt_len = desc->size;
  819. #if (DEBUG > 2)
  820. printk("index %i, rxlimit %i\n", index, rxlimit);
  821. printk("len %x, mode %x\n", pkt_len, desc->mode);
  822. #endif
  823. if ( (rrpriv->rx_ring[index].mode & PACKET_BAD) == PACKET_BAD){
  824. dev->stats.rx_dropped++;
  825. goto defer;
  826. }
  827. if (pkt_len > 0){
  828. struct sk_buff *skb, *rx_skb;
  829. rx_skb = rrpriv->rx_skbuff[index];
  830. if (pkt_len < PKT_COPY_THRESHOLD) {
  831. skb = alloc_skb(pkt_len, GFP_ATOMIC);
  832. if (skb == NULL){
  833. printk(KERN_WARNING "%s: Unable to allocate skb (%i bytes), deferring packet\n", dev->name, pkt_len);
  834. dev->stats.rx_dropped++;
  835. goto defer;
  836. } else {
  837. pci_dma_sync_single_for_cpu(rrpriv->pci_dev,
  838. desc->addr.addrlo,
  839. pkt_len,
  840. PCI_DMA_FROMDEVICE);
  841. memcpy(skb_put(skb, pkt_len),
  842. rx_skb->data, pkt_len);
  843. pci_dma_sync_single_for_device(rrpriv->pci_dev,
  844. desc->addr.addrlo,
  845. pkt_len,
  846. PCI_DMA_FROMDEVICE);
  847. }
  848. }else{
  849. struct sk_buff *newskb;
  850. newskb = alloc_skb(dev->mtu + HIPPI_HLEN,
  851. GFP_ATOMIC);
  852. if (newskb){
  853. dma_addr_t addr;
  854. pci_unmap_single(rrpriv->pci_dev,
  855. desc->addr.addrlo, dev->mtu +
  856. HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  857. skb = rx_skb;
  858. skb_put(skb, pkt_len);
  859. rrpriv->rx_skbuff[index] = newskb;
  860. addr = pci_map_single(rrpriv->pci_dev,
  861. newskb->data,
  862. dev->mtu + HIPPI_HLEN,
  863. PCI_DMA_FROMDEVICE);
  864. set_rraddr(&desc->addr, addr);
  865. } else {
  866. printk("%s: Out of memory, deferring "
  867. "packet\n", dev->name);
  868. dev->stats.rx_dropped++;
  869. goto defer;
  870. }
  871. }
  872. skb->protocol = hippi_type_trans(skb, dev);
  873. netif_rx(skb); /* send it up */
  874. dev->stats.rx_packets++;
  875. dev->stats.rx_bytes += pkt_len;
  876. }
  877. defer:
  878. desc->mode = 0;
  879. desc->size = dev->mtu + HIPPI_HLEN;
  880. if ((index & 7) == 7)
  881. writel(index, &regs->IpRxPi);
  882. index = (index + 1) % RX_RING_ENTRIES;
  883. } while(index != rxlimit);
  884. rrpriv->cur_rx = index;
  885. wmb();
  886. }
  887. static irqreturn_t rr_interrupt(int irq, void *dev_id)
  888. {
  889. struct rr_private *rrpriv;
  890. struct rr_regs __iomem *regs;
  891. struct net_device *dev = (struct net_device *)dev_id;
  892. u32 prodidx, rxindex, eidx, txcsmr, rxlimit, txcon;
  893. rrpriv = netdev_priv(dev);
  894. regs = rrpriv->regs;
  895. if (!(readl(&regs->HostCtrl) & RR_INT))
  896. return IRQ_NONE;
  897. spin_lock(&rrpriv->lock);
  898. prodidx = readl(&regs->EvtPrd);
  899. txcsmr = (prodidx >> 8) & 0xff;
  900. rxlimit = (prodidx >> 16) & 0xff;
  901. prodidx &= 0xff;
  902. #if (DEBUG > 2)
  903. printk("%s: interrupt, prodidx = %i, eidx = %i\n", dev->name,
  904. prodidx, rrpriv->info->evt_ctrl.pi);
  905. #endif
  906. /*
  907. * Order here is important. We must handle events
  908. * before doing anything else in order to catch
  909. * such things as LLRC errors, etc -kbf
  910. */
  911. eidx = rrpriv->info->evt_ctrl.pi;
  912. if (prodidx != eidx)
  913. eidx = rr_handle_event(dev, prodidx, eidx);
  914. rxindex = rrpriv->cur_rx;
  915. if (rxindex != rxlimit)
  916. rx_int(dev, rxlimit, rxindex);
  917. txcon = rrpriv->dirty_tx;
  918. if (txcsmr != txcon) {
  919. do {
  920. /* Due to occational firmware TX producer/consumer out
  921. * of sync. error need to check entry in ring -kbf
  922. */
  923. if(rrpriv->tx_skbuff[txcon]){
  924. struct tx_desc *desc;
  925. struct sk_buff *skb;
  926. desc = &(rrpriv->tx_ring[txcon]);
  927. skb = rrpriv->tx_skbuff[txcon];
  928. dev->stats.tx_packets++;
  929. dev->stats.tx_bytes += skb->len;
  930. pci_unmap_single(rrpriv->pci_dev,
  931. desc->addr.addrlo, skb->len,
  932. PCI_DMA_TODEVICE);
  933. dev_kfree_skb_irq(skb);
  934. rrpriv->tx_skbuff[txcon] = NULL;
  935. desc->size = 0;
  936. set_rraddr(&rrpriv->tx_ring[txcon].addr, 0);
  937. desc->mode = 0;
  938. }
  939. txcon = (txcon + 1) % TX_RING_ENTRIES;
  940. } while (txcsmr != txcon);
  941. wmb();
  942. rrpriv->dirty_tx = txcon;
  943. if (rrpriv->tx_full && rr_if_busy(dev) &&
  944. (((rrpriv->info->tx_ctrl.pi + 1) % TX_RING_ENTRIES)
  945. != rrpriv->dirty_tx)){
  946. rrpriv->tx_full = 0;
  947. netif_wake_queue(dev);
  948. }
  949. }
  950. eidx |= ((txcsmr << 8) | (rxlimit << 16));
  951. writel(eidx, &regs->EvtCon);
  952. wmb();
  953. spin_unlock(&rrpriv->lock);
  954. return IRQ_HANDLED;
  955. }
  956. static inline void rr_raz_tx(struct rr_private *rrpriv,
  957. struct net_device *dev)
  958. {
  959. int i;
  960. for (i = 0; i < TX_RING_ENTRIES; i++) {
  961. struct sk_buff *skb = rrpriv->tx_skbuff[i];
  962. if (skb) {
  963. struct tx_desc *desc = &(rrpriv->tx_ring[i]);
  964. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  965. skb->len, PCI_DMA_TODEVICE);
  966. desc->size = 0;
  967. set_rraddr(&desc->addr, 0);
  968. dev_kfree_skb(skb);
  969. rrpriv->tx_skbuff[i] = NULL;
  970. }
  971. }
  972. }
  973. static inline void rr_raz_rx(struct rr_private *rrpriv,
  974. struct net_device *dev)
  975. {
  976. int i;
  977. for (i = 0; i < RX_RING_ENTRIES; i++) {
  978. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  979. if (skb) {
  980. struct rx_desc *desc = &(rrpriv->rx_ring[i]);
  981. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  982. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  983. desc->size = 0;
  984. set_rraddr(&desc->addr, 0);
  985. dev_kfree_skb(skb);
  986. rrpriv->rx_skbuff[i] = NULL;
  987. }
  988. }
  989. }
  990. static void rr_timer(unsigned long data)
  991. {
  992. struct net_device *dev = (struct net_device *)data;
  993. struct rr_private *rrpriv = netdev_priv(dev);
  994. struct rr_regs __iomem *regs = rrpriv->regs;
  995. unsigned long flags;
  996. if (readl(&regs->HostCtrl) & NIC_HALTED){
  997. printk("%s: Restarting nic\n", dev->name);
  998. memset(rrpriv->rx_ctrl, 0, 256 * sizeof(struct ring_ctrl));
  999. memset(rrpriv->info, 0, sizeof(struct rr_info));
  1000. wmb();
  1001. rr_raz_tx(rrpriv, dev);
  1002. rr_raz_rx(rrpriv, dev);
  1003. if (rr_init1(dev)) {
  1004. spin_lock_irqsave(&rrpriv->lock, flags);
  1005. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  1006. &regs->HostCtrl);
  1007. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1008. }
  1009. }
  1010. rrpriv->timer.expires = RUN_AT(5*HZ);
  1011. add_timer(&rrpriv->timer);
  1012. }
  1013. static int rr_open(struct net_device *dev)
  1014. {
  1015. struct rr_private *rrpriv = netdev_priv(dev);
  1016. struct pci_dev *pdev = rrpriv->pci_dev;
  1017. struct rr_regs __iomem *regs;
  1018. int ecode = 0;
  1019. unsigned long flags;
  1020. dma_addr_t dma_addr;
  1021. regs = rrpriv->regs;
  1022. if (rrpriv->fw_rev < 0x00020000) {
  1023. printk(KERN_WARNING "%s: trying to configure device with "
  1024. "obsolete firmware\n", dev->name);
  1025. ecode = -EBUSY;
  1026. goto error;
  1027. }
  1028. rrpriv->rx_ctrl = pci_alloc_consistent(pdev,
  1029. 256 * sizeof(struct ring_ctrl),
  1030. &dma_addr);
  1031. if (!rrpriv->rx_ctrl) {
  1032. ecode = -ENOMEM;
  1033. goto error;
  1034. }
  1035. rrpriv->rx_ctrl_dma = dma_addr;
  1036. memset(rrpriv->rx_ctrl, 0, 256*sizeof(struct ring_ctrl));
  1037. rrpriv->info = pci_alloc_consistent(pdev, sizeof(struct rr_info),
  1038. &dma_addr);
  1039. if (!rrpriv->info) {
  1040. ecode = -ENOMEM;
  1041. goto error;
  1042. }
  1043. rrpriv->info_dma = dma_addr;
  1044. memset(rrpriv->info, 0, sizeof(struct rr_info));
  1045. wmb();
  1046. spin_lock_irqsave(&rrpriv->lock, flags);
  1047. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1048. readl(&regs->HostCtrl);
  1049. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1050. if (request_irq(dev->irq, rr_interrupt, IRQF_SHARED, dev->name, dev)) {
  1051. printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
  1052. dev->name, dev->irq);
  1053. ecode = -EAGAIN;
  1054. goto error;
  1055. }
  1056. if ((ecode = rr_init1(dev)))
  1057. goto error;
  1058. /* Set the timer to switch to check for link beat and perhaps switch
  1059. to an alternate media type. */
  1060. init_timer(&rrpriv->timer);
  1061. rrpriv->timer.expires = RUN_AT(5*HZ); /* 5 sec. watchdog */
  1062. rrpriv->timer.data = (unsigned long)dev;
  1063. rrpriv->timer.function = rr_timer; /* timer handler */
  1064. add_timer(&rrpriv->timer);
  1065. netif_start_queue(dev);
  1066. return ecode;
  1067. error:
  1068. spin_lock_irqsave(&rrpriv->lock, flags);
  1069. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1070. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1071. if (rrpriv->info) {
  1072. pci_free_consistent(pdev, sizeof(struct rr_info), rrpriv->info,
  1073. rrpriv->info_dma);
  1074. rrpriv->info = NULL;
  1075. }
  1076. if (rrpriv->rx_ctrl) {
  1077. pci_free_consistent(pdev, sizeof(struct ring_ctrl),
  1078. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1079. rrpriv->rx_ctrl = NULL;
  1080. }
  1081. netif_stop_queue(dev);
  1082. return ecode;
  1083. }
  1084. static void rr_dump(struct net_device *dev)
  1085. {
  1086. struct rr_private *rrpriv;
  1087. struct rr_regs __iomem *regs;
  1088. u32 index, cons;
  1089. short i;
  1090. int len;
  1091. rrpriv = netdev_priv(dev);
  1092. regs = rrpriv->regs;
  1093. printk("%s: dumping NIC TX rings\n", dev->name);
  1094. printk("RxPrd %08x, TxPrd %02x, EvtPrd %08x, TxPi %02x, TxCtrlPi %02x\n",
  1095. readl(&regs->RxPrd), readl(&regs->TxPrd),
  1096. readl(&regs->EvtPrd), readl(&regs->TxPi),
  1097. rrpriv->info->tx_ctrl.pi);
  1098. printk("Error code 0x%x\n", readl(&regs->Fail1));
  1099. index = (((readl(&regs->EvtPrd) >> 8) & 0xff) - 1) % TX_RING_ENTRIES;
  1100. cons = rrpriv->dirty_tx;
  1101. printk("TX ring index %i, TX consumer %i\n",
  1102. index, cons);
  1103. if (rrpriv->tx_skbuff[index]){
  1104. len = min_t(int, 0x80, rrpriv->tx_skbuff[index]->len);
  1105. printk("skbuff for index %i is valid - dumping data (0x%x bytes - DMA len 0x%x)\n", index, len, rrpriv->tx_ring[index].size);
  1106. for (i = 0; i < len; i++){
  1107. if (!(i & 7))
  1108. printk("\n");
  1109. printk("%02x ", (unsigned char) rrpriv->tx_skbuff[index]->data[i]);
  1110. }
  1111. printk("\n");
  1112. }
  1113. if (rrpriv->tx_skbuff[cons]){
  1114. len = min_t(int, 0x80, rrpriv->tx_skbuff[cons]->len);
  1115. printk("skbuff for cons %i is valid - dumping data (0x%x bytes - skbuff len 0x%x)\n", cons, len, rrpriv->tx_skbuff[cons]->len);
  1116. printk("mode 0x%x, size 0x%x,\n phys %08Lx, skbuff-addr %08lx, truesize 0x%x\n",
  1117. rrpriv->tx_ring[cons].mode,
  1118. rrpriv->tx_ring[cons].size,
  1119. (unsigned long long) rrpriv->tx_ring[cons].addr.addrlo,
  1120. (unsigned long)rrpriv->tx_skbuff[cons]->data,
  1121. (unsigned int)rrpriv->tx_skbuff[cons]->truesize);
  1122. for (i = 0; i < len; i++){
  1123. if (!(i & 7))
  1124. printk("\n");
  1125. printk("%02x ", (unsigned char)rrpriv->tx_ring[cons].size);
  1126. }
  1127. printk("\n");
  1128. }
  1129. printk("dumping TX ring info:\n");
  1130. for (i = 0; i < TX_RING_ENTRIES; i++)
  1131. printk("mode 0x%x, size 0x%x, phys-addr %08Lx\n",
  1132. rrpriv->tx_ring[i].mode,
  1133. rrpriv->tx_ring[i].size,
  1134. (unsigned long long) rrpriv->tx_ring[i].addr.addrlo);
  1135. }
  1136. static int rr_close(struct net_device *dev)
  1137. {
  1138. struct rr_private *rrpriv;
  1139. struct rr_regs __iomem *regs;
  1140. unsigned long flags;
  1141. u32 tmp;
  1142. short i;
  1143. netif_stop_queue(dev);
  1144. rrpriv = netdev_priv(dev);
  1145. regs = rrpriv->regs;
  1146. /*
  1147. * Lock to make sure we are not cleaning up while another CPU
  1148. * is handling interrupts.
  1149. */
  1150. spin_lock_irqsave(&rrpriv->lock, flags);
  1151. tmp = readl(&regs->HostCtrl);
  1152. if (tmp & NIC_HALTED){
  1153. printk("%s: NIC already halted\n", dev->name);
  1154. rr_dump(dev);
  1155. }else{
  1156. tmp |= HALT_NIC | RR_CLEAR_INT;
  1157. writel(tmp, &regs->HostCtrl);
  1158. readl(&regs->HostCtrl);
  1159. }
  1160. rrpriv->fw_running = 0;
  1161. del_timer_sync(&rrpriv->timer);
  1162. writel(0, &regs->TxPi);
  1163. writel(0, &regs->IpRxPi);
  1164. writel(0, &regs->EvtCon);
  1165. writel(0, &regs->EvtPrd);
  1166. for (i = 0; i < CMD_RING_ENTRIES; i++)
  1167. writel(0, &regs->CmdRing[i]);
  1168. rrpriv->info->tx_ctrl.entries = 0;
  1169. rrpriv->info->cmd_ctrl.pi = 0;
  1170. rrpriv->info->evt_ctrl.pi = 0;
  1171. rrpriv->rx_ctrl[4].entries = 0;
  1172. rr_raz_tx(rrpriv, dev);
  1173. rr_raz_rx(rrpriv, dev);
  1174. pci_free_consistent(rrpriv->pci_dev, 256 * sizeof(struct ring_ctrl),
  1175. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1176. rrpriv->rx_ctrl = NULL;
  1177. pci_free_consistent(rrpriv->pci_dev, sizeof(struct rr_info),
  1178. rrpriv->info, rrpriv->info_dma);
  1179. rrpriv->info = NULL;
  1180. free_irq(dev->irq, dev);
  1181. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1182. return 0;
  1183. }
  1184. static netdev_tx_t rr_start_xmit(struct sk_buff *skb,
  1185. struct net_device *dev)
  1186. {
  1187. struct rr_private *rrpriv = netdev_priv(dev);
  1188. struct rr_regs __iomem *regs = rrpriv->regs;
  1189. struct hippi_cb *hcb = (struct hippi_cb *) skb->cb;
  1190. struct ring_ctrl *txctrl;
  1191. unsigned long flags;
  1192. u32 index, len = skb->len;
  1193. u32 *ifield;
  1194. struct sk_buff *new_skb;
  1195. if (readl(&regs->Mode) & FATAL_ERR)
  1196. printk("error codes Fail1 %02x, Fail2 %02x\n",
  1197. readl(&regs->Fail1), readl(&regs->Fail2));
  1198. /*
  1199. * We probably need to deal with tbusy here to prevent overruns.
  1200. */
  1201. if (skb_headroom(skb) < 8){
  1202. printk("incoming skb too small - reallocating\n");
  1203. if (!(new_skb = dev_alloc_skb(len + 8))) {
  1204. dev_kfree_skb(skb);
  1205. netif_wake_queue(dev);
  1206. return NETDEV_TX_OK;
  1207. }
  1208. skb_reserve(new_skb, 8);
  1209. skb_put(new_skb, len);
  1210. skb_copy_from_linear_data(skb, new_skb->data, len);
  1211. dev_kfree_skb(skb);
  1212. skb = new_skb;
  1213. }
  1214. ifield = (u32 *)skb_push(skb, 8);
  1215. ifield[0] = 0;
  1216. ifield[1] = hcb->ifield;
  1217. /*
  1218. * We don't need the lock before we are actually going to start
  1219. * fiddling with the control blocks.
  1220. */
  1221. spin_lock_irqsave(&rrpriv->lock, flags);
  1222. txctrl = &rrpriv->info->tx_ctrl;
  1223. index = txctrl->pi;
  1224. rrpriv->tx_skbuff[index] = skb;
  1225. set_rraddr(&rrpriv->tx_ring[index].addr, pci_map_single(
  1226. rrpriv->pci_dev, skb->data, len + 8, PCI_DMA_TODEVICE));
  1227. rrpriv->tx_ring[index].size = len + 8; /* include IFIELD */
  1228. rrpriv->tx_ring[index].mode = PACKET_START | PACKET_END;
  1229. txctrl->pi = (index + 1) % TX_RING_ENTRIES;
  1230. wmb();
  1231. writel(txctrl->pi, &regs->TxPi);
  1232. if (txctrl->pi == rrpriv->dirty_tx){
  1233. rrpriv->tx_full = 1;
  1234. netif_stop_queue(dev);
  1235. }
  1236. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1237. return NETDEV_TX_OK;
  1238. }
  1239. /*
  1240. * Read the firmware out of the EEPROM and put it into the SRAM
  1241. * (or from user space - later)
  1242. *
  1243. * This operation requires the NIC to be halted and is performed with
  1244. * interrupts disabled and with the spinlock hold.
  1245. */
  1246. static int rr_load_firmware(struct net_device *dev)
  1247. {
  1248. struct rr_private *rrpriv;
  1249. struct rr_regs __iomem *regs;
  1250. size_t eptr, segptr;
  1251. int i, j;
  1252. u32 localctrl, sptr, len, tmp;
  1253. u32 p2len, p2size, nr_seg, revision, io, sram_size;
  1254. rrpriv = netdev_priv(dev);
  1255. regs = rrpriv->regs;
  1256. if (dev->flags & IFF_UP)
  1257. return -EBUSY;
  1258. if (!(readl(&regs->HostCtrl) & NIC_HALTED)){
  1259. printk("%s: Trying to load firmware to a running NIC.\n",
  1260. dev->name);
  1261. return -EBUSY;
  1262. }
  1263. localctrl = readl(&regs->LocalCtrl);
  1264. writel(0, &regs->LocalCtrl);
  1265. writel(0, &regs->EvtPrd);
  1266. writel(0, &regs->RxPrd);
  1267. writel(0, &regs->TxPrd);
  1268. /*
  1269. * First wipe the entire SRAM, otherwise we might run into all
  1270. * kinds of trouble ... sigh, this took almost all afternoon
  1271. * to track down ;-(
  1272. */
  1273. io = readl(&regs->ExtIo);
  1274. writel(0, &regs->ExtIo);
  1275. sram_size = rr_read_eeprom_word(rrpriv, 8);
  1276. for (i = 200; i < sram_size / 4; i++){
  1277. writel(i * 4, &regs->WinBase);
  1278. mb();
  1279. writel(0, &regs->WinData);
  1280. mb();
  1281. }
  1282. writel(io, &regs->ExtIo);
  1283. mb();
  1284. eptr = rr_read_eeprom_word(rrpriv,
  1285. offsetof(struct eeprom, rncd_info.AddrRunCodeSegs));
  1286. eptr = ((eptr & 0x1fffff) >> 3);
  1287. p2len = rr_read_eeprom_word(rrpriv, 0x83*4);
  1288. p2len = (p2len << 2);
  1289. p2size = rr_read_eeprom_word(rrpriv, 0x84*4);
  1290. p2size = ((p2size & 0x1fffff) >> 3);
  1291. if ((eptr < p2size) || (eptr > (p2size + p2len))){
  1292. printk("%s: eptr is invalid\n", dev->name);
  1293. goto out;
  1294. }
  1295. revision = rr_read_eeprom_word(rrpriv,
  1296. offsetof(struct eeprom, manf.HeaderFmt));
  1297. if (revision != 1){
  1298. printk("%s: invalid firmware format (%i)\n",
  1299. dev->name, revision);
  1300. goto out;
  1301. }
  1302. nr_seg = rr_read_eeprom_word(rrpriv, eptr);
  1303. eptr +=4;
  1304. #if (DEBUG > 1)
  1305. printk("%s: nr_seg %i\n", dev->name, nr_seg);
  1306. #endif
  1307. for (i = 0; i < nr_seg; i++){
  1308. sptr = rr_read_eeprom_word(rrpriv, eptr);
  1309. eptr += 4;
  1310. len = rr_read_eeprom_word(rrpriv, eptr);
  1311. eptr += 4;
  1312. segptr = rr_read_eeprom_word(rrpriv, eptr);
  1313. segptr = ((segptr & 0x1fffff) >> 3);
  1314. eptr += 4;
  1315. #if (DEBUG > 1)
  1316. printk("%s: segment %i, sram address %06x, length %04x, segptr %06x\n",
  1317. dev->name, i, sptr, len, segptr);
  1318. #endif
  1319. for (j = 0; j < len; j++){
  1320. tmp = rr_read_eeprom_word(rrpriv, segptr);
  1321. writel(sptr, &regs->WinBase);
  1322. mb();
  1323. writel(tmp, &regs->WinData);
  1324. mb();
  1325. segptr += 4;
  1326. sptr += 4;
  1327. }
  1328. }
  1329. out:
  1330. writel(localctrl, &regs->LocalCtrl);
  1331. mb();
  1332. return 0;
  1333. }
  1334. static int rr_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1335. {
  1336. struct rr_private *rrpriv;
  1337. unsigned char *image, *oldimage;
  1338. unsigned long flags;
  1339. unsigned int i;
  1340. int error = -EOPNOTSUPP;
  1341. rrpriv = netdev_priv(dev);
  1342. switch(cmd){
  1343. case SIOCRRGFW:
  1344. if (!capable(CAP_SYS_RAWIO)){
  1345. return -EPERM;
  1346. }
  1347. image = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1348. if (!image){
  1349. printk(KERN_ERR "%s: Unable to allocate memory "
  1350. "for EEPROM image\n", dev->name);
  1351. return -ENOMEM;
  1352. }
  1353. if (rrpriv->fw_running){
  1354. printk("%s: Firmware already running\n", dev->name);
  1355. error = -EPERM;
  1356. goto gf_out;
  1357. }
  1358. spin_lock_irqsave(&rrpriv->lock, flags);
  1359. i = rr_read_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1360. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1361. if (i != EEPROM_BYTES){
  1362. printk(KERN_ERR "%s: Error reading EEPROM\n",
  1363. dev->name);
  1364. error = -EFAULT;
  1365. goto gf_out;
  1366. }
  1367. error = copy_to_user(rq->ifr_data, image, EEPROM_BYTES);
  1368. if (error)
  1369. error = -EFAULT;
  1370. gf_out:
  1371. kfree(image);
  1372. return error;
  1373. case SIOCRRPFW:
  1374. if (!capable(CAP_SYS_RAWIO)){
  1375. return -EPERM;
  1376. }
  1377. image = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1378. oldimage = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1379. if (!image || !oldimage) {
  1380. printk(KERN_ERR "%s: Unable to allocate memory "
  1381. "for EEPROM image\n", dev->name);
  1382. error = -ENOMEM;
  1383. goto wf_out;
  1384. }
  1385. error = copy_from_user(image, rq->ifr_data, EEPROM_BYTES);
  1386. if (error) {
  1387. error = -EFAULT;
  1388. goto wf_out;
  1389. }
  1390. if (rrpriv->fw_running){
  1391. printk("%s: Firmware already running\n", dev->name);
  1392. error = -EPERM;
  1393. goto wf_out;
  1394. }
  1395. printk("%s: Updating EEPROM firmware\n", dev->name);
  1396. spin_lock_irqsave(&rrpriv->lock, flags);
  1397. error = write_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1398. if (error)
  1399. printk(KERN_ERR "%s: Error writing EEPROM\n",
  1400. dev->name);
  1401. i = rr_read_eeprom(rrpriv, 0, oldimage, EEPROM_BYTES);
  1402. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1403. if (i != EEPROM_BYTES)
  1404. printk(KERN_ERR "%s: Error reading back EEPROM "
  1405. "image\n", dev->name);
  1406. error = memcmp(image, oldimage, EEPROM_BYTES);
  1407. if (error){
  1408. printk(KERN_ERR "%s: Error verifying EEPROM image\n",
  1409. dev->name);
  1410. error = -EFAULT;
  1411. }
  1412. wf_out:
  1413. kfree(oldimage);
  1414. kfree(image);
  1415. return error;
  1416. case SIOCRRID:
  1417. return put_user(0x52523032, (int __user *)rq->ifr_data);
  1418. default:
  1419. return error;
  1420. }
  1421. }
  1422. static DEFINE_PCI_DEVICE_TABLE(rr_pci_tbl) = {
  1423. { PCI_VENDOR_ID_ESSENTIAL, PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER,
  1424. PCI_ANY_ID, PCI_ANY_ID, },
  1425. { 0,}
  1426. };
  1427. MODULE_DEVICE_TABLE(pci, rr_pci_tbl);
  1428. static struct pci_driver rr_driver = {
  1429. .name = "rrunner",
  1430. .id_table = rr_pci_tbl,
  1431. .probe = rr_init_one,
  1432. .remove = __devexit_p(rr_remove_one),
  1433. };
  1434. static int __init rr_init_module(void)
  1435. {
  1436. return pci_register_driver(&rr_driver);
  1437. }
  1438. static void __exit rr_cleanup_module(void)
  1439. {
  1440. pci_unregister_driver(&rr_driver);
  1441. }
  1442. module_init(rr_init_module);
  1443. module_exit(rr_cleanup_module);