enic_res.c 8.9 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/errno.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/netdevice.h>
  24. #include "wq_enet_desc.h"
  25. #include "rq_enet_desc.h"
  26. #include "cq_enet_desc.h"
  27. #include "vnic_resource.h"
  28. #include "vnic_enet.h"
  29. #include "vnic_dev.h"
  30. #include "vnic_wq.h"
  31. #include "vnic_rq.h"
  32. #include "vnic_cq.h"
  33. #include "vnic_intr.h"
  34. #include "vnic_stats.h"
  35. #include "vnic_nic.h"
  36. #include "vnic_rss.h"
  37. #include "enic_res.h"
  38. #include "enic.h"
  39. int enic_get_vnic_config(struct enic *enic)
  40. {
  41. struct vnic_enet_config *c = &enic->config;
  42. int err;
  43. err = vnic_dev_mac_addr(enic->vdev, enic->mac_addr);
  44. if (err) {
  45. dev_err(enic_get_dev(enic),
  46. "Error getting MAC addr, %d\n", err);
  47. return err;
  48. }
  49. #define GET_CONFIG(m) \
  50. do { \
  51. err = vnic_dev_spec(enic->vdev, \
  52. offsetof(struct vnic_enet_config, m), \
  53. sizeof(c->m), &c->m); \
  54. if (err) { \
  55. dev_err(enic_get_dev(enic), \
  56. "Error getting %s, %d\n", #m, err); \
  57. return err; \
  58. } \
  59. } while (0)
  60. GET_CONFIG(flags);
  61. GET_CONFIG(wq_desc_count);
  62. GET_CONFIG(rq_desc_count);
  63. GET_CONFIG(mtu);
  64. GET_CONFIG(intr_timer_type);
  65. GET_CONFIG(intr_mode);
  66. GET_CONFIG(intr_timer_usec);
  67. GET_CONFIG(loop_tag);
  68. c->wq_desc_count =
  69. min_t(u32, ENIC_MAX_WQ_DESCS,
  70. max_t(u32, ENIC_MIN_WQ_DESCS,
  71. c->wq_desc_count));
  72. c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  73. c->rq_desc_count =
  74. min_t(u32, ENIC_MAX_RQ_DESCS,
  75. max_t(u32, ENIC_MIN_RQ_DESCS,
  76. c->rq_desc_count));
  77. c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  78. if (c->mtu == 0)
  79. c->mtu = 1500;
  80. c->mtu = min_t(u16, ENIC_MAX_MTU,
  81. max_t(u16, ENIC_MIN_MTU,
  82. c->mtu));
  83. c->intr_timer_usec = min_t(u32,
  84. INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
  85. c->intr_timer_usec);
  86. dev_info(enic_get_dev(enic),
  87. "vNIC MAC addr %pM wq/rq %d/%d mtu %d\n",
  88. enic->mac_addr, c->wq_desc_count, c->rq_desc_count, c->mtu);
  89. dev_info(enic_get_dev(enic), "vNIC csum tx/rx %d/%d "
  90. "tso %d intr timer %d usec rss %d\n",
  91. ENIC_SETTING(enic, TXCSUM), ENIC_SETTING(enic, RXCSUM),
  92. ENIC_SETTING(enic, TSO),
  93. c->intr_timer_usec, ENIC_SETTING(enic, RSS));
  94. return 0;
  95. }
  96. int enic_add_vlan(struct enic *enic, u16 vlanid)
  97. {
  98. u64 a0 = vlanid, a1 = 0;
  99. int wait = 1000;
  100. int err;
  101. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
  102. if (err)
  103. dev_err(enic_get_dev(enic), "Can't add vlan id, %d\n", err);
  104. return err;
  105. }
  106. int enic_del_vlan(struct enic *enic, u16 vlanid)
  107. {
  108. u64 a0 = vlanid, a1 = 0;
  109. int wait = 1000;
  110. int err;
  111. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
  112. if (err)
  113. dev_err(enic_get_dev(enic), "Can't delete vlan id, %d\n", err);
  114. return err;
  115. }
  116. int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
  117. u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
  118. u8 ig_vlan_strip_en)
  119. {
  120. u64 a0, a1;
  121. u32 nic_cfg;
  122. int wait = 1000;
  123. vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
  124. rss_hash_type, rss_hash_bits, rss_base_cpu,
  125. rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
  126. a0 = nic_cfg;
  127. a1 = 0;
  128. return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
  129. }
  130. int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
  131. {
  132. u64 a0 = (u64)key_pa, a1 = len;
  133. int wait = 1000;
  134. return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
  135. }
  136. int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
  137. {
  138. u64 a0 = (u64)cpu_pa, a1 = len;
  139. int wait = 1000;
  140. return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
  141. }
  142. void enic_free_vnic_resources(struct enic *enic)
  143. {
  144. unsigned int i;
  145. for (i = 0; i < enic->wq_count; i++)
  146. vnic_wq_free(&enic->wq[i]);
  147. for (i = 0; i < enic->rq_count; i++)
  148. vnic_rq_free(&enic->rq[i]);
  149. for (i = 0; i < enic->cq_count; i++)
  150. vnic_cq_free(&enic->cq[i]);
  151. for (i = 0; i < enic->intr_count; i++)
  152. vnic_intr_free(&enic->intr[i]);
  153. }
  154. void enic_get_res_counts(struct enic *enic)
  155. {
  156. enic->wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);
  157. enic->rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);
  158. enic->cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);
  159. enic->intr_count = vnic_dev_get_res_count(enic->vdev,
  160. RES_TYPE_INTR_CTRL);
  161. dev_info(enic_get_dev(enic),
  162. "vNIC resources avail: wq %d rq %d cq %d intr %d\n",
  163. enic->wq_count, enic->rq_count,
  164. enic->cq_count, enic->intr_count);
  165. }
  166. void enic_init_vnic_resources(struct enic *enic)
  167. {
  168. enum vnic_dev_intr_mode intr_mode;
  169. unsigned int mask_on_assertion;
  170. unsigned int interrupt_offset;
  171. unsigned int error_interrupt_enable;
  172. unsigned int error_interrupt_offset;
  173. unsigned int cq_index;
  174. unsigned int i;
  175. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  176. /* Init RQ/WQ resources.
  177. *
  178. * RQ[0 - n-1] point to CQ[0 - n-1]
  179. * WQ[0 - m-1] point to CQ[n - n+m-1]
  180. *
  181. * Error interrupt is not enabled for MSI.
  182. */
  183. switch (intr_mode) {
  184. case VNIC_DEV_INTR_MODE_INTX:
  185. case VNIC_DEV_INTR_MODE_MSIX:
  186. error_interrupt_enable = 1;
  187. error_interrupt_offset = enic->intr_count - 2;
  188. break;
  189. default:
  190. error_interrupt_enable = 0;
  191. error_interrupt_offset = 0;
  192. break;
  193. }
  194. for (i = 0; i < enic->rq_count; i++) {
  195. cq_index = i;
  196. vnic_rq_init(&enic->rq[i],
  197. cq_index,
  198. error_interrupt_enable,
  199. error_interrupt_offset);
  200. }
  201. for (i = 0; i < enic->wq_count; i++) {
  202. cq_index = enic->rq_count + i;
  203. vnic_wq_init(&enic->wq[i],
  204. cq_index,
  205. error_interrupt_enable,
  206. error_interrupt_offset);
  207. }
  208. /* Init CQ resources
  209. *
  210. * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
  211. * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
  212. */
  213. for (i = 0; i < enic->cq_count; i++) {
  214. switch (intr_mode) {
  215. case VNIC_DEV_INTR_MODE_MSIX:
  216. interrupt_offset = i;
  217. break;
  218. default:
  219. interrupt_offset = 0;
  220. break;
  221. }
  222. vnic_cq_init(&enic->cq[i],
  223. 0 /* flow_control_enable */,
  224. 1 /* color_enable */,
  225. 0 /* cq_head */,
  226. 0 /* cq_tail */,
  227. 1 /* cq_tail_color */,
  228. 1 /* interrupt_enable */,
  229. 1 /* cq_entry_enable */,
  230. 0 /* cq_message_enable */,
  231. interrupt_offset,
  232. 0 /* cq_message_addr */);
  233. }
  234. /* Init INTR resources
  235. *
  236. * mask_on_assertion is not used for INTx due to the level-
  237. * triggered nature of INTx
  238. */
  239. switch (intr_mode) {
  240. case VNIC_DEV_INTR_MODE_MSI:
  241. case VNIC_DEV_INTR_MODE_MSIX:
  242. mask_on_assertion = 1;
  243. break;
  244. default:
  245. mask_on_assertion = 0;
  246. break;
  247. }
  248. for (i = 0; i < enic->intr_count; i++) {
  249. vnic_intr_init(&enic->intr[i],
  250. INTR_COALESCE_USEC_TO_HW(enic->config.intr_timer_usec),
  251. enic->config.intr_timer_type,
  252. mask_on_assertion);
  253. }
  254. }
  255. int enic_alloc_vnic_resources(struct enic *enic)
  256. {
  257. enum vnic_dev_intr_mode intr_mode;
  258. unsigned int i;
  259. int err;
  260. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  261. dev_info(enic_get_dev(enic), "vNIC resources used: "
  262. "wq %d rq %d cq %d intr %d intr mode %s\n",
  263. enic->wq_count, enic->rq_count,
  264. enic->cq_count, enic->intr_count,
  265. intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
  266. intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
  267. intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :
  268. "unknown");
  269. /* Allocate queue resources
  270. */
  271. for (i = 0; i < enic->wq_count; i++) {
  272. err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i,
  273. enic->config.wq_desc_count,
  274. sizeof(struct wq_enet_desc));
  275. if (err)
  276. goto err_out_cleanup;
  277. }
  278. for (i = 0; i < enic->rq_count; i++) {
  279. err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i,
  280. enic->config.rq_desc_count,
  281. sizeof(struct rq_enet_desc));
  282. if (err)
  283. goto err_out_cleanup;
  284. }
  285. for (i = 0; i < enic->cq_count; i++) {
  286. if (i < enic->rq_count)
  287. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  288. enic->config.rq_desc_count,
  289. sizeof(struct cq_enet_rq_desc));
  290. else
  291. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  292. enic->config.wq_desc_count,
  293. sizeof(struct cq_enet_wq_desc));
  294. if (err)
  295. goto err_out_cleanup;
  296. }
  297. for (i = 0; i < enic->intr_count; i++) {
  298. err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);
  299. if (err)
  300. goto err_out_cleanup;
  301. }
  302. /* Hook remaining resource
  303. */
  304. enic->legacy_pba = vnic_dev_get_res(enic->vdev,
  305. RES_TYPE_INTR_PBA_LEGACY, 0);
  306. if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
  307. dev_err(enic_get_dev(enic),
  308. "Failed to hook legacy pba resource\n");
  309. err = -ENODEV;
  310. goto err_out_cleanup;
  311. }
  312. return 0;
  313. err_out_cleanup:
  314. enic_free_vnic_resources(enic);
  315. return err;
  316. }