pci.c 12 KB

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  1. /*
  2. * PCI handling of I2O controller
  3. *
  4. * Copyright (C) 1999-2002 Red Hat Software
  5. *
  6. * Written by Alan Cox, Building Number Three Ltd
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. * A lot of the I2O message side code from this is taken from the Red
  14. * Creek RCPCI45 adapter driver by Red Creek Communications
  15. *
  16. * Fixes/additions:
  17. * Philipp Rumpf
  18. * Juha Sievänen <Juha.Sievanen@cs.Helsinki.FI>
  19. * Auvo Häkkinen <Auvo.Hakkinen@cs.Helsinki.FI>
  20. * Deepak Saxena <deepak@plexity.net>
  21. * Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
  22. * Alan Cox <alan@lxorguk.ukuu.org.uk>:
  23. * Ported to Linux 2.5.
  24. * Markus Lidel <Markus.Lidel@shadowconnect.com>:
  25. * Minor fixes for 2.6.
  26. * Markus Lidel <Markus.Lidel@shadowconnect.com>:
  27. * Support for sysfs included.
  28. */
  29. #include <linux/pci.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/slab.h>
  32. #include <linux/i2o.h>
  33. #include "core.h"
  34. #define OSM_DESCRIPTION "I2O-subsystem"
  35. /* PCI device id table for all I2O controllers */
  36. static struct pci_device_id __devinitdata i2o_pci_ids[] = {
  37. {PCI_DEVICE_CLASS(PCI_CLASS_INTELLIGENT_I2O << 8, 0xffff00)},
  38. {PCI_DEVICE(PCI_VENDOR_ID_DPT, 0xa511)},
  39. {.vendor = PCI_VENDOR_ID_INTEL,.device = 0x1962,
  40. .subvendor = PCI_VENDOR_ID_PROMISE,.subdevice = PCI_ANY_ID},
  41. {0}
  42. };
  43. /**
  44. * i2o_pci_free - Frees the DMA memory for the I2O controller
  45. * @c: I2O controller to free
  46. *
  47. * Remove all allocated DMA memory and unmap memory IO regions. If MTRR
  48. * is enabled, also remove it again.
  49. */
  50. static void i2o_pci_free(struct i2o_controller *c)
  51. {
  52. struct device *dev;
  53. dev = &c->pdev->dev;
  54. i2o_dma_free(dev, &c->out_queue);
  55. i2o_dma_free(dev, &c->status_block);
  56. kfree(c->lct);
  57. i2o_dma_free(dev, &c->dlct);
  58. i2o_dma_free(dev, &c->hrt);
  59. i2o_dma_free(dev, &c->status);
  60. if (c->raptor && c->in_queue.virt)
  61. iounmap(c->in_queue.virt);
  62. if (c->base.virt)
  63. iounmap(c->base.virt);
  64. pci_release_regions(c->pdev);
  65. }
  66. /**
  67. * i2o_pci_alloc - Allocate DMA memory, map IO memory for I2O controller
  68. * @c: I2O controller
  69. *
  70. * Allocate DMA memory for a PCI (or in theory AGP) I2O controller. All
  71. * IO mappings are also done here. If MTRR is enabled, also do add memory
  72. * regions here.
  73. *
  74. * Returns 0 on success or negative error code on failure.
  75. */
  76. static int __devinit i2o_pci_alloc(struct i2o_controller *c)
  77. {
  78. struct pci_dev *pdev = c->pdev;
  79. struct device *dev = &pdev->dev;
  80. int i;
  81. if (pci_request_regions(pdev, OSM_DESCRIPTION)) {
  82. printk(KERN_ERR "%s: device already claimed\n", c->name);
  83. return -ENODEV;
  84. }
  85. for (i = 0; i < 6; i++) {
  86. /* Skip I/O spaces */
  87. if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
  88. if (!c->base.phys) {
  89. c->base.phys = pci_resource_start(pdev, i);
  90. c->base.len = pci_resource_len(pdev, i);
  91. /*
  92. * If we know what card it is, set the size
  93. * correctly. Code is taken from dpt_i2o.c
  94. */
  95. if (pdev->device == 0xa501) {
  96. if (pdev->subsystem_device >= 0xc032 &&
  97. pdev->subsystem_device <= 0xc03b) {
  98. if (c->base.len > 0x400000)
  99. c->base.len = 0x400000;
  100. } else {
  101. if (c->base.len > 0x100000)
  102. c->base.len = 0x100000;
  103. }
  104. }
  105. if (!c->raptor)
  106. break;
  107. } else {
  108. c->in_queue.phys = pci_resource_start(pdev, i);
  109. c->in_queue.len = pci_resource_len(pdev, i);
  110. break;
  111. }
  112. }
  113. }
  114. if (i == 6) {
  115. printk(KERN_ERR "%s: I2O controller has no memory regions"
  116. " defined.\n", c->name);
  117. i2o_pci_free(c);
  118. return -EINVAL;
  119. }
  120. /* Map the I2O controller */
  121. if (c->raptor) {
  122. printk(KERN_INFO "%s: PCI I2O controller\n", c->name);
  123. printk(KERN_INFO " BAR0 at 0x%08lX size=%ld\n",
  124. (unsigned long)c->base.phys, (unsigned long)c->base.len);
  125. printk(KERN_INFO " BAR1 at 0x%08lX size=%ld\n",
  126. (unsigned long)c->in_queue.phys,
  127. (unsigned long)c->in_queue.len);
  128. } else
  129. printk(KERN_INFO "%s: PCI I2O controller at %08lX size=%ld\n",
  130. c->name, (unsigned long)c->base.phys,
  131. (unsigned long)c->base.len);
  132. c->base.virt = ioremap_nocache(c->base.phys, c->base.len);
  133. if (!c->base.virt) {
  134. printk(KERN_ERR "%s: Unable to map controller.\n", c->name);
  135. i2o_pci_free(c);
  136. return -ENOMEM;
  137. }
  138. if (c->raptor) {
  139. c->in_queue.virt =
  140. ioremap_nocache(c->in_queue.phys, c->in_queue.len);
  141. if (!c->in_queue.virt) {
  142. printk(KERN_ERR "%s: Unable to map controller.\n",
  143. c->name);
  144. i2o_pci_free(c);
  145. return -ENOMEM;
  146. }
  147. } else
  148. c->in_queue = c->base;
  149. c->irq_status = c->base.virt + I2O_IRQ_STATUS;
  150. c->irq_mask = c->base.virt + I2O_IRQ_MASK;
  151. c->in_port = c->base.virt + I2O_IN_PORT;
  152. c->out_port = c->base.virt + I2O_OUT_PORT;
  153. /* Motorola/Freescale chip does not follow spec */
  154. if (pdev->vendor == PCI_VENDOR_ID_MOTOROLA && pdev->device == 0x18c0) {
  155. /* Check if CPU is enabled */
  156. if (be32_to_cpu(readl(c->base.virt + 0x10000)) & 0x10000000) {
  157. printk(KERN_INFO "%s: MPC82XX needs CPU running to "
  158. "service I2O.\n", c->name);
  159. i2o_pci_free(c);
  160. return -ENODEV;
  161. } else {
  162. c->irq_status += I2O_MOTOROLA_PORT_OFFSET;
  163. c->irq_mask += I2O_MOTOROLA_PORT_OFFSET;
  164. c->in_port += I2O_MOTOROLA_PORT_OFFSET;
  165. c->out_port += I2O_MOTOROLA_PORT_OFFSET;
  166. printk(KERN_INFO "%s: MPC82XX workarounds activated.\n",
  167. c->name);
  168. }
  169. }
  170. if (i2o_dma_alloc(dev, &c->status, 8)) {
  171. i2o_pci_free(c);
  172. return -ENOMEM;
  173. }
  174. if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt))) {
  175. i2o_pci_free(c);
  176. return -ENOMEM;
  177. }
  178. if (i2o_dma_alloc(dev, &c->dlct, 8192)) {
  179. i2o_pci_free(c);
  180. return -ENOMEM;
  181. }
  182. if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block))) {
  183. i2o_pci_free(c);
  184. return -ENOMEM;
  185. }
  186. if (i2o_dma_alloc(dev, &c->out_queue,
  187. I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE *
  188. sizeof(u32))) {
  189. i2o_pci_free(c);
  190. return -ENOMEM;
  191. }
  192. pci_set_drvdata(pdev, c);
  193. return 0;
  194. }
  195. /**
  196. * i2o_pci_interrupt - Interrupt handler for I2O controller
  197. * @irq: interrupt line
  198. * @dev_id: pointer to the I2O controller
  199. *
  200. * Handle an interrupt from a PCI based I2O controller. This turns out
  201. * to be rather simple. We keep the controller pointer in the cookie.
  202. */
  203. static irqreturn_t i2o_pci_interrupt(int irq, void *dev_id)
  204. {
  205. struct i2o_controller *c = dev_id;
  206. u32 m;
  207. irqreturn_t rc = IRQ_NONE;
  208. while (readl(c->irq_status) & I2O_IRQ_OUTBOUND_POST) {
  209. m = readl(c->out_port);
  210. if (m == I2O_QUEUE_EMPTY) {
  211. /*
  212. * Old 960 steppings had a bug in the I2O unit that
  213. * caused the queue to appear empty when it wasn't.
  214. */
  215. m = readl(c->out_port);
  216. if (unlikely(m == I2O_QUEUE_EMPTY))
  217. break;
  218. }
  219. /* dispatch it */
  220. if (i2o_driver_dispatch(c, m))
  221. /* flush it if result != 0 */
  222. i2o_flush_reply(c, m);
  223. rc = IRQ_HANDLED;
  224. }
  225. return rc;
  226. }
  227. /**
  228. * i2o_pci_irq_enable - Allocate interrupt for I2O controller
  229. * @c: i2o_controller that the request is for
  230. *
  231. * Allocate an interrupt for the I2O controller, and activate interrupts
  232. * on the I2O controller.
  233. *
  234. * Returns 0 on success or negative error code on failure.
  235. */
  236. static int i2o_pci_irq_enable(struct i2o_controller *c)
  237. {
  238. struct pci_dev *pdev = c->pdev;
  239. int rc;
  240. writel(0xffffffff, c->irq_mask);
  241. if (pdev->irq) {
  242. rc = request_irq(pdev->irq, i2o_pci_interrupt, IRQF_SHARED,
  243. c->name, c);
  244. if (rc < 0) {
  245. printk(KERN_ERR "%s: unable to allocate interrupt %d."
  246. "\n", c->name, pdev->irq);
  247. return rc;
  248. }
  249. }
  250. writel(0x00000000, c->irq_mask);
  251. printk(KERN_INFO "%s: Installed at IRQ %d\n", c->name, pdev->irq);
  252. return 0;
  253. }
  254. /**
  255. * i2o_pci_irq_disable - Free interrupt for I2O controller
  256. * @c: I2O controller
  257. *
  258. * Disable interrupts in I2O controller and then free interrupt.
  259. */
  260. static void i2o_pci_irq_disable(struct i2o_controller *c)
  261. {
  262. writel(0xffffffff, c->irq_mask);
  263. if (c->pdev->irq > 0)
  264. free_irq(c->pdev->irq, c);
  265. }
  266. /**
  267. * i2o_pci_probe - Probe the PCI device for an I2O controller
  268. * @pdev: PCI device to test
  269. * @id: id which matched with the PCI device id table
  270. *
  271. * Probe the PCI device for any device which is a memory of the
  272. * Intelligent, I2O class or an Adaptec Zero Channel Controller. We
  273. * attempt to set up each such device and register it with the core.
  274. *
  275. * Returns 0 on success or negative error code on failure.
  276. */
  277. static int __devinit i2o_pci_probe(struct pci_dev *pdev,
  278. const struct pci_device_id *id)
  279. {
  280. struct i2o_controller *c;
  281. int rc;
  282. struct pci_dev *i960 = NULL;
  283. printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
  284. if ((pdev->class & 0xff) > 1) {
  285. printk(KERN_WARNING "i2o: %s does not support I2O 1.5 "
  286. "(skipping).\n", pci_name(pdev));
  287. return -ENODEV;
  288. }
  289. if ((rc = pci_enable_device(pdev))) {
  290. printk(KERN_WARNING "i2o: couldn't enable device %s\n",
  291. pci_name(pdev));
  292. return rc;
  293. }
  294. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
  295. printk(KERN_WARNING "i2o: no suitable DMA found for %s\n",
  296. pci_name(pdev));
  297. rc = -ENODEV;
  298. goto disable;
  299. }
  300. pci_set_master(pdev);
  301. c = i2o_iop_alloc();
  302. if (IS_ERR(c)) {
  303. printk(KERN_ERR "i2o: couldn't allocate memory for %s\n",
  304. pci_name(pdev));
  305. rc = PTR_ERR(c);
  306. goto disable;
  307. } else
  308. printk(KERN_INFO "%s: controller found (%s)\n", c->name,
  309. pci_name(pdev));
  310. c->pdev = pdev;
  311. c->device.parent = &pdev->dev;
  312. /* Cards that fall apart if you hit them with large I/O loads... */
  313. if (pdev->vendor == PCI_VENDOR_ID_NCR && pdev->device == 0x0630) {
  314. c->short_req = 1;
  315. printk(KERN_INFO "%s: Symbios FC920 workarounds activated.\n",
  316. c->name);
  317. }
  318. if (pdev->subsystem_vendor == PCI_VENDOR_ID_PROMISE) {
  319. /*
  320. * Expose the ship behind i960 for initialization, or it will
  321. * failed
  322. */
  323. i960 = pci_get_slot(c->pdev->bus,
  324. PCI_DEVFN(PCI_SLOT(c->pdev->devfn), 0));
  325. if (i960) {
  326. pci_write_config_word(i960, 0x42, 0);
  327. pci_dev_put(i960);
  328. }
  329. c->promise = 1;
  330. c->limit_sectors = 1;
  331. }
  332. if (pdev->subsystem_vendor == PCI_VENDOR_ID_DPT)
  333. c->adaptec = 1;
  334. /* Cards that go bananas if you quiesce them before you reset them. */
  335. if (pdev->vendor == PCI_VENDOR_ID_DPT) {
  336. c->no_quiesce = 1;
  337. if (pdev->device == 0xa511)
  338. c->raptor = 1;
  339. if (pdev->subsystem_device == 0xc05a) {
  340. c->limit_sectors = 1;
  341. printk(KERN_INFO
  342. "%s: limit sectors per request to %d\n", c->name,
  343. I2O_MAX_SECTORS_LIMITED);
  344. }
  345. #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
  346. if (sizeof(dma_addr_t) > 4) {
  347. if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  348. printk(KERN_INFO "%s: 64-bit DMA unavailable\n",
  349. c->name);
  350. else {
  351. c->pae_support = 1;
  352. printk(KERN_INFO "%s: using 64-bit DMA\n",
  353. c->name);
  354. }
  355. }
  356. #endif
  357. }
  358. if ((rc = i2o_pci_alloc(c))) {
  359. printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
  360. "failed\n", c->name);
  361. goto free_controller;
  362. }
  363. if (i2o_pci_irq_enable(c)) {
  364. printk(KERN_ERR "%s: unable to enable interrupts for I2O "
  365. "controller\n", c->name);
  366. goto free_pci;
  367. }
  368. if ((rc = i2o_iop_add(c)))
  369. goto uninstall;
  370. if (i960)
  371. pci_write_config_word(i960, 0x42, 0x03ff);
  372. return 0;
  373. uninstall:
  374. i2o_pci_irq_disable(c);
  375. free_pci:
  376. i2o_pci_free(c);
  377. free_controller:
  378. i2o_iop_free(c);
  379. disable:
  380. pci_disable_device(pdev);
  381. return rc;
  382. }
  383. /**
  384. * i2o_pci_remove - Removes a I2O controller from the system
  385. * @pdev: I2O controller which should be removed
  386. *
  387. * Reset the I2O controller, disable interrupts and remove all allocated
  388. * resources.
  389. */
  390. static void __devexit i2o_pci_remove(struct pci_dev *pdev)
  391. {
  392. struct i2o_controller *c;
  393. c = pci_get_drvdata(pdev);
  394. i2o_iop_remove(c);
  395. i2o_pci_irq_disable(c);
  396. i2o_pci_free(c);
  397. pci_disable_device(pdev);
  398. printk(KERN_INFO "%s: Controller removed.\n", c->name);
  399. put_device(&c->device);
  400. };
  401. /* PCI driver for I2O controller */
  402. static struct pci_driver i2o_pci_driver = {
  403. .name = "PCI_I2O",
  404. .id_table = i2o_pci_ids,
  405. .probe = i2o_pci_probe,
  406. .remove = __devexit_p(i2o_pci_remove),
  407. };
  408. /**
  409. * i2o_pci_init - registers I2O PCI driver in PCI subsystem
  410. *
  411. * Returns > 0 on success or negative error code on failure.
  412. */
  413. int __init i2o_pci_init(void)
  414. {
  415. return pci_register_driver(&i2o_pci_driver);
  416. };
  417. /**
  418. * i2o_pci_exit - unregisters I2O PCI driver from PCI subsystem
  419. */
  420. void __exit i2o_pci_exit(void)
  421. {
  422. pci_unregister_driver(&i2o_pci_driver);
  423. };
  424. MODULE_DEVICE_TABLE(pci, i2o_pci_ids);