ite-cir.c 46 KB

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  1. /*
  2. * Driver for ITE Tech Inc. IT8712F/IT8512 CIR
  3. *
  4. * Copyright (C) 2010 Juan Jesús García de Soria <skandalfo@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation; either version 2 of the
  9. * License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
  19. * USA.
  20. *
  21. * Inspired by the original lirc_it87 and lirc_ite8709 drivers, on top of the
  22. * skeleton provided by the nuvoton-cir driver.
  23. *
  24. * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues
  25. * <hg_lu@web.de> in 2001, with enhancements by Christoph Bartelmus
  26. * <lirc@bartelmus.de>, Andrew Calkin <r_tay@hotmail.com> and James Edwards
  27. * <jimbo-lirc@edwardsclan.net>.
  28. *
  29. * The lirc_ite8709 driver was written by Grégory Lardière
  30. * <spmf2004-lirc@yahoo.fr> in 2008.
  31. */
  32. #include <linux/kernel.h>
  33. #include <linux/module.h>
  34. #include <linux/pnp.h>
  35. #include <linux/io.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/sched.h>
  38. #include <linux/delay.h>
  39. #include <linux/slab.h>
  40. #include <linux/input.h>
  41. #include <linux/bitops.h>
  42. #include <media/rc-core.h>
  43. #include <linux/pci_ids.h>
  44. #include <linux/delay.h>
  45. #include "ite-cir.h"
  46. /* module parameters */
  47. /* debug level */
  48. static int debug;
  49. module_param(debug, int, S_IRUGO | S_IWUSR);
  50. MODULE_PARM_DESC(debug, "Enable debugging output");
  51. /* low limit for RX carrier freq, Hz, 0 for no RX demodulation */
  52. static int rx_low_carrier_freq;
  53. module_param(rx_low_carrier_freq, int, S_IRUGO | S_IWUSR);
  54. MODULE_PARM_DESC(rx_low_carrier_freq, "Override low RX carrier frequency, Hz, "
  55. "0 for no RX demodulation");
  56. /* high limit for RX carrier freq, Hz, 0 for no RX demodulation */
  57. static int rx_high_carrier_freq;
  58. module_param(rx_high_carrier_freq, int, S_IRUGO | S_IWUSR);
  59. MODULE_PARM_DESC(rx_high_carrier_freq, "Override high RX carrier frequency, "
  60. "Hz, 0 for no RX demodulation");
  61. /* override tx carrier frequency */
  62. static int tx_carrier_freq;
  63. module_param(tx_carrier_freq, int, S_IRUGO | S_IWUSR);
  64. MODULE_PARM_DESC(tx_carrier_freq, "Override TX carrier frequency, Hz");
  65. /* override tx duty cycle */
  66. static int tx_duty_cycle;
  67. module_param(tx_duty_cycle, int, S_IRUGO | S_IWUSR);
  68. MODULE_PARM_DESC(tx_duty_cycle, "Override TX duty cycle, 1-100");
  69. /* override default sample period */
  70. static long sample_period;
  71. module_param(sample_period, long, S_IRUGO | S_IWUSR);
  72. MODULE_PARM_DESC(sample_period, "Override carrier sample period, us");
  73. /* override detected model id */
  74. static int model_number = -1;
  75. module_param(model_number, int, S_IRUGO | S_IWUSR);
  76. MODULE_PARM_DESC(model_number, "Use this model number, don't autodetect");
  77. /* HW-independent code functions */
  78. /* check whether carrier frequency is high frequency */
  79. static inline bool ite_is_high_carrier_freq(unsigned int freq)
  80. {
  81. return freq >= ITE_HCF_MIN_CARRIER_FREQ;
  82. }
  83. /* get the bits required to program the carrier frequency in CFQ bits,
  84. * unshifted */
  85. static u8 ite_get_carrier_freq_bits(unsigned int freq)
  86. {
  87. if (ite_is_high_carrier_freq(freq)) {
  88. if (freq < 425000)
  89. return ITE_CFQ_400;
  90. else if (freq < 465000)
  91. return ITE_CFQ_450;
  92. else if (freq < 490000)
  93. return ITE_CFQ_480;
  94. else
  95. return ITE_CFQ_500;
  96. } else {
  97. /* trim to limits */
  98. if (freq < ITE_LCF_MIN_CARRIER_FREQ)
  99. freq = ITE_LCF_MIN_CARRIER_FREQ;
  100. if (freq > ITE_LCF_MAX_CARRIER_FREQ)
  101. freq = ITE_LCF_MAX_CARRIER_FREQ;
  102. /* convert to kHz and subtract the base freq */
  103. freq =
  104. DIV_ROUND_CLOSEST(freq - ITE_LCF_MIN_CARRIER_FREQ,
  105. 1000);
  106. return (u8) freq;
  107. }
  108. }
  109. /* get the bits required to program the pulse with in TXMPW */
  110. static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle)
  111. {
  112. unsigned long period_ns, on_ns;
  113. /* sanitize freq into range */
  114. if (freq < ITE_LCF_MIN_CARRIER_FREQ)
  115. freq = ITE_LCF_MIN_CARRIER_FREQ;
  116. if (freq > ITE_HCF_MAX_CARRIER_FREQ)
  117. freq = ITE_HCF_MAX_CARRIER_FREQ;
  118. period_ns = 1000000000UL / freq;
  119. on_ns = period_ns * duty_cycle / 100;
  120. if (ite_is_high_carrier_freq(freq)) {
  121. if (on_ns < 750)
  122. return ITE_TXMPW_A;
  123. else if (on_ns < 850)
  124. return ITE_TXMPW_B;
  125. else if (on_ns < 950)
  126. return ITE_TXMPW_C;
  127. else if (on_ns < 1080)
  128. return ITE_TXMPW_D;
  129. else
  130. return ITE_TXMPW_E;
  131. } else {
  132. if (on_ns < 6500)
  133. return ITE_TXMPW_A;
  134. else if (on_ns < 7850)
  135. return ITE_TXMPW_B;
  136. else if (on_ns < 9650)
  137. return ITE_TXMPW_C;
  138. else if (on_ns < 11950)
  139. return ITE_TXMPW_D;
  140. else
  141. return ITE_TXMPW_E;
  142. }
  143. }
  144. /* decode raw bytes as received by the hardware, and push them to the ir-core
  145. * layer */
  146. static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int
  147. length)
  148. {
  149. u32 sample_period;
  150. unsigned long *ldata;
  151. unsigned int next_one, next_zero, size;
  152. DEFINE_IR_RAW_EVENT(ev);
  153. if (length == 0)
  154. return;
  155. sample_period = dev->params.sample_period;
  156. ldata = (unsigned long *)data;
  157. size = length << 3;
  158. next_one = find_next_bit_le(ldata, size, 0);
  159. if (next_one > 0) {
  160. ev.pulse = true;
  161. ev.duration =
  162. ITE_BITS_TO_NS(next_one, sample_period);
  163. ir_raw_event_store_with_filter(dev->rdev, &ev);
  164. }
  165. while (next_one < size) {
  166. next_zero = find_next_zero_bit_le(ldata, size, next_one + 1);
  167. ev.pulse = false;
  168. ev.duration = ITE_BITS_TO_NS(next_zero - next_one, sample_period);
  169. ir_raw_event_store_with_filter(dev->rdev, &ev);
  170. if (next_zero < size) {
  171. next_one =
  172. find_next_bit_le(ldata,
  173. size,
  174. next_zero + 1);
  175. ev.pulse = true;
  176. ev.duration =
  177. ITE_BITS_TO_NS(next_one - next_zero,
  178. sample_period);
  179. ir_raw_event_store_with_filter
  180. (dev->rdev, &ev);
  181. } else
  182. next_one = size;
  183. }
  184. ir_raw_event_handle(dev->rdev);
  185. ite_dbg_verbose("decoded %d bytes.", length);
  186. }
  187. /* set all the rx/tx carrier parameters; this must be called with the device
  188. * spinlock held */
  189. static void ite_set_carrier_params(struct ite_dev *dev)
  190. {
  191. unsigned int freq, low_freq, high_freq;
  192. int allowance;
  193. bool use_demodulator;
  194. bool for_tx = dev->transmitting;
  195. ite_dbg("%s called", __func__);
  196. if (for_tx) {
  197. /* we don't need no stinking calculations */
  198. freq = dev->params.tx_carrier_freq;
  199. allowance = ITE_RXDCR_DEFAULT;
  200. use_demodulator = false;
  201. } else {
  202. low_freq = dev->params.rx_low_carrier_freq;
  203. high_freq = dev->params.rx_high_carrier_freq;
  204. if (low_freq == 0) {
  205. /* don't demodulate */
  206. freq =
  207. ITE_DEFAULT_CARRIER_FREQ;
  208. allowance = ITE_RXDCR_DEFAULT;
  209. use_demodulator = false;
  210. } else {
  211. /* calculate the middle freq */
  212. freq = (low_freq + high_freq) / 2;
  213. /* calculate the allowance */
  214. allowance =
  215. DIV_ROUND_CLOSEST(10000 * (high_freq - low_freq),
  216. ITE_RXDCR_PER_10000_STEP
  217. * (high_freq + low_freq));
  218. if (allowance < 1)
  219. allowance = 1;
  220. if (allowance > ITE_RXDCR_MAX)
  221. allowance = ITE_RXDCR_MAX;
  222. }
  223. }
  224. /* set the carrier parameters in a device-dependent way */
  225. dev->params.set_carrier_params(dev, ite_is_high_carrier_freq(freq),
  226. use_demodulator, ite_get_carrier_freq_bits(freq), allowance,
  227. ite_get_pulse_width_bits(freq, dev->params.tx_duty_cycle));
  228. }
  229. /* interrupt service routine for incoming and outgoing CIR data */
  230. static irqreturn_t ite_cir_isr(int irq, void *data)
  231. {
  232. struct ite_dev *dev = data;
  233. unsigned long flags;
  234. irqreturn_t ret = IRQ_RETVAL(IRQ_NONE);
  235. u8 rx_buf[ITE_RX_FIFO_LEN];
  236. int rx_bytes;
  237. int iflags;
  238. ite_dbg_verbose("%s firing", __func__);
  239. /* grab the spinlock */
  240. spin_lock_irqsave(&dev->lock, flags);
  241. /* read the interrupt flags */
  242. iflags = dev->params.get_irq_causes(dev);
  243. /* check for the receive interrupt */
  244. if (iflags & (ITE_IRQ_RX_FIFO | ITE_IRQ_RX_FIFO_OVERRUN)) {
  245. /* read the FIFO bytes */
  246. rx_bytes =
  247. dev->params.get_rx_bytes(dev, rx_buf,
  248. ITE_RX_FIFO_LEN);
  249. if (rx_bytes > 0) {
  250. /* drop the spinlock, since the ir-core layer
  251. * may call us back again through
  252. * ite_s_idle() */
  253. spin_unlock_irqrestore(&dev->
  254. lock,
  255. flags);
  256. /* decode the data we've just received */
  257. ite_decode_bytes(dev, rx_buf,
  258. rx_bytes);
  259. /* reacquire the spinlock */
  260. spin_lock_irqsave(&dev->lock,
  261. flags);
  262. /* mark the interrupt as serviced */
  263. ret = IRQ_RETVAL(IRQ_HANDLED);
  264. }
  265. } else if (iflags & ITE_IRQ_TX_FIFO) {
  266. /* FIFO space available interrupt */
  267. ite_dbg_verbose("got interrupt for TX FIFO");
  268. /* wake any sleeping transmitter */
  269. wake_up_interruptible(&dev->tx_queue);
  270. /* mark the interrupt as serviced */
  271. ret = IRQ_RETVAL(IRQ_HANDLED);
  272. }
  273. /* drop the spinlock */
  274. spin_unlock_irqrestore(&dev->lock, flags);
  275. ite_dbg_verbose("%s done returning %d", __func__, (int)ret);
  276. return ret;
  277. }
  278. /* set the rx carrier freq range, guess it's in Hz... */
  279. static int ite_set_rx_carrier_range(struct rc_dev *rcdev, u32 carrier_low, u32
  280. carrier_high)
  281. {
  282. unsigned long flags;
  283. struct ite_dev *dev = rcdev->priv;
  284. spin_lock_irqsave(&dev->lock, flags);
  285. dev->params.rx_low_carrier_freq = carrier_low;
  286. dev->params.rx_high_carrier_freq = carrier_high;
  287. ite_set_carrier_params(dev);
  288. spin_unlock_irqrestore(&dev->lock, flags);
  289. return 0;
  290. }
  291. /* set the tx carrier freq, guess it's in Hz... */
  292. static int ite_set_tx_carrier(struct rc_dev *rcdev, u32 carrier)
  293. {
  294. unsigned long flags;
  295. struct ite_dev *dev = rcdev->priv;
  296. spin_lock_irqsave(&dev->lock, flags);
  297. dev->params.tx_carrier_freq = carrier;
  298. ite_set_carrier_params(dev);
  299. spin_unlock_irqrestore(&dev->lock, flags);
  300. return 0;
  301. }
  302. /* set the tx duty cycle by controlling the pulse width */
  303. static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle)
  304. {
  305. unsigned long flags;
  306. struct ite_dev *dev = rcdev->priv;
  307. spin_lock_irqsave(&dev->lock, flags);
  308. dev->params.tx_duty_cycle = duty_cycle;
  309. ite_set_carrier_params(dev);
  310. spin_unlock_irqrestore(&dev->lock, flags);
  311. return 0;
  312. }
  313. /* transmit out IR pulses; what you get here is a batch of alternating
  314. * pulse/space/pulse/space lengths that we should write out completely through
  315. * the FIFO, blocking on a full FIFO */
  316. static int ite_tx_ir(struct rc_dev *rcdev, int *txbuf, u32 n)
  317. {
  318. unsigned long flags;
  319. struct ite_dev *dev = rcdev->priv;
  320. bool is_pulse = false;
  321. int remaining_us, fifo_avail, fifo_remaining, last_idx = 0;
  322. int max_rle_us, next_rle_us;
  323. int ret = n;
  324. u8 last_sent[ITE_TX_FIFO_LEN];
  325. u8 val;
  326. ite_dbg("%s called", __func__);
  327. /* clear the array just in case */
  328. memset(last_sent, 0, ARRAY_SIZE(last_sent));
  329. /* n comes in bytes; convert to ints */
  330. n /= sizeof(int);
  331. spin_lock_irqsave(&dev->lock, flags);
  332. /* let everybody know we're now transmitting */
  333. dev->transmitting = true;
  334. /* and set the carrier values for transmission */
  335. ite_set_carrier_params(dev);
  336. /* calculate how much time we can send in one byte */
  337. max_rle_us =
  338. (ITE_BAUDRATE_DIVISOR * dev->params.sample_period *
  339. ITE_TX_MAX_RLE) / 1000;
  340. /* disable the receiver */
  341. dev->params.disable_rx(dev);
  342. /* this is where we'll begin filling in the FIFO, until it's full.
  343. * then we'll just activate the interrupt, wait for it to wake us up
  344. * again, disable it, continue filling the FIFO... until everything
  345. * has been pushed out */
  346. fifo_avail =
  347. ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
  348. while (n > 0 && dev->in_use) {
  349. /* transmit the next sample */
  350. is_pulse = !is_pulse;
  351. remaining_us = *(txbuf++);
  352. n--;
  353. ite_dbg("%s: %ld",
  354. ((is_pulse) ? "pulse" : "space"),
  355. (long int)
  356. remaining_us);
  357. /* repeat while the pulse is non-zero length */
  358. while (remaining_us > 0 && dev->in_use) {
  359. if (remaining_us > max_rle_us)
  360. next_rle_us = max_rle_us;
  361. else
  362. next_rle_us = remaining_us;
  363. remaining_us -= next_rle_us;
  364. /* check what's the length we have to pump out */
  365. val = (ITE_TX_MAX_RLE * next_rle_us) / max_rle_us;
  366. /* put it into the sent buffer */
  367. last_sent[last_idx++] = val;
  368. last_idx &= (ITE_TX_FIFO_LEN);
  369. /* encode it for 7 bits */
  370. val = (val - 1) & ITE_TX_RLE_MASK;
  371. /* take into account pulse/space prefix */
  372. if (is_pulse)
  373. val |= ITE_TX_PULSE;
  374. else
  375. val |= ITE_TX_SPACE;
  376. /*
  377. * if we get to 0 available, read again, just in case
  378. * some other slot got freed
  379. */
  380. if (fifo_avail <= 0)
  381. fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
  382. /* if it's still full */
  383. if (fifo_avail <= 0) {
  384. /* enable the tx interrupt */
  385. dev->params.
  386. enable_tx_interrupt(dev);
  387. /* drop the spinlock */
  388. spin_unlock_irqrestore(&dev->lock, flags);
  389. /* wait for the FIFO to empty enough */
  390. wait_event_interruptible(dev->tx_queue, (fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev)) >= 8);
  391. /* get the spinlock again */
  392. spin_lock_irqsave(&dev->lock, flags);
  393. /* disable the tx interrupt again. */
  394. dev->params.
  395. disable_tx_interrupt(dev);
  396. }
  397. /* now send the byte through the FIFO */
  398. dev->params.put_tx_byte(dev, val);
  399. fifo_avail--;
  400. }
  401. }
  402. /* wait and don't return until the whole FIFO has been sent out;
  403. * otherwise we could configure the RX carrier params instead of the
  404. * TX ones while the transmission is still being performed! */
  405. fifo_remaining = dev->params.get_tx_used_slots(dev);
  406. remaining_us = 0;
  407. while (fifo_remaining > 0) {
  408. fifo_remaining--;
  409. last_idx--;
  410. last_idx &= (ITE_TX_FIFO_LEN - 1);
  411. remaining_us += last_sent[last_idx];
  412. }
  413. remaining_us = (remaining_us * max_rle_us) / (ITE_TX_MAX_RLE);
  414. /* drop the spinlock while we sleep */
  415. spin_unlock_irqrestore(&dev->lock, flags);
  416. /* sleep remaining_us microseconds */
  417. mdelay(DIV_ROUND_UP(remaining_us, 1000));
  418. /* reacquire the spinlock */
  419. spin_lock_irqsave(&dev->lock, flags);
  420. /* now we're not transmitting anymore */
  421. dev->transmitting = false;
  422. /* and set the carrier values for reception */
  423. ite_set_carrier_params(dev);
  424. /* reenable the receiver */
  425. if (dev->in_use)
  426. dev->params.enable_rx(dev);
  427. /* notify transmission end */
  428. wake_up_interruptible(&dev->tx_ended);
  429. spin_unlock_irqrestore(&dev->lock, flags);
  430. return ret;
  431. }
  432. /* idle the receiver if needed */
  433. static void ite_s_idle(struct rc_dev *rcdev, bool enable)
  434. {
  435. unsigned long flags;
  436. struct ite_dev *dev = rcdev->priv;
  437. ite_dbg("%s called", __func__);
  438. if (enable) {
  439. spin_lock_irqsave(&dev->lock, flags);
  440. dev->params.idle_rx(dev);
  441. spin_unlock_irqrestore(&dev->lock, flags);
  442. }
  443. }
  444. /* IT8712F HW-specific functions */
  445. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  446. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  447. * */
  448. static int it87_get_irq_causes(struct ite_dev *dev)
  449. {
  450. u8 iflags;
  451. int ret = 0;
  452. ite_dbg("%s called", __func__);
  453. /* read the interrupt flags */
  454. iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II;
  455. switch (iflags) {
  456. case IT87_II_RXDS:
  457. ret = ITE_IRQ_RX_FIFO;
  458. break;
  459. case IT87_II_RXFO:
  460. ret = ITE_IRQ_RX_FIFO_OVERRUN;
  461. break;
  462. case IT87_II_TXLDL:
  463. ret = ITE_IRQ_TX_FIFO;
  464. break;
  465. }
  466. return ret;
  467. }
  468. /* set the carrier parameters; to be called with the spinlock held */
  469. static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq,
  470. bool use_demodulator,
  471. u8 carrier_freq_bits, u8 allowance_bits,
  472. u8 pulse_width_bits)
  473. {
  474. u8 val;
  475. ite_dbg("%s called", __func__);
  476. /* program the RCR register */
  477. val = inb(dev->cir_addr + IT87_RCR)
  478. & ~(IT87_HCFS | IT87_RXEND | IT87_RXDCR);
  479. if (high_freq)
  480. val |= IT87_HCFS;
  481. if (use_demodulator)
  482. val |= IT87_RXEND;
  483. val |= allowance_bits;
  484. outb(val, dev->cir_addr + IT87_RCR);
  485. /* program the TCR2 register */
  486. outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits,
  487. dev->cir_addr + IT87_TCR2);
  488. }
  489. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  490. * held */
  491. static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  492. {
  493. int fifo, read = 0;
  494. ite_dbg("%s called", __func__);
  495. /* read how many bytes are still in the FIFO */
  496. fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC;
  497. while (fifo > 0 && buf_size > 0) {
  498. *(buf++) = inb(dev->cir_addr + IT87_DR);
  499. fifo--;
  500. read++;
  501. buf_size--;
  502. }
  503. return read;
  504. }
  505. /* return how many bytes are still in the FIFO; this will be called
  506. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  507. * empty; let's expect this won't be a problem */
  508. static int it87_get_tx_used_slots(struct ite_dev *dev)
  509. {
  510. ite_dbg("%s called", __func__);
  511. return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC;
  512. }
  513. /* put a byte to the TX fifo; this should be called with the spinlock held */
  514. static void it87_put_tx_byte(struct ite_dev *dev, u8 value)
  515. {
  516. outb(value, dev->cir_addr + IT87_DR);
  517. }
  518. /* idle the receiver so that we won't receive samples until another
  519. pulse is detected; this must be called with the device spinlock held */
  520. static void it87_idle_rx(struct ite_dev *dev)
  521. {
  522. ite_dbg("%s called", __func__);
  523. /* disable streaming by clearing RXACT writing it as 1 */
  524. outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT,
  525. dev->cir_addr + IT87_RCR);
  526. /* clear the FIFO */
  527. outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR,
  528. dev->cir_addr + IT87_TCR1);
  529. }
  530. /* disable the receiver; this must be called with the device spinlock held */
  531. static void it87_disable_rx(struct ite_dev *dev)
  532. {
  533. ite_dbg("%s called", __func__);
  534. /* disable the receiver interrupts */
  535. outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE),
  536. dev->cir_addr + IT87_IER);
  537. /* disable the receiver */
  538. outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN,
  539. dev->cir_addr + IT87_RCR);
  540. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  541. * in the previous outb() call) */
  542. it87_idle_rx(dev);
  543. }
  544. /* enable the receiver; this must be called with the device spinlock held */
  545. static void it87_enable_rx(struct ite_dev *dev)
  546. {
  547. ite_dbg("%s called", __func__);
  548. /* enable the receiver by setting RXEN */
  549. outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN,
  550. dev->cir_addr + IT87_RCR);
  551. /* just prepare it to idle for the next reception */
  552. it87_idle_rx(dev);
  553. /* enable the receiver interrupts and master enable flag */
  554. outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC,
  555. dev->cir_addr + IT87_IER);
  556. }
  557. /* disable the transmitter interrupt; this must be called with the device
  558. * spinlock held */
  559. static void it87_disable_tx_interrupt(struct ite_dev *dev)
  560. {
  561. ite_dbg("%s called", __func__);
  562. /* disable the transmitter interrupts */
  563. outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE,
  564. dev->cir_addr + IT87_IER);
  565. }
  566. /* enable the transmitter interrupt; this must be called with the device
  567. * spinlock held */
  568. static void it87_enable_tx_interrupt(struct ite_dev *dev)
  569. {
  570. ite_dbg("%s called", __func__);
  571. /* enable the transmitter interrupts and master enable flag */
  572. outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC,
  573. dev->cir_addr + IT87_IER);
  574. }
  575. /* disable the device; this must be called with the device spinlock held */
  576. static void it87_disable(struct ite_dev *dev)
  577. {
  578. ite_dbg("%s called", __func__);
  579. /* clear out all interrupt enable flags */
  580. outb(inb(dev->cir_addr + IT87_IER) &
  581. ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE),
  582. dev->cir_addr + IT87_IER);
  583. /* disable the receiver */
  584. it87_disable_rx(dev);
  585. /* erase the FIFO */
  586. outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1),
  587. dev->cir_addr + IT87_TCR1);
  588. }
  589. /* initialize the hardware */
  590. static void it87_init_hardware(struct ite_dev *dev)
  591. {
  592. ite_dbg("%s called", __func__);
  593. /* enable just the baud rate divisor register,
  594. disabling all the interrupts at the same time */
  595. outb((inb(dev->cir_addr + IT87_IER) &
  596. ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE)) | IT87_BR,
  597. dev->cir_addr + IT87_IER);
  598. /* write out the baud rate divisor */
  599. outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR);
  600. outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR);
  601. /* disable the baud rate divisor register again */
  602. outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR,
  603. dev->cir_addr + IT87_IER);
  604. /* program the RCR register defaults */
  605. outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR);
  606. /* program the TCR1 register */
  607. outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE
  608. | IT87_FIFOTL_DEFAULT | IT87_FIFOCLR,
  609. dev->cir_addr + IT87_TCR1);
  610. /* program the carrier parameters */
  611. ite_set_carrier_params(dev);
  612. }
  613. /* IT8512F on ITE8708 HW-specific functions */
  614. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  615. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  616. * */
  617. static int it8708_get_irq_causes(struct ite_dev *dev)
  618. {
  619. u8 iflags;
  620. int ret = 0;
  621. ite_dbg("%s called", __func__);
  622. /* read the interrupt flags */
  623. iflags = inb(dev->cir_addr + IT8708_C0IIR);
  624. if (iflags & IT85_TLDLI)
  625. ret |= ITE_IRQ_TX_FIFO;
  626. if (iflags & IT85_RDAI)
  627. ret |= ITE_IRQ_RX_FIFO;
  628. if (iflags & IT85_RFOI)
  629. ret |= ITE_IRQ_RX_FIFO_OVERRUN;
  630. return ret;
  631. }
  632. /* set the carrier parameters; to be called with the spinlock held */
  633. static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq,
  634. bool use_demodulator,
  635. u8 carrier_freq_bits, u8 allowance_bits,
  636. u8 pulse_width_bits)
  637. {
  638. u8 val;
  639. ite_dbg("%s called", __func__);
  640. /* program the C0CFR register, with HRAE=1 */
  641. outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
  642. dev->cir_addr + IT8708_BANKSEL);
  643. val = (inb(dev->cir_addr + IT8708_C0CFR)
  644. & ~(IT85_HCFS | IT85_CFQ)) | carrier_freq_bits;
  645. if (high_freq)
  646. val |= IT85_HCFS;
  647. outb(val, dev->cir_addr + IT8708_C0CFR);
  648. outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
  649. dev->cir_addr + IT8708_BANKSEL);
  650. /* program the C0RCR register */
  651. val = inb(dev->cir_addr + IT8708_C0RCR)
  652. & ~(IT85_RXEND | IT85_RXDCR);
  653. if (use_demodulator)
  654. val |= IT85_RXEND;
  655. val |= allowance_bits;
  656. outb(val, dev->cir_addr + IT8708_C0RCR);
  657. /* program the C0TCR register */
  658. val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW;
  659. val |= pulse_width_bits;
  660. outb(val, dev->cir_addr + IT8708_C0TCR);
  661. }
  662. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  663. * held */
  664. static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  665. {
  666. int fifo, read = 0;
  667. ite_dbg("%s called", __func__);
  668. /* read how many bytes are still in the FIFO */
  669. fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC;
  670. while (fifo > 0 && buf_size > 0) {
  671. *(buf++) = inb(dev->cir_addr + IT8708_C0DR);
  672. fifo--;
  673. read++;
  674. buf_size--;
  675. }
  676. return read;
  677. }
  678. /* return how many bytes are still in the FIFO; this will be called
  679. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  680. * empty; let's expect this won't be a problem */
  681. static int it8708_get_tx_used_slots(struct ite_dev *dev)
  682. {
  683. ite_dbg("%s called", __func__);
  684. return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC;
  685. }
  686. /* put a byte to the TX fifo; this should be called with the spinlock held */
  687. static void it8708_put_tx_byte(struct ite_dev *dev, u8 value)
  688. {
  689. outb(value, dev->cir_addr + IT8708_C0DR);
  690. }
  691. /* idle the receiver so that we won't receive samples until another
  692. pulse is detected; this must be called with the device spinlock held */
  693. static void it8708_idle_rx(struct ite_dev *dev)
  694. {
  695. ite_dbg("%s called", __func__);
  696. /* disable streaming by clearing RXACT writing it as 1 */
  697. outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT,
  698. dev->cir_addr + IT8708_C0RCR);
  699. /* clear the FIFO */
  700. outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR,
  701. dev->cir_addr + IT8708_C0MSTCR);
  702. }
  703. /* disable the receiver; this must be called with the device spinlock held */
  704. static void it8708_disable_rx(struct ite_dev *dev)
  705. {
  706. ite_dbg("%s called", __func__);
  707. /* disable the receiver interrupts */
  708. outb(inb(dev->cir_addr + IT8708_C0IER) &
  709. ~(IT85_RDAIE | IT85_RFOIE),
  710. dev->cir_addr + IT8708_C0IER);
  711. /* disable the receiver */
  712. outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN,
  713. dev->cir_addr + IT8708_C0RCR);
  714. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  715. * in the previous outb() call) */
  716. it8708_idle_rx(dev);
  717. }
  718. /* enable the receiver; this must be called with the device spinlock held */
  719. static void it8708_enable_rx(struct ite_dev *dev)
  720. {
  721. ite_dbg("%s called", __func__);
  722. /* enable the receiver by setting RXEN */
  723. outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN,
  724. dev->cir_addr + IT8708_C0RCR);
  725. /* just prepare it to idle for the next reception */
  726. it8708_idle_rx(dev);
  727. /* enable the receiver interrupts and master enable flag */
  728. outb(inb(dev->cir_addr + IT8708_C0IER)
  729. |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
  730. dev->cir_addr + IT8708_C0IER);
  731. }
  732. /* disable the transmitter interrupt; this must be called with the device
  733. * spinlock held */
  734. static void it8708_disable_tx_interrupt(struct ite_dev *dev)
  735. {
  736. ite_dbg("%s called", __func__);
  737. /* disable the transmitter interrupts */
  738. outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE,
  739. dev->cir_addr + IT8708_C0IER);
  740. }
  741. /* enable the transmitter interrupt; this must be called with the device
  742. * spinlock held */
  743. static void it8708_enable_tx_interrupt(struct ite_dev *dev)
  744. {
  745. ite_dbg("%s called", __func__);
  746. /* enable the transmitter interrupts and master enable flag */
  747. outb(inb(dev->cir_addr + IT8708_C0IER)
  748. |IT85_TLDLIE | IT85_IEC,
  749. dev->cir_addr + IT8708_C0IER);
  750. }
  751. /* disable the device; this must be called with the device spinlock held */
  752. static void it8708_disable(struct ite_dev *dev)
  753. {
  754. ite_dbg("%s called", __func__);
  755. /* clear out all interrupt enable flags */
  756. outb(inb(dev->cir_addr + IT8708_C0IER) &
  757. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  758. dev->cir_addr + IT8708_C0IER);
  759. /* disable the receiver */
  760. it8708_disable_rx(dev);
  761. /* erase the FIFO */
  762. outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR),
  763. dev->cir_addr + IT8708_C0MSTCR);
  764. }
  765. /* initialize the hardware */
  766. static void it8708_init_hardware(struct ite_dev *dev)
  767. {
  768. ite_dbg("%s called", __func__);
  769. /* disable all the interrupts */
  770. outb(inb(dev->cir_addr + IT8708_C0IER) &
  771. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  772. dev->cir_addr + IT8708_C0IER);
  773. /* program the baud rate divisor */
  774. outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
  775. dev->cir_addr + IT8708_BANKSEL);
  776. outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR);
  777. outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
  778. dev->cir_addr + IT8708_C0BDHR);
  779. outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
  780. dev->cir_addr + IT8708_BANKSEL);
  781. /* program the C0MSTCR register defaults */
  782. outb((inb(dev->cir_addr + IT8708_C0MSTCR) &
  783. ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL |
  784. IT85_FIFOCLR | IT85_RESET)) |
  785. IT85_FIFOTL_DEFAULT,
  786. dev->cir_addr + IT8708_C0MSTCR);
  787. /* program the C0RCR register defaults */
  788. outb((inb(dev->cir_addr + IT8708_C0RCR) &
  789. ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND |
  790. IT85_RXACT | IT85_RXDCR)) |
  791. ITE_RXDCR_DEFAULT,
  792. dev->cir_addr + IT8708_C0RCR);
  793. /* program the C0TCR register defaults */
  794. outb((inb(dev->cir_addr + IT8708_C0TCR) &
  795. ~(IT85_TXMPM | IT85_TXMPW))
  796. |IT85_TXRLE | IT85_TXENDF |
  797. IT85_TXMPM_DEFAULT | IT85_TXMPW_DEFAULT,
  798. dev->cir_addr + IT8708_C0TCR);
  799. /* program the carrier parameters */
  800. ite_set_carrier_params(dev);
  801. }
  802. /* IT8512F on ITE8709 HW-specific functions */
  803. /* read a byte from the SRAM module */
  804. static inline u8 it8709_rm(struct ite_dev *dev, int index)
  805. {
  806. outb(index, dev->cir_addr + IT8709_RAM_IDX);
  807. return inb(dev->cir_addr + IT8709_RAM_VAL);
  808. }
  809. /* write a byte to the SRAM module */
  810. static inline void it8709_wm(struct ite_dev *dev, u8 val, int index)
  811. {
  812. outb(index, dev->cir_addr + IT8709_RAM_IDX);
  813. outb(val, dev->cir_addr + IT8709_RAM_VAL);
  814. }
  815. static void it8709_wait(struct ite_dev *dev)
  816. {
  817. int i = 0;
  818. /*
  819. * loop until device tells it's ready to continue
  820. * iterations count is usually ~750 but can sometimes achieve 13000
  821. */
  822. for (i = 0; i < 15000; i++) {
  823. udelay(2);
  824. if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE)
  825. break;
  826. }
  827. }
  828. /* read the value of a CIR register */
  829. static u8 it8709_rr(struct ite_dev *dev, int index)
  830. {
  831. /* just wait in case the previous access was a write */
  832. it8709_wait(dev);
  833. it8709_wm(dev, index, IT8709_REG_IDX);
  834. it8709_wm(dev, IT8709_READ, IT8709_MODE);
  835. /* wait for the read data to be available */
  836. it8709_wait(dev);
  837. /* return the read value */
  838. return it8709_rm(dev, IT8709_REG_VAL);
  839. }
  840. /* write the value of a CIR register */
  841. static void it8709_wr(struct ite_dev *dev, u8 val, int index)
  842. {
  843. /* we wait before writing, and not afterwards, since this allows us to
  844. * pipeline the host CPU with the microcontroller */
  845. it8709_wait(dev);
  846. it8709_wm(dev, val, IT8709_REG_VAL);
  847. it8709_wm(dev, index, IT8709_REG_IDX);
  848. it8709_wm(dev, IT8709_WRITE, IT8709_MODE);
  849. }
  850. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  851. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  852. * */
  853. static int it8709_get_irq_causes(struct ite_dev *dev)
  854. {
  855. u8 iflags;
  856. int ret = 0;
  857. ite_dbg("%s called", __func__);
  858. /* read the interrupt flags */
  859. iflags = it8709_rm(dev, IT8709_IIR);
  860. if (iflags & IT85_TLDLI)
  861. ret |= ITE_IRQ_TX_FIFO;
  862. if (iflags & IT85_RDAI)
  863. ret |= ITE_IRQ_RX_FIFO;
  864. if (iflags & IT85_RFOI)
  865. ret |= ITE_IRQ_RX_FIFO_OVERRUN;
  866. return ret;
  867. }
  868. /* set the carrier parameters; to be called with the spinlock held */
  869. static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq,
  870. bool use_demodulator,
  871. u8 carrier_freq_bits, u8 allowance_bits,
  872. u8 pulse_width_bits)
  873. {
  874. u8 val;
  875. ite_dbg("%s called", __func__);
  876. val = (it8709_rr(dev, IT85_C0CFR)
  877. &~(IT85_HCFS | IT85_CFQ)) |
  878. carrier_freq_bits;
  879. if (high_freq)
  880. val |= IT85_HCFS;
  881. it8709_wr(dev, val, IT85_C0CFR);
  882. /* program the C0RCR register */
  883. val = it8709_rr(dev, IT85_C0RCR)
  884. & ~(IT85_RXEND | IT85_RXDCR);
  885. if (use_demodulator)
  886. val |= IT85_RXEND;
  887. val |= allowance_bits;
  888. it8709_wr(dev, val, IT85_C0RCR);
  889. /* program the C0TCR register */
  890. val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW;
  891. val |= pulse_width_bits;
  892. it8709_wr(dev, val, IT85_C0TCR);
  893. }
  894. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  895. * held */
  896. static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  897. {
  898. int fifo, read = 0;
  899. ite_dbg("%s called", __func__);
  900. /* read how many bytes are still in the FIFO */
  901. fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC;
  902. while (fifo > 0 && buf_size > 0) {
  903. *(buf++) = it8709_rm(dev, IT8709_FIFO + read);
  904. fifo--;
  905. read++;
  906. buf_size--;
  907. }
  908. /* 'clear' the FIFO by setting the writing index to 0; this is
  909. * completely bound to be racy, but we can't help it, since it's a
  910. * limitation of the protocol */
  911. it8709_wm(dev, 0, IT8709_RFSR);
  912. return read;
  913. }
  914. /* return how many bytes are still in the FIFO; this will be called
  915. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  916. * empty; let's expect this won't be a problem */
  917. static int it8709_get_tx_used_slots(struct ite_dev *dev)
  918. {
  919. ite_dbg("%s called", __func__);
  920. return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC;
  921. }
  922. /* put a byte to the TX fifo; this should be called with the spinlock held */
  923. static void it8709_put_tx_byte(struct ite_dev *dev, u8 value)
  924. {
  925. it8709_wr(dev, value, IT85_C0DR);
  926. }
  927. /* idle the receiver so that we won't receive samples until another
  928. pulse is detected; this must be called with the device spinlock held */
  929. static void it8709_idle_rx(struct ite_dev *dev)
  930. {
  931. ite_dbg("%s called", __func__);
  932. /* disable streaming by clearing RXACT writing it as 1 */
  933. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT,
  934. IT85_C0RCR);
  935. /* clear the FIFO */
  936. it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR,
  937. IT85_C0MSTCR);
  938. }
  939. /* disable the receiver; this must be called with the device spinlock held */
  940. static void it8709_disable_rx(struct ite_dev *dev)
  941. {
  942. ite_dbg("%s called", __func__);
  943. /* disable the receiver interrupts */
  944. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  945. ~(IT85_RDAIE | IT85_RFOIE),
  946. IT85_C0IER);
  947. /* disable the receiver */
  948. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN,
  949. IT85_C0RCR);
  950. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  951. * in the previous it8709_wr(dev, ) call) */
  952. it8709_idle_rx(dev);
  953. }
  954. /* enable the receiver; this must be called with the device spinlock held */
  955. static void it8709_enable_rx(struct ite_dev *dev)
  956. {
  957. ite_dbg("%s called", __func__);
  958. /* enable the receiver by setting RXEN */
  959. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN,
  960. IT85_C0RCR);
  961. /* just prepare it to idle for the next reception */
  962. it8709_idle_rx(dev);
  963. /* enable the receiver interrupts and master enable flag */
  964. it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
  965. |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
  966. IT85_C0IER);
  967. }
  968. /* disable the transmitter interrupt; this must be called with the device
  969. * spinlock held */
  970. static void it8709_disable_tx_interrupt(struct ite_dev *dev)
  971. {
  972. ite_dbg("%s called", __func__);
  973. /* disable the transmitter interrupts */
  974. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE,
  975. IT85_C0IER);
  976. }
  977. /* enable the transmitter interrupt; this must be called with the device
  978. * spinlock held */
  979. static void it8709_enable_tx_interrupt(struct ite_dev *dev)
  980. {
  981. ite_dbg("%s called", __func__);
  982. /* enable the transmitter interrupts and master enable flag */
  983. it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
  984. |IT85_TLDLIE | IT85_IEC,
  985. IT85_C0IER);
  986. }
  987. /* disable the device; this must be called with the device spinlock held */
  988. static void it8709_disable(struct ite_dev *dev)
  989. {
  990. ite_dbg("%s called", __func__);
  991. /* clear out all interrupt enable flags */
  992. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  993. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  994. IT85_C0IER);
  995. /* disable the receiver */
  996. it8709_disable_rx(dev);
  997. /* erase the FIFO */
  998. it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR),
  999. IT85_C0MSTCR);
  1000. }
  1001. /* initialize the hardware */
  1002. static void it8709_init_hardware(struct ite_dev *dev)
  1003. {
  1004. ite_dbg("%s called", __func__);
  1005. /* disable all the interrupts */
  1006. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  1007. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  1008. IT85_C0IER);
  1009. /* program the baud rate divisor */
  1010. it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR);
  1011. it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
  1012. IT85_C0BDHR);
  1013. /* program the C0MSTCR register defaults */
  1014. it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) &
  1015. ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL
  1016. | IT85_FIFOCLR | IT85_RESET)) | IT85_FIFOTL_DEFAULT,
  1017. IT85_C0MSTCR);
  1018. /* program the C0RCR register defaults */
  1019. it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) &
  1020. ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | IT85_RXACT
  1021. | IT85_RXDCR)) | ITE_RXDCR_DEFAULT,
  1022. IT85_C0RCR);
  1023. /* program the C0TCR register defaults */
  1024. it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW))
  1025. | IT85_TXRLE | IT85_TXENDF | IT85_TXMPM_DEFAULT
  1026. | IT85_TXMPW_DEFAULT,
  1027. IT85_C0TCR);
  1028. /* program the carrier parameters */
  1029. ite_set_carrier_params(dev);
  1030. }
  1031. /* generic hardware setup/teardown code */
  1032. /* activate the device for use */
  1033. static int ite_open(struct rc_dev *rcdev)
  1034. {
  1035. struct ite_dev *dev = rcdev->priv;
  1036. unsigned long flags;
  1037. ite_dbg("%s called", __func__);
  1038. spin_lock_irqsave(&dev->lock, flags);
  1039. dev->in_use = true;
  1040. /* enable the receiver */
  1041. dev->params.enable_rx(dev);
  1042. spin_unlock_irqrestore(&dev->lock, flags);
  1043. return 0;
  1044. }
  1045. /* deactivate the device for use */
  1046. static void ite_close(struct rc_dev *rcdev)
  1047. {
  1048. struct ite_dev *dev = rcdev->priv;
  1049. unsigned long flags;
  1050. ite_dbg("%s called", __func__);
  1051. spin_lock_irqsave(&dev->lock, flags);
  1052. dev->in_use = false;
  1053. /* wait for any transmission to end */
  1054. spin_unlock_irqrestore(&dev->lock, flags);
  1055. wait_event_interruptible(dev->tx_ended, !dev->transmitting);
  1056. spin_lock_irqsave(&dev->lock, flags);
  1057. dev->params.disable(dev);
  1058. spin_unlock_irqrestore(&dev->lock, flags);
  1059. }
  1060. /* supported models and their parameters */
  1061. static const struct ite_dev_params ite_dev_descs[] = {
  1062. { /* 0: ITE8704 */
  1063. .model = "ITE8704 CIR transceiver",
  1064. .io_region_size = IT87_IOREG_LENGTH,
  1065. .io_rsrc_no = 0,
  1066. .hw_tx_capable = true,
  1067. .sample_period = (u32) (1000000000ULL / 115200),
  1068. .tx_carrier_freq = 38000,
  1069. .tx_duty_cycle = 33,
  1070. .rx_low_carrier_freq = 0,
  1071. .rx_high_carrier_freq = 0,
  1072. /* operations */
  1073. .get_irq_causes = it87_get_irq_causes,
  1074. .enable_rx = it87_enable_rx,
  1075. .idle_rx = it87_idle_rx,
  1076. .disable_rx = it87_idle_rx,
  1077. .get_rx_bytes = it87_get_rx_bytes,
  1078. .enable_tx_interrupt = it87_enable_tx_interrupt,
  1079. .disable_tx_interrupt = it87_disable_tx_interrupt,
  1080. .get_tx_used_slots = it87_get_tx_used_slots,
  1081. .put_tx_byte = it87_put_tx_byte,
  1082. .disable = it87_disable,
  1083. .init_hardware = it87_init_hardware,
  1084. .set_carrier_params = it87_set_carrier_params,
  1085. },
  1086. { /* 1: ITE8713 */
  1087. .model = "ITE8713 CIR transceiver",
  1088. .io_region_size = IT87_IOREG_LENGTH,
  1089. .io_rsrc_no = 0,
  1090. .hw_tx_capable = true,
  1091. .sample_period = (u32) (1000000000ULL / 115200),
  1092. .tx_carrier_freq = 38000,
  1093. .tx_duty_cycle = 33,
  1094. .rx_low_carrier_freq = 0,
  1095. .rx_high_carrier_freq = 0,
  1096. /* operations */
  1097. .get_irq_causes = it87_get_irq_causes,
  1098. .enable_rx = it87_enable_rx,
  1099. .idle_rx = it87_idle_rx,
  1100. .disable_rx = it87_idle_rx,
  1101. .get_rx_bytes = it87_get_rx_bytes,
  1102. .enable_tx_interrupt = it87_enable_tx_interrupt,
  1103. .disable_tx_interrupt = it87_disable_tx_interrupt,
  1104. .get_tx_used_slots = it87_get_tx_used_slots,
  1105. .put_tx_byte = it87_put_tx_byte,
  1106. .disable = it87_disable,
  1107. .init_hardware = it87_init_hardware,
  1108. .set_carrier_params = it87_set_carrier_params,
  1109. },
  1110. { /* 2: ITE8708 */
  1111. .model = "ITE8708 CIR transceiver",
  1112. .io_region_size = IT8708_IOREG_LENGTH,
  1113. .io_rsrc_no = 0,
  1114. .hw_tx_capable = true,
  1115. .sample_period = (u32) (1000000000ULL / 115200),
  1116. .tx_carrier_freq = 38000,
  1117. .tx_duty_cycle = 33,
  1118. .rx_low_carrier_freq = 0,
  1119. .rx_high_carrier_freq = 0,
  1120. /* operations */
  1121. .get_irq_causes = it8708_get_irq_causes,
  1122. .enable_rx = it8708_enable_rx,
  1123. .idle_rx = it8708_idle_rx,
  1124. .disable_rx = it8708_idle_rx,
  1125. .get_rx_bytes = it8708_get_rx_bytes,
  1126. .enable_tx_interrupt = it8708_enable_tx_interrupt,
  1127. .disable_tx_interrupt =
  1128. it8708_disable_tx_interrupt,
  1129. .get_tx_used_slots = it8708_get_tx_used_slots,
  1130. .put_tx_byte = it8708_put_tx_byte,
  1131. .disable = it8708_disable,
  1132. .init_hardware = it8708_init_hardware,
  1133. .set_carrier_params = it8708_set_carrier_params,
  1134. },
  1135. { /* 3: ITE8709 */
  1136. .model = "ITE8709 CIR transceiver",
  1137. .io_region_size = IT8709_IOREG_LENGTH,
  1138. .io_rsrc_no = 2,
  1139. .hw_tx_capable = true,
  1140. .sample_period = (u32) (1000000000ULL / 115200),
  1141. .tx_carrier_freq = 38000,
  1142. .tx_duty_cycle = 33,
  1143. .rx_low_carrier_freq = 0,
  1144. .rx_high_carrier_freq = 0,
  1145. /* operations */
  1146. .get_irq_causes = it8709_get_irq_causes,
  1147. .enable_rx = it8709_enable_rx,
  1148. .idle_rx = it8709_idle_rx,
  1149. .disable_rx = it8709_idle_rx,
  1150. .get_rx_bytes = it8709_get_rx_bytes,
  1151. .enable_tx_interrupt = it8709_enable_tx_interrupt,
  1152. .disable_tx_interrupt =
  1153. it8709_disable_tx_interrupt,
  1154. .get_tx_used_slots = it8709_get_tx_used_slots,
  1155. .put_tx_byte = it8709_put_tx_byte,
  1156. .disable = it8709_disable,
  1157. .init_hardware = it8709_init_hardware,
  1158. .set_carrier_params = it8709_set_carrier_params,
  1159. },
  1160. };
  1161. static const struct pnp_device_id ite_ids[] = {
  1162. {"ITE8704", 0}, /* Default model */
  1163. {"ITE8713", 1}, /* CIR found in EEEBox 1501U */
  1164. {"ITE8708", 2}, /* Bridged IT8512 */
  1165. {"ITE8709", 3}, /* SRAM-Bridged IT8512 */
  1166. {"", 0},
  1167. };
  1168. /* allocate memory, probe hardware, and initialize everything */
  1169. static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
  1170. *dev_id)
  1171. {
  1172. const struct ite_dev_params *dev_desc = NULL;
  1173. struct ite_dev *itdev = NULL;
  1174. struct rc_dev *rdev = NULL;
  1175. int ret = -ENOMEM;
  1176. int model_no;
  1177. int io_rsrc_no;
  1178. ite_dbg("%s called", __func__);
  1179. itdev = kzalloc(sizeof(struct ite_dev), GFP_KERNEL);
  1180. if (!itdev)
  1181. return ret;
  1182. /* input device for IR remote (and tx) */
  1183. rdev = rc_allocate_device();
  1184. if (!rdev)
  1185. goto failure;
  1186. ret = -ENODEV;
  1187. /* get the model number */
  1188. model_no = (int)dev_id->driver_data;
  1189. ite_pr(KERN_NOTICE, "Auto-detected model: %s\n",
  1190. ite_dev_descs[model_no].model);
  1191. if (model_number >= 0 && model_number < ARRAY_SIZE(ite_dev_descs)) {
  1192. model_no = model_number;
  1193. ite_pr(KERN_NOTICE, "The model has been fixed by a module "
  1194. "parameter.");
  1195. }
  1196. ite_pr(KERN_NOTICE, "Using model: %s\n", ite_dev_descs[model_no].model);
  1197. /* get the description for the device */
  1198. dev_desc = &ite_dev_descs[model_no];
  1199. io_rsrc_no = dev_desc->io_rsrc_no;
  1200. /* validate pnp resources */
  1201. if (!pnp_port_valid(pdev, io_rsrc_no) ||
  1202. pnp_port_len(pdev, io_rsrc_no) != dev_desc->io_region_size) {
  1203. dev_err(&pdev->dev, "IR PNP Port not valid!\n");
  1204. goto failure;
  1205. }
  1206. if (!pnp_irq_valid(pdev, 0)) {
  1207. dev_err(&pdev->dev, "PNP IRQ not valid!\n");
  1208. goto failure;
  1209. }
  1210. /* store resource values */
  1211. itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no);
  1212. itdev->cir_irq = pnp_irq(pdev, 0);
  1213. /* initialize spinlocks */
  1214. spin_lock_init(&itdev->lock);
  1215. /* initialize raw event */
  1216. init_ir_raw_event(&itdev->rawir);
  1217. ret = -EBUSY;
  1218. /* now claim resources */
  1219. if (!request_region(itdev->cir_addr,
  1220. dev_desc->io_region_size, ITE_DRIVER_NAME))
  1221. goto failure;
  1222. if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED,
  1223. ITE_DRIVER_NAME, (void *)itdev))
  1224. goto failure;
  1225. /* set driver data into the pnp device */
  1226. pnp_set_drvdata(pdev, itdev);
  1227. itdev->pdev = pdev;
  1228. /* initialize waitqueues for transmission */
  1229. init_waitqueue_head(&itdev->tx_queue);
  1230. init_waitqueue_head(&itdev->tx_ended);
  1231. /* copy model-specific parameters */
  1232. itdev->params = *dev_desc;
  1233. /* apply any overrides */
  1234. if (sample_period > 0)
  1235. itdev->params.sample_period = sample_period;
  1236. if (tx_carrier_freq > 0)
  1237. itdev->params.tx_carrier_freq = tx_carrier_freq;
  1238. if (tx_duty_cycle > 0 && tx_duty_cycle <= 100)
  1239. itdev->params.tx_duty_cycle = tx_duty_cycle;
  1240. if (rx_low_carrier_freq > 0)
  1241. itdev->params.rx_low_carrier_freq = rx_low_carrier_freq;
  1242. if (rx_high_carrier_freq > 0)
  1243. itdev->params.rx_high_carrier_freq = rx_high_carrier_freq;
  1244. /* print out parameters */
  1245. ite_pr(KERN_NOTICE, "TX-capable: %d\n", (int)
  1246. itdev->params.hw_tx_capable);
  1247. ite_pr(KERN_NOTICE, "Sample period (ns): %ld\n", (long)
  1248. itdev->params.sample_period);
  1249. ite_pr(KERN_NOTICE, "TX carrier frequency (Hz): %d\n", (int)
  1250. itdev->params.tx_carrier_freq);
  1251. ite_pr(KERN_NOTICE, "TX duty cycle (%%): %d\n", (int)
  1252. itdev->params.tx_duty_cycle);
  1253. ite_pr(KERN_NOTICE, "RX low carrier frequency (Hz): %d\n", (int)
  1254. itdev->params.rx_low_carrier_freq);
  1255. ite_pr(KERN_NOTICE, "RX high carrier frequency (Hz): %d\n", (int)
  1256. itdev->params.rx_high_carrier_freq);
  1257. /* set up hardware initial state */
  1258. itdev->params.init_hardware(itdev);
  1259. /* set up ir-core props */
  1260. rdev->priv = itdev;
  1261. rdev->driver_type = RC_DRIVER_IR_RAW;
  1262. rdev->allowed_protos = RC_TYPE_ALL;
  1263. rdev->open = ite_open;
  1264. rdev->close = ite_close;
  1265. rdev->s_idle = ite_s_idle;
  1266. rdev->s_rx_carrier_range = ite_set_rx_carrier_range;
  1267. rdev->min_timeout = ITE_MIN_IDLE_TIMEOUT;
  1268. rdev->max_timeout = ITE_MAX_IDLE_TIMEOUT;
  1269. rdev->timeout = ITE_IDLE_TIMEOUT;
  1270. rdev->rx_resolution = ITE_BAUDRATE_DIVISOR *
  1271. itdev->params.sample_period;
  1272. rdev->tx_resolution = ITE_BAUDRATE_DIVISOR *
  1273. itdev->params.sample_period;
  1274. /* set up transmitter related values if needed */
  1275. if (itdev->params.hw_tx_capable) {
  1276. rdev->tx_ir = ite_tx_ir;
  1277. rdev->s_tx_carrier = ite_set_tx_carrier;
  1278. rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle;
  1279. }
  1280. rdev->input_name = dev_desc->model;
  1281. rdev->input_id.bustype = BUS_HOST;
  1282. rdev->input_id.vendor = PCI_VENDOR_ID_ITE;
  1283. rdev->input_id.product = 0;
  1284. rdev->input_id.version = 0;
  1285. rdev->driver_name = ITE_DRIVER_NAME;
  1286. rdev->map_name = RC_MAP_RC6_MCE;
  1287. ret = rc_register_device(rdev);
  1288. if (ret)
  1289. goto failure;
  1290. itdev->rdev = rdev;
  1291. ite_pr(KERN_NOTICE, "driver has been successfully loaded\n");
  1292. return 0;
  1293. failure:
  1294. if (itdev->cir_irq)
  1295. free_irq(itdev->cir_irq, itdev);
  1296. if (itdev->cir_addr)
  1297. release_region(itdev->cir_addr, itdev->params.io_region_size);
  1298. rc_free_device(rdev);
  1299. kfree(itdev);
  1300. return ret;
  1301. }
  1302. static void __devexit ite_remove(struct pnp_dev *pdev)
  1303. {
  1304. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1305. unsigned long flags;
  1306. ite_dbg("%s called", __func__);
  1307. spin_lock_irqsave(&dev->lock, flags);
  1308. /* disable hardware */
  1309. dev->params.disable(dev);
  1310. spin_unlock_irqrestore(&dev->lock, flags);
  1311. /* free resources */
  1312. free_irq(dev->cir_irq, dev);
  1313. release_region(dev->cir_addr, dev->params.io_region_size);
  1314. rc_unregister_device(dev->rdev);
  1315. kfree(dev);
  1316. }
  1317. static int ite_suspend(struct pnp_dev *pdev, pm_message_t state)
  1318. {
  1319. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1320. unsigned long flags;
  1321. ite_dbg("%s called", __func__);
  1322. /* wait for any transmission to end */
  1323. wait_event_interruptible(dev->tx_ended, !dev->transmitting);
  1324. spin_lock_irqsave(&dev->lock, flags);
  1325. /* disable all interrupts */
  1326. dev->params.disable(dev);
  1327. spin_unlock_irqrestore(&dev->lock, flags);
  1328. return 0;
  1329. }
  1330. static int ite_resume(struct pnp_dev *pdev)
  1331. {
  1332. int ret = 0;
  1333. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1334. unsigned long flags;
  1335. ite_dbg("%s called", __func__);
  1336. spin_lock_irqsave(&dev->lock, flags);
  1337. /* reinitialize hardware config registers */
  1338. dev->params.init_hardware(dev);
  1339. /* enable the receiver */
  1340. dev->params.enable_rx(dev);
  1341. spin_unlock_irqrestore(&dev->lock, flags);
  1342. return ret;
  1343. }
  1344. static void ite_shutdown(struct pnp_dev *pdev)
  1345. {
  1346. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1347. unsigned long flags;
  1348. ite_dbg("%s called", __func__);
  1349. spin_lock_irqsave(&dev->lock, flags);
  1350. /* disable all interrupts */
  1351. dev->params.disable(dev);
  1352. spin_unlock_irqrestore(&dev->lock, flags);
  1353. }
  1354. static struct pnp_driver ite_driver = {
  1355. .name = ITE_DRIVER_NAME,
  1356. .id_table = ite_ids,
  1357. .probe = ite_probe,
  1358. .remove = __devexit_p(ite_remove),
  1359. .suspend = ite_suspend,
  1360. .resume = ite_resume,
  1361. .shutdown = ite_shutdown,
  1362. };
  1363. int ite_init(void)
  1364. {
  1365. return pnp_register_driver(&ite_driver);
  1366. }
  1367. void ite_exit(void)
  1368. {
  1369. pnp_unregister_driver(&ite_driver);
  1370. }
  1371. MODULE_DEVICE_TABLE(pnp, ite_ids);
  1372. MODULE_DESCRIPTION("ITE Tech Inc. IT8712F/ITE8512F CIR driver");
  1373. MODULE_AUTHOR("Juan J. Garcia de Soria <skandalfo@gmail.com>");
  1374. MODULE_LICENSE("GPL");
  1375. module_init(ite_init);
  1376. module_exit(ite_exit);