intel_sdvo.c 79 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the next
  14. * paragraph) shall be included in all copies or substantial portions of the
  15. * Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. * Authors:
  26. * Eric Anholt <eric@anholt.net>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "drm_crtc.h"
  34. #include "drm_edid.h"
  35. #include "intel_drv.h"
  36. #include "i915_drm.h"
  37. #include "i915_drv.h"
  38. #include "intel_sdvo_regs.h"
  39. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  40. #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  41. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  42. #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
  43. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  44. SDVO_TV_MASK)
  45. #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
  46. #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
  47. #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
  48. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  49. static const char *tv_format_names[] = {
  50. "NTSC_M" , "NTSC_J" , "NTSC_443",
  51. "PAL_B" , "PAL_D" , "PAL_G" ,
  52. "PAL_H" , "PAL_I" , "PAL_M" ,
  53. "PAL_N" , "PAL_NC" , "PAL_60" ,
  54. "SECAM_B" , "SECAM_D" , "SECAM_G" ,
  55. "SECAM_K" , "SECAM_K1", "SECAM_L" ,
  56. "SECAM_60"
  57. };
  58. #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
  59. struct intel_sdvo {
  60. struct intel_encoder base;
  61. struct i2c_adapter *i2c;
  62. u8 slave_addr;
  63. struct i2c_adapter ddc;
  64. /* Register for the SDVO device: SDVOB or SDVOC */
  65. int sdvo_reg;
  66. /* Active outputs controlled by this SDVO output */
  67. uint16_t controlled_output;
  68. /*
  69. * Capabilities of the SDVO device returned by
  70. * i830_sdvo_get_capabilities()
  71. */
  72. struct intel_sdvo_caps caps;
  73. /* Pixel clock limitations reported by the SDVO device, in kHz */
  74. int pixel_clock_min, pixel_clock_max;
  75. /*
  76. * For multiple function SDVO device,
  77. * this is for current attached outputs.
  78. */
  79. uint16_t attached_output;
  80. /**
  81. * This is used to select the color range of RBG outputs in HDMI mode.
  82. * It is only valid when using TMDS encoding and 8 bit per color mode.
  83. */
  84. uint32_t color_range;
  85. /**
  86. * This is set if we're going to treat the device as TV-out.
  87. *
  88. * While we have these nice friendly flags for output types that ought
  89. * to decide this for us, the S-Video output on our HDMI+S-Video card
  90. * shows up as RGB1 (VGA).
  91. */
  92. bool is_tv;
  93. /* This is for current tv format name */
  94. int tv_format_index;
  95. /**
  96. * This is set if we treat the device as HDMI, instead of DVI.
  97. */
  98. bool is_hdmi;
  99. bool has_hdmi_monitor;
  100. bool has_hdmi_audio;
  101. /**
  102. * This is set if we detect output of sdvo device as LVDS and
  103. * have a valid fixed mode to use with the panel.
  104. */
  105. bool is_lvds;
  106. /**
  107. * This is sdvo fixed pannel mode pointer
  108. */
  109. struct drm_display_mode *sdvo_lvds_fixed_mode;
  110. /* DDC bus used by this SDVO encoder */
  111. uint8_t ddc_bus;
  112. /* Input timings for adjusted_mode */
  113. struct intel_sdvo_dtd input_dtd;
  114. };
  115. struct intel_sdvo_connector {
  116. struct intel_connector base;
  117. /* Mark the type of connector */
  118. uint16_t output_flag;
  119. int force_audio;
  120. /* This contains all current supported TV format */
  121. u8 tv_format_supported[TV_FORMAT_NUM];
  122. int format_supported_num;
  123. struct drm_property *tv_format;
  124. /* add the property for the SDVO-TV */
  125. struct drm_property *left;
  126. struct drm_property *right;
  127. struct drm_property *top;
  128. struct drm_property *bottom;
  129. struct drm_property *hpos;
  130. struct drm_property *vpos;
  131. struct drm_property *contrast;
  132. struct drm_property *saturation;
  133. struct drm_property *hue;
  134. struct drm_property *sharpness;
  135. struct drm_property *flicker_filter;
  136. struct drm_property *flicker_filter_adaptive;
  137. struct drm_property *flicker_filter_2d;
  138. struct drm_property *tv_chroma_filter;
  139. struct drm_property *tv_luma_filter;
  140. struct drm_property *dot_crawl;
  141. /* add the property for the SDVO-TV/LVDS */
  142. struct drm_property *brightness;
  143. /* Add variable to record current setting for the above property */
  144. u32 left_margin, right_margin, top_margin, bottom_margin;
  145. /* this is to get the range of margin.*/
  146. u32 max_hscan, max_vscan;
  147. u32 max_hpos, cur_hpos;
  148. u32 max_vpos, cur_vpos;
  149. u32 cur_brightness, max_brightness;
  150. u32 cur_contrast, max_contrast;
  151. u32 cur_saturation, max_saturation;
  152. u32 cur_hue, max_hue;
  153. u32 cur_sharpness, max_sharpness;
  154. u32 cur_flicker_filter, max_flicker_filter;
  155. u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
  156. u32 cur_flicker_filter_2d, max_flicker_filter_2d;
  157. u32 cur_tv_chroma_filter, max_tv_chroma_filter;
  158. u32 cur_tv_luma_filter, max_tv_luma_filter;
  159. u32 cur_dot_crawl, max_dot_crawl;
  160. };
  161. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  162. {
  163. return container_of(encoder, struct intel_sdvo, base.base);
  164. }
  165. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  166. {
  167. return container_of(intel_attached_encoder(connector),
  168. struct intel_sdvo, base);
  169. }
  170. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  171. {
  172. return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  173. }
  174. static bool
  175. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  176. static bool
  177. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  178. struct intel_sdvo_connector *intel_sdvo_connector,
  179. int type);
  180. static bool
  181. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  182. struct intel_sdvo_connector *intel_sdvo_connector);
  183. /**
  184. * Writes the SDVOB or SDVOC with the given value, but always writes both
  185. * SDVOB and SDVOC to work around apparent hardware issues (according to
  186. * comments in the BIOS).
  187. */
  188. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  189. {
  190. struct drm_device *dev = intel_sdvo->base.base.dev;
  191. struct drm_i915_private *dev_priv = dev->dev_private;
  192. u32 bval = val, cval = val;
  193. int i;
  194. if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  195. I915_WRITE(intel_sdvo->sdvo_reg, val);
  196. I915_READ(intel_sdvo->sdvo_reg);
  197. return;
  198. }
  199. if (intel_sdvo->sdvo_reg == SDVOB) {
  200. cval = I915_READ(SDVOC);
  201. } else {
  202. bval = I915_READ(SDVOB);
  203. }
  204. /*
  205. * Write the registers twice for luck. Sometimes,
  206. * writing them only once doesn't appear to 'stick'.
  207. * The BIOS does this too. Yay, magic
  208. */
  209. for (i = 0; i < 2; i++)
  210. {
  211. I915_WRITE(SDVOB, bval);
  212. I915_READ(SDVOB);
  213. I915_WRITE(SDVOC, cval);
  214. I915_READ(SDVOC);
  215. }
  216. }
  217. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  218. {
  219. struct i2c_msg msgs[] = {
  220. {
  221. .addr = intel_sdvo->slave_addr,
  222. .flags = 0,
  223. .len = 1,
  224. .buf = &addr,
  225. },
  226. {
  227. .addr = intel_sdvo->slave_addr,
  228. .flags = I2C_M_RD,
  229. .len = 1,
  230. .buf = ch,
  231. }
  232. };
  233. int ret;
  234. if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  235. return true;
  236. DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  237. return false;
  238. }
  239. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  240. /** Mapping of command numbers to names, for debug output */
  241. static const struct _sdvo_cmd_name {
  242. u8 cmd;
  243. const char *name;
  244. } sdvo_cmd_names[] = {
  245. SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  246. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  247. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  248. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  249. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  250. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  251. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  252. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  253. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  254. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  255. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  256. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  257. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  258. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  259. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  260. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  261. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  262. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  263. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  264. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  265. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  266. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  267. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  268. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  269. SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  270. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  271. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  272. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  273. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  274. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  275. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  276. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  277. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  278. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  279. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  280. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  281. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  282. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  283. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  284. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  285. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  286. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  287. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  288. /* Add the op code for SDVO enhancements */
  289. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  290. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  291. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  292. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  293. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  294. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  295. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  296. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  297. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  298. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  299. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  300. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  301. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  302. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  303. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  304. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  305. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  306. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  307. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  308. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  309. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  310. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  311. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  312. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  313. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  314. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  315. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  316. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  317. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  318. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  319. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  320. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  321. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  322. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  323. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  324. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  325. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  326. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  327. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  328. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  329. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  330. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  331. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  332. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  333. /* HDMI op code */
  334. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  335. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  336. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  337. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  338. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  339. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  340. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  341. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  342. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  343. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  344. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  345. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  346. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  347. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  348. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  349. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  350. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  351. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  352. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  353. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  354. };
  355. #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
  356. #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
  357. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  358. const void *args, int args_len)
  359. {
  360. int i;
  361. DRM_DEBUG_KMS("%s: W: %02X ",
  362. SDVO_NAME(intel_sdvo), cmd);
  363. for (i = 0; i < args_len; i++)
  364. DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  365. for (; i < 8; i++)
  366. DRM_LOG_KMS(" ");
  367. for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  368. if (cmd == sdvo_cmd_names[i].cmd) {
  369. DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  370. break;
  371. }
  372. }
  373. if (i == ARRAY_SIZE(sdvo_cmd_names))
  374. DRM_LOG_KMS("(%02X)", cmd);
  375. DRM_LOG_KMS("\n");
  376. }
  377. static const char *cmd_status_names[] = {
  378. "Power on",
  379. "Success",
  380. "Not supported",
  381. "Invalid arg",
  382. "Pending",
  383. "Target not specified",
  384. "Scaling not supported"
  385. };
  386. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  387. const void *args, int args_len)
  388. {
  389. u8 buf[args_len*2 + 2], status;
  390. struct i2c_msg msgs[args_len + 3];
  391. int i, ret;
  392. intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  393. for (i = 0; i < args_len; i++) {
  394. msgs[i].addr = intel_sdvo->slave_addr;
  395. msgs[i].flags = 0;
  396. msgs[i].len = 2;
  397. msgs[i].buf = buf + 2 *i;
  398. buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  399. buf[2*i + 1] = ((u8*)args)[i];
  400. }
  401. msgs[i].addr = intel_sdvo->slave_addr;
  402. msgs[i].flags = 0;
  403. msgs[i].len = 2;
  404. msgs[i].buf = buf + 2*i;
  405. buf[2*i + 0] = SDVO_I2C_OPCODE;
  406. buf[2*i + 1] = cmd;
  407. /* the following two are to read the response */
  408. status = SDVO_I2C_CMD_STATUS;
  409. msgs[i+1].addr = intel_sdvo->slave_addr;
  410. msgs[i+1].flags = 0;
  411. msgs[i+1].len = 1;
  412. msgs[i+1].buf = &status;
  413. msgs[i+2].addr = intel_sdvo->slave_addr;
  414. msgs[i+2].flags = I2C_M_RD;
  415. msgs[i+2].len = 1;
  416. msgs[i+2].buf = &status;
  417. ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  418. if (ret < 0) {
  419. DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  420. return false;
  421. }
  422. if (ret != i+3) {
  423. /* failure in I2C transfer */
  424. DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  425. return false;
  426. }
  427. return true;
  428. }
  429. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  430. void *response, int response_len)
  431. {
  432. u8 retry = 5;
  433. u8 status;
  434. int i;
  435. DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  436. /*
  437. * The documentation states that all commands will be
  438. * processed within 15µs, and that we need only poll
  439. * the status byte a maximum of 3 times in order for the
  440. * command to be complete.
  441. *
  442. * Check 5 times in case the hardware failed to read the docs.
  443. */
  444. if (!intel_sdvo_read_byte(intel_sdvo,
  445. SDVO_I2C_CMD_STATUS,
  446. &status))
  447. goto log_fail;
  448. while (status == SDVO_CMD_STATUS_PENDING && retry--) {
  449. udelay(15);
  450. if (!intel_sdvo_read_byte(intel_sdvo,
  451. SDVO_I2C_CMD_STATUS,
  452. &status))
  453. goto log_fail;
  454. }
  455. if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  456. DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  457. else
  458. DRM_LOG_KMS("(??? %d)", status);
  459. if (status != SDVO_CMD_STATUS_SUCCESS)
  460. goto log_fail;
  461. /* Read the command response */
  462. for (i = 0; i < response_len; i++) {
  463. if (!intel_sdvo_read_byte(intel_sdvo,
  464. SDVO_I2C_RETURN_0 + i,
  465. &((u8 *)response)[i]))
  466. goto log_fail;
  467. DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  468. }
  469. DRM_LOG_KMS("\n");
  470. return true;
  471. log_fail:
  472. DRM_LOG_KMS("... failed\n");
  473. return false;
  474. }
  475. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  476. {
  477. if (mode->clock >= 100000)
  478. return 1;
  479. else if (mode->clock >= 50000)
  480. return 2;
  481. else
  482. return 4;
  483. }
  484. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  485. u8 ddc_bus)
  486. {
  487. /* This must be the immediately preceding write before the i2c xfer */
  488. return intel_sdvo_write_cmd(intel_sdvo,
  489. SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  490. &ddc_bus, 1);
  491. }
  492. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  493. {
  494. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  495. return false;
  496. return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  497. }
  498. static bool
  499. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  500. {
  501. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  502. return false;
  503. return intel_sdvo_read_response(intel_sdvo, value, len);
  504. }
  505. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  506. {
  507. struct intel_sdvo_set_target_input_args targets = {0};
  508. return intel_sdvo_set_value(intel_sdvo,
  509. SDVO_CMD_SET_TARGET_INPUT,
  510. &targets, sizeof(targets));
  511. }
  512. /**
  513. * Return whether each input is trained.
  514. *
  515. * This function is making an assumption about the layout of the response,
  516. * which should be checked against the docs.
  517. */
  518. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  519. {
  520. struct intel_sdvo_get_trained_inputs_response response;
  521. BUILD_BUG_ON(sizeof(response) != 1);
  522. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  523. &response, sizeof(response)))
  524. return false;
  525. *input_1 = response.input0_trained;
  526. *input_2 = response.input1_trained;
  527. return true;
  528. }
  529. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  530. u16 outputs)
  531. {
  532. return intel_sdvo_set_value(intel_sdvo,
  533. SDVO_CMD_SET_ACTIVE_OUTPUTS,
  534. &outputs, sizeof(outputs));
  535. }
  536. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  537. int mode)
  538. {
  539. u8 state = SDVO_ENCODER_STATE_ON;
  540. switch (mode) {
  541. case DRM_MODE_DPMS_ON:
  542. state = SDVO_ENCODER_STATE_ON;
  543. break;
  544. case DRM_MODE_DPMS_STANDBY:
  545. state = SDVO_ENCODER_STATE_STANDBY;
  546. break;
  547. case DRM_MODE_DPMS_SUSPEND:
  548. state = SDVO_ENCODER_STATE_SUSPEND;
  549. break;
  550. case DRM_MODE_DPMS_OFF:
  551. state = SDVO_ENCODER_STATE_OFF;
  552. break;
  553. }
  554. return intel_sdvo_set_value(intel_sdvo,
  555. SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  556. }
  557. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  558. int *clock_min,
  559. int *clock_max)
  560. {
  561. struct intel_sdvo_pixel_clock_range clocks;
  562. BUILD_BUG_ON(sizeof(clocks) != 4);
  563. if (!intel_sdvo_get_value(intel_sdvo,
  564. SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  565. &clocks, sizeof(clocks)))
  566. return false;
  567. /* Convert the values from units of 10 kHz to kHz. */
  568. *clock_min = clocks.min * 10;
  569. *clock_max = clocks.max * 10;
  570. return true;
  571. }
  572. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  573. u16 outputs)
  574. {
  575. return intel_sdvo_set_value(intel_sdvo,
  576. SDVO_CMD_SET_TARGET_OUTPUT,
  577. &outputs, sizeof(outputs));
  578. }
  579. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  580. struct intel_sdvo_dtd *dtd)
  581. {
  582. return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  583. intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  584. }
  585. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  586. struct intel_sdvo_dtd *dtd)
  587. {
  588. return intel_sdvo_set_timing(intel_sdvo,
  589. SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  590. }
  591. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  592. struct intel_sdvo_dtd *dtd)
  593. {
  594. return intel_sdvo_set_timing(intel_sdvo,
  595. SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  596. }
  597. static bool
  598. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  599. uint16_t clock,
  600. uint16_t width,
  601. uint16_t height)
  602. {
  603. struct intel_sdvo_preferred_input_timing_args args;
  604. memset(&args, 0, sizeof(args));
  605. args.clock = clock;
  606. args.width = width;
  607. args.height = height;
  608. args.interlace = 0;
  609. if (intel_sdvo->is_lvds &&
  610. (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  611. intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  612. args.scaled = 1;
  613. return intel_sdvo_set_value(intel_sdvo,
  614. SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  615. &args, sizeof(args));
  616. }
  617. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  618. struct intel_sdvo_dtd *dtd)
  619. {
  620. BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  621. BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  622. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  623. &dtd->part1, sizeof(dtd->part1)) &&
  624. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  625. &dtd->part2, sizeof(dtd->part2));
  626. }
  627. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  628. {
  629. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  630. }
  631. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  632. const struct drm_display_mode *mode)
  633. {
  634. uint16_t width, height;
  635. uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  636. uint16_t h_sync_offset, v_sync_offset;
  637. int mode_clock;
  638. width = mode->crtc_hdisplay;
  639. height = mode->crtc_vdisplay;
  640. /* do some mode translations */
  641. h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
  642. h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
  643. v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
  644. v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
  645. h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
  646. v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
  647. mode_clock = mode->clock;
  648. mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
  649. mode_clock /= 10;
  650. dtd->part1.clock = mode_clock;
  651. dtd->part1.h_active = width & 0xff;
  652. dtd->part1.h_blank = h_blank_len & 0xff;
  653. dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  654. ((h_blank_len >> 8) & 0xf);
  655. dtd->part1.v_active = height & 0xff;
  656. dtd->part1.v_blank = v_blank_len & 0xff;
  657. dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  658. ((v_blank_len >> 8) & 0xf);
  659. dtd->part2.h_sync_off = h_sync_offset & 0xff;
  660. dtd->part2.h_sync_width = h_sync_len & 0xff;
  661. dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  662. (v_sync_len & 0xf);
  663. dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  664. ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  665. ((v_sync_len & 0x30) >> 4);
  666. dtd->part2.dtd_flags = 0x18;
  667. if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  668. dtd->part2.dtd_flags |= 0x2;
  669. if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  670. dtd->part2.dtd_flags |= 0x4;
  671. dtd->part2.sdvo_flags = 0;
  672. dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  673. dtd->part2.reserved = 0;
  674. }
  675. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  676. const struct intel_sdvo_dtd *dtd)
  677. {
  678. mode->hdisplay = dtd->part1.h_active;
  679. mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  680. mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  681. mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  682. mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  683. mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  684. mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  685. mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  686. mode->vdisplay = dtd->part1.v_active;
  687. mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  688. mode->vsync_start = mode->vdisplay;
  689. mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  690. mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  691. mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  692. mode->vsync_end = mode->vsync_start +
  693. (dtd->part2.v_sync_off_width & 0xf);
  694. mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  695. mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  696. mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  697. mode->clock = dtd->part1.clock * 10;
  698. mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  699. if (dtd->part2.dtd_flags & 0x2)
  700. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  701. if (dtd->part2.dtd_flags & 0x4)
  702. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  703. }
  704. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  705. {
  706. struct intel_sdvo_encode encode;
  707. BUILD_BUG_ON(sizeof(encode) != 2);
  708. return intel_sdvo_get_value(intel_sdvo,
  709. SDVO_CMD_GET_SUPP_ENCODE,
  710. &encode, sizeof(encode));
  711. }
  712. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  713. uint8_t mode)
  714. {
  715. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  716. }
  717. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  718. uint8_t mode)
  719. {
  720. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  721. }
  722. #if 0
  723. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  724. {
  725. int i, j;
  726. uint8_t set_buf_index[2];
  727. uint8_t av_split;
  728. uint8_t buf_size;
  729. uint8_t buf[48];
  730. uint8_t *pos;
  731. intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  732. for (i = 0; i <= av_split; i++) {
  733. set_buf_index[0] = i; set_buf_index[1] = 0;
  734. intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  735. set_buf_index, 2);
  736. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  737. intel_sdvo_read_response(encoder, &buf_size, 1);
  738. pos = buf;
  739. for (j = 0; j <= buf_size; j += 8) {
  740. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  741. NULL, 0);
  742. intel_sdvo_read_response(encoder, pos, 8);
  743. pos += 8;
  744. }
  745. }
  746. }
  747. #endif
  748. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
  749. {
  750. struct dip_infoframe avi_if = {
  751. .type = DIP_TYPE_AVI,
  752. .ver = DIP_VERSION_AVI,
  753. .len = DIP_LEN_AVI,
  754. };
  755. uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
  756. uint8_t set_buf_index[2] = { 1, 0 };
  757. uint64_t *data = (uint64_t *)&avi_if;
  758. unsigned i;
  759. intel_dip_infoframe_csum(&avi_if);
  760. if (!intel_sdvo_set_value(intel_sdvo,
  761. SDVO_CMD_SET_HBUF_INDEX,
  762. set_buf_index, 2))
  763. return false;
  764. for (i = 0; i < sizeof(avi_if); i += 8) {
  765. if (!intel_sdvo_set_value(intel_sdvo,
  766. SDVO_CMD_SET_HBUF_DATA,
  767. data, 8))
  768. return false;
  769. data++;
  770. }
  771. return intel_sdvo_set_value(intel_sdvo,
  772. SDVO_CMD_SET_HBUF_TXRATE,
  773. &tx_rate, 1);
  774. }
  775. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  776. {
  777. struct intel_sdvo_tv_format format;
  778. uint32_t format_map;
  779. format_map = 1 << intel_sdvo->tv_format_index;
  780. memset(&format, 0, sizeof(format));
  781. memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  782. BUILD_BUG_ON(sizeof(format) != 6);
  783. return intel_sdvo_set_value(intel_sdvo,
  784. SDVO_CMD_SET_TV_FORMAT,
  785. &format, sizeof(format));
  786. }
  787. static bool
  788. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  789. struct drm_display_mode *mode)
  790. {
  791. struct intel_sdvo_dtd output_dtd;
  792. if (!intel_sdvo_set_target_output(intel_sdvo,
  793. intel_sdvo->attached_output))
  794. return false;
  795. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  796. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  797. return false;
  798. return true;
  799. }
  800. static bool
  801. intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
  802. struct drm_display_mode *mode,
  803. struct drm_display_mode *adjusted_mode)
  804. {
  805. /* Reset the input timing to the screen. Assume always input 0. */
  806. if (!intel_sdvo_set_target_input(intel_sdvo))
  807. return false;
  808. if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  809. mode->clock / 10,
  810. mode->hdisplay,
  811. mode->vdisplay))
  812. return false;
  813. if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  814. &intel_sdvo->input_dtd))
  815. return false;
  816. intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
  817. drm_mode_set_crtcinfo(adjusted_mode, 0);
  818. return true;
  819. }
  820. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  821. struct drm_display_mode *mode,
  822. struct drm_display_mode *adjusted_mode)
  823. {
  824. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  825. int multiplier;
  826. /* We need to construct preferred input timings based on our
  827. * output timings. To do that, we have to set the output
  828. * timings, even though this isn't really the right place in
  829. * the sequence to do it. Oh well.
  830. */
  831. if (intel_sdvo->is_tv) {
  832. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  833. return false;
  834. (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  835. mode,
  836. adjusted_mode);
  837. } else if (intel_sdvo->is_lvds) {
  838. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  839. intel_sdvo->sdvo_lvds_fixed_mode))
  840. return false;
  841. (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  842. mode,
  843. adjusted_mode);
  844. }
  845. /* Make the CRTC code factor in the SDVO pixel multiplier. The
  846. * SDVO device will factor out the multiplier during mode_set.
  847. */
  848. multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  849. intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  850. return true;
  851. }
  852. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  853. struct drm_display_mode *mode,
  854. struct drm_display_mode *adjusted_mode)
  855. {
  856. struct drm_device *dev = encoder->dev;
  857. struct drm_i915_private *dev_priv = dev->dev_private;
  858. struct drm_crtc *crtc = encoder->crtc;
  859. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  860. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  861. u32 sdvox;
  862. struct intel_sdvo_in_out_map in_out;
  863. struct intel_sdvo_dtd input_dtd, output_dtd;
  864. int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  865. int rate;
  866. if (!mode)
  867. return;
  868. /* First, set the input mapping for the first input to our controlled
  869. * output. This is only correct if we're a single-input device, in
  870. * which case the first input is the output from the appropriate SDVO
  871. * channel on the motherboard. In a two-input device, the first input
  872. * will be SDVOB and the second SDVOC.
  873. */
  874. in_out.in0 = intel_sdvo->attached_output;
  875. in_out.in1 = 0;
  876. intel_sdvo_set_value(intel_sdvo,
  877. SDVO_CMD_SET_IN_OUT_MAP,
  878. &in_out, sizeof(in_out));
  879. /* Set the output timings to the screen */
  880. if (!intel_sdvo_set_target_output(intel_sdvo,
  881. intel_sdvo->attached_output))
  882. return;
  883. /* lvds has a special fixed output timing. */
  884. if (intel_sdvo->is_lvds)
  885. intel_sdvo_get_dtd_from_mode(&output_dtd,
  886. intel_sdvo->sdvo_lvds_fixed_mode);
  887. else
  888. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  889. (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
  890. /* Set the input timing to the screen. Assume always input 0. */
  891. if (!intel_sdvo_set_target_input(intel_sdvo))
  892. return;
  893. if (intel_sdvo->has_hdmi_monitor) {
  894. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  895. intel_sdvo_set_colorimetry(intel_sdvo,
  896. SDVO_COLORIMETRY_RGB256);
  897. intel_sdvo_set_avi_infoframe(intel_sdvo);
  898. } else
  899. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  900. if (intel_sdvo->is_tv &&
  901. !intel_sdvo_set_tv_format(intel_sdvo))
  902. return;
  903. /* We have tried to get input timing in mode_fixup, and filled into
  904. * adjusted_mode.
  905. */
  906. intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  907. (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
  908. switch (pixel_multiplier) {
  909. default:
  910. case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  911. case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  912. case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  913. }
  914. if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  915. return;
  916. /* Set the SDVO control regs. */
  917. if (INTEL_INFO(dev)->gen >= 4) {
  918. /* The real mode polarity is set by the SDVO commands, using
  919. * struct intel_sdvo_dtd. */
  920. sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
  921. if (intel_sdvo->is_hdmi)
  922. sdvox |= intel_sdvo->color_range;
  923. if (INTEL_INFO(dev)->gen < 5)
  924. sdvox |= SDVO_BORDER_ENABLE;
  925. } else {
  926. sdvox = I915_READ(intel_sdvo->sdvo_reg);
  927. switch (intel_sdvo->sdvo_reg) {
  928. case SDVOB:
  929. sdvox &= SDVOB_PRESERVE_MASK;
  930. break;
  931. case SDVOC:
  932. sdvox &= SDVOC_PRESERVE_MASK;
  933. break;
  934. }
  935. sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  936. }
  937. if (intel_crtc->pipe == 1)
  938. sdvox |= SDVO_PIPE_B_SELECT;
  939. if (intel_sdvo->has_hdmi_audio)
  940. sdvox |= SDVO_AUDIO_ENABLE;
  941. if (INTEL_INFO(dev)->gen >= 4) {
  942. /* done in crtc_mode_set as the dpll_md reg must be written early */
  943. } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  944. /* done in crtc_mode_set as it lives inside the dpll register */
  945. } else {
  946. sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  947. }
  948. if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  949. INTEL_INFO(dev)->gen < 5)
  950. sdvox |= SDVO_STALL_SELECT;
  951. intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  952. }
  953. static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
  954. {
  955. struct drm_device *dev = encoder->dev;
  956. struct drm_i915_private *dev_priv = dev->dev_private;
  957. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  958. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  959. u32 temp;
  960. if (mode != DRM_MODE_DPMS_ON) {
  961. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  962. if (0)
  963. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  964. if (mode == DRM_MODE_DPMS_OFF) {
  965. temp = I915_READ(intel_sdvo->sdvo_reg);
  966. if ((temp & SDVO_ENABLE) != 0) {
  967. intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  968. }
  969. }
  970. } else {
  971. bool input1, input2;
  972. int i;
  973. u8 status;
  974. temp = I915_READ(intel_sdvo->sdvo_reg);
  975. if ((temp & SDVO_ENABLE) == 0)
  976. intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  977. for (i = 0; i < 2; i++)
  978. intel_wait_for_vblank(dev, intel_crtc->pipe);
  979. status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  980. /* Warn if the device reported failure to sync.
  981. * A lot of SDVO devices fail to notify of sync, but it's
  982. * a given it the status is a success, we succeeded.
  983. */
  984. if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  985. DRM_DEBUG_KMS("First %s output reported failure to "
  986. "sync\n", SDVO_NAME(intel_sdvo));
  987. }
  988. if (0)
  989. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  990. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  991. }
  992. return;
  993. }
  994. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  995. struct drm_display_mode *mode)
  996. {
  997. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  998. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  999. return MODE_NO_DBLESCAN;
  1000. if (intel_sdvo->pixel_clock_min > mode->clock)
  1001. return MODE_CLOCK_LOW;
  1002. if (intel_sdvo->pixel_clock_max < mode->clock)
  1003. return MODE_CLOCK_HIGH;
  1004. if (intel_sdvo->is_lvds) {
  1005. if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  1006. return MODE_PANEL;
  1007. if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1008. return MODE_PANEL;
  1009. }
  1010. return MODE_OK;
  1011. }
  1012. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1013. {
  1014. BUILD_BUG_ON(sizeof(*caps) != 8);
  1015. if (!intel_sdvo_get_value(intel_sdvo,
  1016. SDVO_CMD_GET_DEVICE_CAPS,
  1017. caps, sizeof(*caps)))
  1018. return false;
  1019. DRM_DEBUG_KMS("SDVO capabilities:\n"
  1020. " vendor_id: %d\n"
  1021. " device_id: %d\n"
  1022. " device_rev_id: %d\n"
  1023. " sdvo_version_major: %d\n"
  1024. " sdvo_version_minor: %d\n"
  1025. " sdvo_inputs_mask: %d\n"
  1026. " smooth_scaling: %d\n"
  1027. " sharp_scaling: %d\n"
  1028. " up_scaling: %d\n"
  1029. " down_scaling: %d\n"
  1030. " stall_support: %d\n"
  1031. " output_flags: %d\n",
  1032. caps->vendor_id,
  1033. caps->device_id,
  1034. caps->device_rev_id,
  1035. caps->sdvo_version_major,
  1036. caps->sdvo_version_minor,
  1037. caps->sdvo_inputs_mask,
  1038. caps->smooth_scaling,
  1039. caps->sharp_scaling,
  1040. caps->up_scaling,
  1041. caps->down_scaling,
  1042. caps->stall_support,
  1043. caps->output_flags);
  1044. return true;
  1045. }
  1046. /* No use! */
  1047. #if 0
  1048. struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
  1049. {
  1050. struct drm_connector *connector = NULL;
  1051. struct intel_sdvo *iout = NULL;
  1052. struct intel_sdvo *sdvo;
  1053. /* find the sdvo connector */
  1054. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  1055. iout = to_intel_sdvo(connector);
  1056. if (iout->type != INTEL_OUTPUT_SDVO)
  1057. continue;
  1058. sdvo = iout->dev_priv;
  1059. if (sdvo->sdvo_reg == SDVOB && sdvoB)
  1060. return connector;
  1061. if (sdvo->sdvo_reg == SDVOC && !sdvoB)
  1062. return connector;
  1063. }
  1064. return NULL;
  1065. }
  1066. int intel_sdvo_supports_hotplug(struct drm_connector *connector)
  1067. {
  1068. u8 response[2];
  1069. u8 status;
  1070. struct intel_sdvo *intel_sdvo;
  1071. DRM_DEBUG_KMS("\n");
  1072. if (!connector)
  1073. return 0;
  1074. intel_sdvo = to_intel_sdvo(connector);
  1075. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1076. &response, 2) && response[0];
  1077. }
  1078. void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
  1079. {
  1080. u8 response[2];
  1081. u8 status;
  1082. struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
  1083. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
  1084. intel_sdvo_read_response(intel_sdvo, &response, 2);
  1085. if (on) {
  1086. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
  1087. status = intel_sdvo_read_response(intel_sdvo, &response, 2);
  1088. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
  1089. } else {
  1090. response[0] = 0;
  1091. response[1] = 0;
  1092. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
  1093. }
  1094. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
  1095. intel_sdvo_read_response(intel_sdvo, &response, 2);
  1096. }
  1097. #endif
  1098. static bool
  1099. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1100. {
  1101. /* Is there more than one type of output? */
  1102. int caps = intel_sdvo->caps.output_flags & 0xf;
  1103. return caps & -caps;
  1104. }
  1105. static struct edid *
  1106. intel_sdvo_get_edid(struct drm_connector *connector)
  1107. {
  1108. struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1109. return drm_get_edid(connector, &sdvo->ddc);
  1110. }
  1111. /* Mac mini hack -- use the same DDC as the analog connector */
  1112. static struct edid *
  1113. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1114. {
  1115. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1116. return drm_get_edid(connector,
  1117. &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
  1118. }
  1119. enum drm_connector_status
  1120. intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
  1121. {
  1122. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1123. enum drm_connector_status status;
  1124. struct edid *edid;
  1125. edid = intel_sdvo_get_edid(connector);
  1126. if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1127. u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1128. /*
  1129. * Don't use the 1 as the argument of DDC bus switch to get
  1130. * the EDID. It is used for SDVO SPD ROM.
  1131. */
  1132. for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1133. intel_sdvo->ddc_bus = ddc;
  1134. edid = intel_sdvo_get_edid(connector);
  1135. if (edid)
  1136. break;
  1137. }
  1138. /*
  1139. * If we found the EDID on the other bus,
  1140. * assume that is the correct DDC bus.
  1141. */
  1142. if (edid == NULL)
  1143. intel_sdvo->ddc_bus = saved_ddc;
  1144. }
  1145. /*
  1146. * When there is no edid and no monitor is connected with VGA
  1147. * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1148. */
  1149. if (edid == NULL)
  1150. edid = intel_sdvo_get_analog_edid(connector);
  1151. status = connector_status_unknown;
  1152. if (edid != NULL) {
  1153. /* DDC bus is shared, match EDID to connector type */
  1154. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1155. status = connector_status_connected;
  1156. if (intel_sdvo->is_hdmi) {
  1157. intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1158. intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1159. }
  1160. } else
  1161. status = connector_status_disconnected;
  1162. connector->display_info.raw_edid = NULL;
  1163. kfree(edid);
  1164. }
  1165. if (status == connector_status_connected) {
  1166. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1167. if (intel_sdvo_connector->force_audio)
  1168. intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
  1169. }
  1170. return status;
  1171. }
  1172. static enum drm_connector_status
  1173. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1174. {
  1175. uint16_t response;
  1176. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1177. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1178. enum drm_connector_status ret;
  1179. if (!intel_sdvo_write_cmd(intel_sdvo,
  1180. SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
  1181. return connector_status_unknown;
  1182. /* add 30ms delay when the output type might be TV */
  1183. if (intel_sdvo->caps.output_flags &
  1184. (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
  1185. mdelay(30);
  1186. if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
  1187. return connector_status_unknown;
  1188. DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1189. response & 0xff, response >> 8,
  1190. intel_sdvo_connector->output_flag);
  1191. if (response == 0)
  1192. return connector_status_disconnected;
  1193. intel_sdvo->attached_output = response;
  1194. intel_sdvo->has_hdmi_monitor = false;
  1195. intel_sdvo->has_hdmi_audio = false;
  1196. if ((intel_sdvo_connector->output_flag & response) == 0)
  1197. ret = connector_status_disconnected;
  1198. else if (IS_TMDS(intel_sdvo_connector))
  1199. ret = intel_sdvo_hdmi_sink_detect(connector);
  1200. else {
  1201. struct edid *edid;
  1202. /* if we have an edid check it matches the connection */
  1203. edid = intel_sdvo_get_edid(connector);
  1204. if (edid == NULL)
  1205. edid = intel_sdvo_get_analog_edid(connector);
  1206. if (edid != NULL) {
  1207. if (edid->input & DRM_EDID_INPUT_DIGITAL)
  1208. ret = connector_status_disconnected;
  1209. else
  1210. ret = connector_status_connected;
  1211. connector->display_info.raw_edid = NULL;
  1212. kfree(edid);
  1213. } else
  1214. ret = connector_status_connected;
  1215. }
  1216. /* May update encoder flag for like clock for SDVO TV, etc.*/
  1217. if (ret == connector_status_connected) {
  1218. intel_sdvo->is_tv = false;
  1219. intel_sdvo->is_lvds = false;
  1220. intel_sdvo->base.needs_tv_clock = false;
  1221. if (response & SDVO_TV_MASK) {
  1222. intel_sdvo->is_tv = true;
  1223. intel_sdvo->base.needs_tv_clock = true;
  1224. }
  1225. if (response & SDVO_LVDS_MASK)
  1226. intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1227. }
  1228. return ret;
  1229. }
  1230. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1231. {
  1232. struct edid *edid;
  1233. /* set the bus switch and get the modes */
  1234. edid = intel_sdvo_get_edid(connector);
  1235. /*
  1236. * Mac mini hack. On this device, the DVI-I connector shares one DDC
  1237. * link between analog and digital outputs. So, if the regular SDVO
  1238. * DDC fails, check to see if the analog output is disconnected, in
  1239. * which case we'll look there for the digital DDC data.
  1240. */
  1241. if (edid == NULL)
  1242. edid = intel_sdvo_get_analog_edid(connector);
  1243. if (edid != NULL) {
  1244. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1245. bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
  1246. bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector);
  1247. if (connector_is_digital == monitor_is_digital) {
  1248. drm_mode_connector_update_edid_property(connector, edid);
  1249. drm_add_edid_modes(connector, edid);
  1250. }
  1251. connector->display_info.raw_edid = NULL;
  1252. kfree(edid);
  1253. }
  1254. }
  1255. /*
  1256. * Set of SDVO TV modes.
  1257. * Note! This is in reply order (see loop in get_tv_modes).
  1258. * XXX: all 60Hz refresh?
  1259. */
  1260. static const struct drm_display_mode sdvo_tv_modes[] = {
  1261. { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1262. 416, 0, 200, 201, 232, 233, 0,
  1263. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1264. { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1265. 416, 0, 240, 241, 272, 273, 0,
  1266. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1267. { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1268. 496, 0, 300, 301, 332, 333, 0,
  1269. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1270. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1271. 736, 0, 350, 351, 382, 383, 0,
  1272. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1273. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1274. 736, 0, 400, 401, 432, 433, 0,
  1275. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1276. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1277. 736, 0, 480, 481, 512, 513, 0,
  1278. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1279. { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1280. 800, 0, 480, 481, 512, 513, 0,
  1281. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1282. { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1283. 800, 0, 576, 577, 608, 609, 0,
  1284. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1285. { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1286. 816, 0, 350, 351, 382, 383, 0,
  1287. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1288. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1289. 816, 0, 400, 401, 432, 433, 0,
  1290. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1291. { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1292. 816, 0, 480, 481, 512, 513, 0,
  1293. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1294. { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1295. 816, 0, 540, 541, 572, 573, 0,
  1296. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1297. { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1298. 816, 0, 576, 577, 608, 609, 0,
  1299. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1300. { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1301. 864, 0, 576, 577, 608, 609, 0,
  1302. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1303. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1304. 896, 0, 600, 601, 632, 633, 0,
  1305. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1306. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1307. 928, 0, 624, 625, 656, 657, 0,
  1308. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1309. { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1310. 1016, 0, 766, 767, 798, 799, 0,
  1311. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1312. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1313. 1120, 0, 768, 769, 800, 801, 0,
  1314. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1315. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1316. 1376, 0, 1024, 1025, 1056, 1057, 0,
  1317. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1318. };
  1319. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1320. {
  1321. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1322. struct intel_sdvo_sdtv_resolution_request tv_res;
  1323. uint32_t reply = 0, format_map = 0;
  1324. int i;
  1325. /* Read the list of supported input resolutions for the selected TV
  1326. * format.
  1327. */
  1328. format_map = 1 << intel_sdvo->tv_format_index;
  1329. memcpy(&tv_res, &format_map,
  1330. min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1331. if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1332. return;
  1333. BUILD_BUG_ON(sizeof(tv_res) != 3);
  1334. if (!intel_sdvo_write_cmd(intel_sdvo,
  1335. SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1336. &tv_res, sizeof(tv_res)))
  1337. return;
  1338. if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1339. return;
  1340. for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1341. if (reply & (1 << i)) {
  1342. struct drm_display_mode *nmode;
  1343. nmode = drm_mode_duplicate(connector->dev,
  1344. &sdvo_tv_modes[i]);
  1345. if (nmode)
  1346. drm_mode_probed_add(connector, nmode);
  1347. }
  1348. }
  1349. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1350. {
  1351. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1352. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1353. struct drm_display_mode *newmode;
  1354. /*
  1355. * Attempt to get the mode list from DDC.
  1356. * Assume that the preferred modes are
  1357. * arranged in priority order.
  1358. */
  1359. intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1360. if (list_empty(&connector->probed_modes) == false)
  1361. goto end;
  1362. /* Fetch modes from VBT */
  1363. if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1364. newmode = drm_mode_duplicate(connector->dev,
  1365. dev_priv->sdvo_lvds_vbt_mode);
  1366. if (newmode != NULL) {
  1367. /* Guarantee the mode is preferred */
  1368. newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1369. DRM_MODE_TYPE_DRIVER);
  1370. drm_mode_probed_add(connector, newmode);
  1371. }
  1372. }
  1373. end:
  1374. list_for_each_entry(newmode, &connector->probed_modes, head) {
  1375. if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1376. intel_sdvo->sdvo_lvds_fixed_mode =
  1377. drm_mode_duplicate(connector->dev, newmode);
  1378. drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
  1379. 0);
  1380. intel_sdvo->is_lvds = true;
  1381. break;
  1382. }
  1383. }
  1384. }
  1385. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1386. {
  1387. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1388. if (IS_TV(intel_sdvo_connector))
  1389. intel_sdvo_get_tv_modes(connector);
  1390. else if (IS_LVDS(intel_sdvo_connector))
  1391. intel_sdvo_get_lvds_modes(connector);
  1392. else
  1393. intel_sdvo_get_ddc_modes(connector);
  1394. return !list_empty(&connector->probed_modes);
  1395. }
  1396. static void
  1397. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1398. {
  1399. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1400. struct drm_device *dev = connector->dev;
  1401. if (intel_sdvo_connector->left)
  1402. drm_property_destroy(dev, intel_sdvo_connector->left);
  1403. if (intel_sdvo_connector->right)
  1404. drm_property_destroy(dev, intel_sdvo_connector->right);
  1405. if (intel_sdvo_connector->top)
  1406. drm_property_destroy(dev, intel_sdvo_connector->top);
  1407. if (intel_sdvo_connector->bottom)
  1408. drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1409. if (intel_sdvo_connector->hpos)
  1410. drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1411. if (intel_sdvo_connector->vpos)
  1412. drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1413. if (intel_sdvo_connector->saturation)
  1414. drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1415. if (intel_sdvo_connector->contrast)
  1416. drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1417. if (intel_sdvo_connector->hue)
  1418. drm_property_destroy(dev, intel_sdvo_connector->hue);
  1419. if (intel_sdvo_connector->sharpness)
  1420. drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1421. if (intel_sdvo_connector->flicker_filter)
  1422. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1423. if (intel_sdvo_connector->flicker_filter_2d)
  1424. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1425. if (intel_sdvo_connector->flicker_filter_adaptive)
  1426. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1427. if (intel_sdvo_connector->tv_luma_filter)
  1428. drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1429. if (intel_sdvo_connector->tv_chroma_filter)
  1430. drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1431. if (intel_sdvo_connector->dot_crawl)
  1432. drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1433. if (intel_sdvo_connector->brightness)
  1434. drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1435. }
  1436. static void intel_sdvo_destroy(struct drm_connector *connector)
  1437. {
  1438. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1439. if (intel_sdvo_connector->tv_format)
  1440. drm_property_destroy(connector->dev,
  1441. intel_sdvo_connector->tv_format);
  1442. intel_sdvo_destroy_enhance_property(connector);
  1443. drm_sysfs_connector_remove(connector);
  1444. drm_connector_cleanup(connector);
  1445. kfree(connector);
  1446. }
  1447. static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
  1448. {
  1449. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1450. struct edid *edid;
  1451. bool has_audio = false;
  1452. if (!intel_sdvo->is_hdmi)
  1453. return false;
  1454. edid = intel_sdvo_get_edid(connector);
  1455. if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
  1456. has_audio = drm_detect_monitor_audio(edid);
  1457. return has_audio;
  1458. }
  1459. static int
  1460. intel_sdvo_set_property(struct drm_connector *connector,
  1461. struct drm_property *property,
  1462. uint64_t val)
  1463. {
  1464. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1465. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1466. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1467. uint16_t temp_value;
  1468. uint8_t cmd;
  1469. int ret;
  1470. ret = drm_connector_property_set_value(connector, property, val);
  1471. if (ret)
  1472. return ret;
  1473. if (property == dev_priv->force_audio_property) {
  1474. int i = val;
  1475. bool has_audio;
  1476. if (i == intel_sdvo_connector->force_audio)
  1477. return 0;
  1478. intel_sdvo_connector->force_audio = i;
  1479. if (i == 0)
  1480. has_audio = intel_sdvo_detect_hdmi_audio(connector);
  1481. else
  1482. has_audio = i > 0;
  1483. if (has_audio == intel_sdvo->has_hdmi_audio)
  1484. return 0;
  1485. intel_sdvo->has_hdmi_audio = has_audio;
  1486. goto done;
  1487. }
  1488. if (property == dev_priv->broadcast_rgb_property) {
  1489. if (val == !!intel_sdvo->color_range)
  1490. return 0;
  1491. intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
  1492. goto done;
  1493. }
  1494. #define CHECK_PROPERTY(name, NAME) \
  1495. if (intel_sdvo_connector->name == property) { \
  1496. if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1497. if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1498. cmd = SDVO_CMD_SET_##NAME; \
  1499. intel_sdvo_connector->cur_##name = temp_value; \
  1500. goto set_value; \
  1501. }
  1502. if (property == intel_sdvo_connector->tv_format) {
  1503. if (val >= TV_FORMAT_NUM)
  1504. return -EINVAL;
  1505. if (intel_sdvo->tv_format_index ==
  1506. intel_sdvo_connector->tv_format_supported[val])
  1507. return 0;
  1508. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1509. goto done;
  1510. } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1511. temp_value = val;
  1512. if (intel_sdvo_connector->left == property) {
  1513. drm_connector_property_set_value(connector,
  1514. intel_sdvo_connector->right, val);
  1515. if (intel_sdvo_connector->left_margin == temp_value)
  1516. return 0;
  1517. intel_sdvo_connector->left_margin = temp_value;
  1518. intel_sdvo_connector->right_margin = temp_value;
  1519. temp_value = intel_sdvo_connector->max_hscan -
  1520. intel_sdvo_connector->left_margin;
  1521. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1522. goto set_value;
  1523. } else if (intel_sdvo_connector->right == property) {
  1524. drm_connector_property_set_value(connector,
  1525. intel_sdvo_connector->left, val);
  1526. if (intel_sdvo_connector->right_margin == temp_value)
  1527. return 0;
  1528. intel_sdvo_connector->left_margin = temp_value;
  1529. intel_sdvo_connector->right_margin = temp_value;
  1530. temp_value = intel_sdvo_connector->max_hscan -
  1531. intel_sdvo_connector->left_margin;
  1532. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1533. goto set_value;
  1534. } else if (intel_sdvo_connector->top == property) {
  1535. drm_connector_property_set_value(connector,
  1536. intel_sdvo_connector->bottom, val);
  1537. if (intel_sdvo_connector->top_margin == temp_value)
  1538. return 0;
  1539. intel_sdvo_connector->top_margin = temp_value;
  1540. intel_sdvo_connector->bottom_margin = temp_value;
  1541. temp_value = intel_sdvo_connector->max_vscan -
  1542. intel_sdvo_connector->top_margin;
  1543. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1544. goto set_value;
  1545. } else if (intel_sdvo_connector->bottom == property) {
  1546. drm_connector_property_set_value(connector,
  1547. intel_sdvo_connector->top, val);
  1548. if (intel_sdvo_connector->bottom_margin == temp_value)
  1549. return 0;
  1550. intel_sdvo_connector->top_margin = temp_value;
  1551. intel_sdvo_connector->bottom_margin = temp_value;
  1552. temp_value = intel_sdvo_connector->max_vscan -
  1553. intel_sdvo_connector->top_margin;
  1554. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1555. goto set_value;
  1556. }
  1557. CHECK_PROPERTY(hpos, HPOS)
  1558. CHECK_PROPERTY(vpos, VPOS)
  1559. CHECK_PROPERTY(saturation, SATURATION)
  1560. CHECK_PROPERTY(contrast, CONTRAST)
  1561. CHECK_PROPERTY(hue, HUE)
  1562. CHECK_PROPERTY(brightness, BRIGHTNESS)
  1563. CHECK_PROPERTY(sharpness, SHARPNESS)
  1564. CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  1565. CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  1566. CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  1567. CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  1568. CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  1569. CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  1570. }
  1571. return -EINVAL; /* unknown property */
  1572. set_value:
  1573. if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  1574. return -EIO;
  1575. done:
  1576. if (intel_sdvo->base.base.crtc) {
  1577. struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1578. drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
  1579. crtc->y, crtc->fb);
  1580. }
  1581. return 0;
  1582. #undef CHECK_PROPERTY
  1583. }
  1584. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  1585. .dpms = intel_sdvo_dpms,
  1586. .mode_fixup = intel_sdvo_mode_fixup,
  1587. .prepare = intel_encoder_prepare,
  1588. .mode_set = intel_sdvo_mode_set,
  1589. .commit = intel_encoder_commit,
  1590. };
  1591. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  1592. .dpms = drm_helper_connector_dpms,
  1593. .detect = intel_sdvo_detect,
  1594. .fill_modes = drm_helper_probe_single_connector_modes,
  1595. .set_property = intel_sdvo_set_property,
  1596. .destroy = intel_sdvo_destroy,
  1597. };
  1598. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  1599. .get_modes = intel_sdvo_get_modes,
  1600. .mode_valid = intel_sdvo_mode_valid,
  1601. .best_encoder = intel_best_encoder,
  1602. };
  1603. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  1604. {
  1605. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1606. if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  1607. drm_mode_destroy(encoder->dev,
  1608. intel_sdvo->sdvo_lvds_fixed_mode);
  1609. i2c_del_adapter(&intel_sdvo->ddc);
  1610. intel_encoder_destroy(encoder);
  1611. }
  1612. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  1613. .destroy = intel_sdvo_enc_destroy,
  1614. };
  1615. static void
  1616. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  1617. {
  1618. uint16_t mask = 0;
  1619. unsigned int num_bits;
  1620. /* Make a mask of outputs less than or equal to our own priority in the
  1621. * list.
  1622. */
  1623. switch (sdvo->controlled_output) {
  1624. case SDVO_OUTPUT_LVDS1:
  1625. mask |= SDVO_OUTPUT_LVDS1;
  1626. case SDVO_OUTPUT_LVDS0:
  1627. mask |= SDVO_OUTPUT_LVDS0;
  1628. case SDVO_OUTPUT_TMDS1:
  1629. mask |= SDVO_OUTPUT_TMDS1;
  1630. case SDVO_OUTPUT_TMDS0:
  1631. mask |= SDVO_OUTPUT_TMDS0;
  1632. case SDVO_OUTPUT_RGB1:
  1633. mask |= SDVO_OUTPUT_RGB1;
  1634. case SDVO_OUTPUT_RGB0:
  1635. mask |= SDVO_OUTPUT_RGB0;
  1636. break;
  1637. }
  1638. /* Count bits to find what number we are in the priority list. */
  1639. mask &= sdvo->caps.output_flags;
  1640. num_bits = hweight16(mask);
  1641. /* If more than 3 outputs, default to DDC bus 3 for now. */
  1642. if (num_bits > 3)
  1643. num_bits = 3;
  1644. /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  1645. sdvo->ddc_bus = 1 << num_bits;
  1646. }
  1647. /**
  1648. * Choose the appropriate DDC bus for control bus switch command for this
  1649. * SDVO output based on the controlled output.
  1650. *
  1651. * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  1652. * outputs, then LVDS outputs.
  1653. */
  1654. static void
  1655. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  1656. struct intel_sdvo *sdvo, u32 reg)
  1657. {
  1658. struct sdvo_device_mapping *mapping;
  1659. if (IS_SDVOB(reg))
  1660. mapping = &(dev_priv->sdvo_mappings[0]);
  1661. else
  1662. mapping = &(dev_priv->sdvo_mappings[1]);
  1663. if (mapping->initialized)
  1664. sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  1665. else
  1666. intel_sdvo_guess_ddc_bus(sdvo);
  1667. }
  1668. static void
  1669. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  1670. struct intel_sdvo *sdvo, u32 reg)
  1671. {
  1672. struct sdvo_device_mapping *mapping;
  1673. u8 pin, speed;
  1674. if (IS_SDVOB(reg))
  1675. mapping = &dev_priv->sdvo_mappings[0];
  1676. else
  1677. mapping = &dev_priv->sdvo_mappings[1];
  1678. pin = GMBUS_PORT_DPB;
  1679. speed = GMBUS_RATE_1MHZ >> 8;
  1680. if (mapping->initialized) {
  1681. pin = mapping->i2c_pin;
  1682. speed = mapping->i2c_speed;
  1683. }
  1684. if (pin < GMBUS_NUM_PORTS) {
  1685. sdvo->i2c = &dev_priv->gmbus[pin].adapter;
  1686. intel_gmbus_set_speed(sdvo->i2c, speed);
  1687. intel_gmbus_force_bit(sdvo->i2c, true);
  1688. } else
  1689. sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
  1690. }
  1691. static bool
  1692. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  1693. {
  1694. return intel_sdvo_check_supp_encode(intel_sdvo);
  1695. }
  1696. static u8
  1697. intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
  1698. {
  1699. struct drm_i915_private *dev_priv = dev->dev_private;
  1700. struct sdvo_device_mapping *my_mapping, *other_mapping;
  1701. if (IS_SDVOB(sdvo_reg)) {
  1702. my_mapping = &dev_priv->sdvo_mappings[0];
  1703. other_mapping = &dev_priv->sdvo_mappings[1];
  1704. } else {
  1705. my_mapping = &dev_priv->sdvo_mappings[1];
  1706. other_mapping = &dev_priv->sdvo_mappings[0];
  1707. }
  1708. /* If the BIOS described our SDVO device, take advantage of it. */
  1709. if (my_mapping->slave_addr)
  1710. return my_mapping->slave_addr;
  1711. /* If the BIOS only described a different SDVO device, use the
  1712. * address that it isn't using.
  1713. */
  1714. if (other_mapping->slave_addr) {
  1715. if (other_mapping->slave_addr == 0x70)
  1716. return 0x72;
  1717. else
  1718. return 0x70;
  1719. }
  1720. /* No SDVO device info is found for another DVO port,
  1721. * so use mapping assumption we had before BIOS parsing.
  1722. */
  1723. if (IS_SDVOB(sdvo_reg))
  1724. return 0x70;
  1725. else
  1726. return 0x72;
  1727. }
  1728. static void
  1729. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  1730. struct intel_sdvo *encoder)
  1731. {
  1732. drm_connector_init(encoder->base.base.dev,
  1733. &connector->base.base,
  1734. &intel_sdvo_connector_funcs,
  1735. connector->base.base.connector_type);
  1736. drm_connector_helper_add(&connector->base.base,
  1737. &intel_sdvo_connector_helper_funcs);
  1738. connector->base.base.interlace_allowed = 0;
  1739. connector->base.base.doublescan_allowed = 0;
  1740. connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  1741. intel_connector_attach_encoder(&connector->base, &encoder->base);
  1742. drm_sysfs_connector_add(&connector->base.base);
  1743. }
  1744. static void
  1745. intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
  1746. {
  1747. struct drm_device *dev = connector->base.base.dev;
  1748. intel_attach_force_audio_property(&connector->base.base);
  1749. if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
  1750. intel_attach_broadcast_rgb_property(&connector->base.base);
  1751. }
  1752. static bool
  1753. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  1754. {
  1755. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1756. struct drm_connector *connector;
  1757. struct intel_connector *intel_connector;
  1758. struct intel_sdvo_connector *intel_sdvo_connector;
  1759. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1760. if (!intel_sdvo_connector)
  1761. return false;
  1762. if (device == 0) {
  1763. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  1764. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  1765. } else if (device == 1) {
  1766. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  1767. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  1768. }
  1769. intel_connector = &intel_sdvo_connector->base;
  1770. connector = &intel_connector->base;
  1771. connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  1772. encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  1773. connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  1774. if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  1775. connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  1776. intel_sdvo->is_hdmi = true;
  1777. }
  1778. intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  1779. (1 << INTEL_ANALOG_CLONE_BIT));
  1780. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1781. if (intel_sdvo->is_hdmi)
  1782. intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
  1783. return true;
  1784. }
  1785. static bool
  1786. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  1787. {
  1788. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1789. struct drm_connector *connector;
  1790. struct intel_connector *intel_connector;
  1791. struct intel_sdvo_connector *intel_sdvo_connector;
  1792. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1793. if (!intel_sdvo_connector)
  1794. return false;
  1795. intel_connector = &intel_sdvo_connector->base;
  1796. connector = &intel_connector->base;
  1797. encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  1798. connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  1799. intel_sdvo->controlled_output |= type;
  1800. intel_sdvo_connector->output_flag = type;
  1801. intel_sdvo->is_tv = true;
  1802. intel_sdvo->base.needs_tv_clock = true;
  1803. intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
  1804. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1805. if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  1806. goto err;
  1807. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1808. goto err;
  1809. return true;
  1810. err:
  1811. intel_sdvo_destroy(connector);
  1812. return false;
  1813. }
  1814. static bool
  1815. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  1816. {
  1817. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1818. struct drm_connector *connector;
  1819. struct intel_connector *intel_connector;
  1820. struct intel_sdvo_connector *intel_sdvo_connector;
  1821. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1822. if (!intel_sdvo_connector)
  1823. return false;
  1824. intel_connector = &intel_sdvo_connector->base;
  1825. connector = &intel_connector->base;
  1826. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  1827. encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  1828. connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  1829. if (device == 0) {
  1830. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  1831. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  1832. } else if (device == 1) {
  1833. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  1834. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  1835. }
  1836. intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  1837. (1 << INTEL_ANALOG_CLONE_BIT));
  1838. intel_sdvo_connector_init(intel_sdvo_connector,
  1839. intel_sdvo);
  1840. return true;
  1841. }
  1842. static bool
  1843. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  1844. {
  1845. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1846. struct drm_connector *connector;
  1847. struct intel_connector *intel_connector;
  1848. struct intel_sdvo_connector *intel_sdvo_connector;
  1849. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1850. if (!intel_sdvo_connector)
  1851. return false;
  1852. intel_connector = &intel_sdvo_connector->base;
  1853. connector = &intel_connector->base;
  1854. encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  1855. connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  1856. if (device == 0) {
  1857. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  1858. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  1859. } else if (device == 1) {
  1860. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  1861. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  1862. }
  1863. intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
  1864. (1 << INTEL_SDVO_LVDS_CLONE_BIT));
  1865. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1866. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1867. goto err;
  1868. return true;
  1869. err:
  1870. intel_sdvo_destroy(connector);
  1871. return false;
  1872. }
  1873. static bool
  1874. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  1875. {
  1876. intel_sdvo->is_tv = false;
  1877. intel_sdvo->base.needs_tv_clock = false;
  1878. intel_sdvo->is_lvds = false;
  1879. /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  1880. if (flags & SDVO_OUTPUT_TMDS0)
  1881. if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  1882. return false;
  1883. if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  1884. if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  1885. return false;
  1886. /* TV has no XXX1 function block */
  1887. if (flags & SDVO_OUTPUT_SVID0)
  1888. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  1889. return false;
  1890. if (flags & SDVO_OUTPUT_CVBS0)
  1891. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  1892. return false;
  1893. if (flags & SDVO_OUTPUT_RGB0)
  1894. if (!intel_sdvo_analog_init(intel_sdvo, 0))
  1895. return false;
  1896. if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  1897. if (!intel_sdvo_analog_init(intel_sdvo, 1))
  1898. return false;
  1899. if (flags & SDVO_OUTPUT_LVDS0)
  1900. if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  1901. return false;
  1902. if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  1903. if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  1904. return false;
  1905. if ((flags & SDVO_OUTPUT_MASK) == 0) {
  1906. unsigned char bytes[2];
  1907. intel_sdvo->controlled_output = 0;
  1908. memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  1909. DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  1910. SDVO_NAME(intel_sdvo),
  1911. bytes[0], bytes[1]);
  1912. return false;
  1913. }
  1914. intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
  1915. return true;
  1916. }
  1917. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  1918. struct intel_sdvo_connector *intel_sdvo_connector,
  1919. int type)
  1920. {
  1921. struct drm_device *dev = intel_sdvo->base.base.dev;
  1922. struct intel_sdvo_tv_format format;
  1923. uint32_t format_map, i;
  1924. if (!intel_sdvo_set_target_output(intel_sdvo, type))
  1925. return false;
  1926. BUILD_BUG_ON(sizeof(format) != 6);
  1927. if (!intel_sdvo_get_value(intel_sdvo,
  1928. SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  1929. &format, sizeof(format)))
  1930. return false;
  1931. memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  1932. if (format_map == 0)
  1933. return false;
  1934. intel_sdvo_connector->format_supported_num = 0;
  1935. for (i = 0 ; i < TV_FORMAT_NUM; i++)
  1936. if (format_map & (1 << i))
  1937. intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  1938. intel_sdvo_connector->tv_format =
  1939. drm_property_create(dev, DRM_MODE_PROP_ENUM,
  1940. "mode", intel_sdvo_connector->format_supported_num);
  1941. if (!intel_sdvo_connector->tv_format)
  1942. return false;
  1943. for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  1944. drm_property_add_enum(
  1945. intel_sdvo_connector->tv_format, i,
  1946. i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  1947. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  1948. drm_connector_attach_property(&intel_sdvo_connector->base.base,
  1949. intel_sdvo_connector->tv_format, 0);
  1950. return true;
  1951. }
  1952. #define ENHANCEMENT(name, NAME) do { \
  1953. if (enhancements.name) { \
  1954. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  1955. !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  1956. return false; \
  1957. intel_sdvo_connector->max_##name = data_value[0]; \
  1958. intel_sdvo_connector->cur_##name = response; \
  1959. intel_sdvo_connector->name = \
  1960. drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
  1961. if (!intel_sdvo_connector->name) return false; \
  1962. intel_sdvo_connector->name->values[0] = 0; \
  1963. intel_sdvo_connector->name->values[1] = data_value[0]; \
  1964. drm_connector_attach_property(connector, \
  1965. intel_sdvo_connector->name, \
  1966. intel_sdvo_connector->cur_##name); \
  1967. DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  1968. data_value[0], data_value[1], response); \
  1969. } \
  1970. } while(0)
  1971. static bool
  1972. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  1973. struct intel_sdvo_connector *intel_sdvo_connector,
  1974. struct intel_sdvo_enhancements_reply enhancements)
  1975. {
  1976. struct drm_device *dev = intel_sdvo->base.base.dev;
  1977. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  1978. uint16_t response, data_value[2];
  1979. /* when horizontal overscan is supported, Add the left/right property */
  1980. if (enhancements.overscan_h) {
  1981. if (!intel_sdvo_get_value(intel_sdvo,
  1982. SDVO_CMD_GET_MAX_OVERSCAN_H,
  1983. &data_value, 4))
  1984. return false;
  1985. if (!intel_sdvo_get_value(intel_sdvo,
  1986. SDVO_CMD_GET_OVERSCAN_H,
  1987. &response, 2))
  1988. return false;
  1989. intel_sdvo_connector->max_hscan = data_value[0];
  1990. intel_sdvo_connector->left_margin = data_value[0] - response;
  1991. intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  1992. intel_sdvo_connector->left =
  1993. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  1994. "left_margin", 2);
  1995. if (!intel_sdvo_connector->left)
  1996. return false;
  1997. intel_sdvo_connector->left->values[0] = 0;
  1998. intel_sdvo_connector->left->values[1] = data_value[0];
  1999. drm_connector_attach_property(connector,
  2000. intel_sdvo_connector->left,
  2001. intel_sdvo_connector->left_margin);
  2002. intel_sdvo_connector->right =
  2003. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  2004. "right_margin", 2);
  2005. if (!intel_sdvo_connector->right)
  2006. return false;
  2007. intel_sdvo_connector->right->values[0] = 0;
  2008. intel_sdvo_connector->right->values[1] = data_value[0];
  2009. drm_connector_attach_property(connector,
  2010. intel_sdvo_connector->right,
  2011. intel_sdvo_connector->right_margin);
  2012. DRM_DEBUG_KMS("h_overscan: max %d, "
  2013. "default %d, current %d\n",
  2014. data_value[0], data_value[1], response);
  2015. }
  2016. if (enhancements.overscan_v) {
  2017. if (!intel_sdvo_get_value(intel_sdvo,
  2018. SDVO_CMD_GET_MAX_OVERSCAN_V,
  2019. &data_value, 4))
  2020. return false;
  2021. if (!intel_sdvo_get_value(intel_sdvo,
  2022. SDVO_CMD_GET_OVERSCAN_V,
  2023. &response, 2))
  2024. return false;
  2025. intel_sdvo_connector->max_vscan = data_value[0];
  2026. intel_sdvo_connector->top_margin = data_value[0] - response;
  2027. intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2028. intel_sdvo_connector->top =
  2029. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  2030. "top_margin", 2);
  2031. if (!intel_sdvo_connector->top)
  2032. return false;
  2033. intel_sdvo_connector->top->values[0] = 0;
  2034. intel_sdvo_connector->top->values[1] = data_value[0];
  2035. drm_connector_attach_property(connector,
  2036. intel_sdvo_connector->top,
  2037. intel_sdvo_connector->top_margin);
  2038. intel_sdvo_connector->bottom =
  2039. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  2040. "bottom_margin", 2);
  2041. if (!intel_sdvo_connector->bottom)
  2042. return false;
  2043. intel_sdvo_connector->bottom->values[0] = 0;
  2044. intel_sdvo_connector->bottom->values[1] = data_value[0];
  2045. drm_connector_attach_property(connector,
  2046. intel_sdvo_connector->bottom,
  2047. intel_sdvo_connector->bottom_margin);
  2048. DRM_DEBUG_KMS("v_overscan: max %d, "
  2049. "default %d, current %d\n",
  2050. data_value[0], data_value[1], response);
  2051. }
  2052. ENHANCEMENT(hpos, HPOS);
  2053. ENHANCEMENT(vpos, VPOS);
  2054. ENHANCEMENT(saturation, SATURATION);
  2055. ENHANCEMENT(contrast, CONTRAST);
  2056. ENHANCEMENT(hue, HUE);
  2057. ENHANCEMENT(sharpness, SHARPNESS);
  2058. ENHANCEMENT(brightness, BRIGHTNESS);
  2059. ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2060. ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2061. ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2062. ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2063. ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2064. if (enhancements.dot_crawl) {
  2065. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2066. return false;
  2067. intel_sdvo_connector->max_dot_crawl = 1;
  2068. intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2069. intel_sdvo_connector->dot_crawl =
  2070. drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
  2071. if (!intel_sdvo_connector->dot_crawl)
  2072. return false;
  2073. intel_sdvo_connector->dot_crawl->values[0] = 0;
  2074. intel_sdvo_connector->dot_crawl->values[1] = 1;
  2075. drm_connector_attach_property(connector,
  2076. intel_sdvo_connector->dot_crawl,
  2077. intel_sdvo_connector->cur_dot_crawl);
  2078. DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2079. }
  2080. return true;
  2081. }
  2082. static bool
  2083. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2084. struct intel_sdvo_connector *intel_sdvo_connector,
  2085. struct intel_sdvo_enhancements_reply enhancements)
  2086. {
  2087. struct drm_device *dev = intel_sdvo->base.base.dev;
  2088. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2089. uint16_t response, data_value[2];
  2090. ENHANCEMENT(brightness, BRIGHTNESS);
  2091. return true;
  2092. }
  2093. #undef ENHANCEMENT
  2094. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2095. struct intel_sdvo_connector *intel_sdvo_connector)
  2096. {
  2097. union {
  2098. struct intel_sdvo_enhancements_reply reply;
  2099. uint16_t response;
  2100. } enhancements;
  2101. BUILD_BUG_ON(sizeof(enhancements) != 2);
  2102. enhancements.response = 0;
  2103. intel_sdvo_get_value(intel_sdvo,
  2104. SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2105. &enhancements, sizeof(enhancements));
  2106. if (enhancements.response == 0) {
  2107. DRM_DEBUG_KMS("No enhancement is supported\n");
  2108. return true;
  2109. }
  2110. if (IS_TV(intel_sdvo_connector))
  2111. return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2112. else if(IS_LVDS(intel_sdvo_connector))
  2113. return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2114. else
  2115. return true;
  2116. }
  2117. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2118. struct i2c_msg *msgs,
  2119. int num)
  2120. {
  2121. struct intel_sdvo *sdvo = adapter->algo_data;
  2122. if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2123. return -EIO;
  2124. return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2125. }
  2126. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2127. {
  2128. struct intel_sdvo *sdvo = adapter->algo_data;
  2129. return sdvo->i2c->algo->functionality(sdvo->i2c);
  2130. }
  2131. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2132. .master_xfer = intel_sdvo_ddc_proxy_xfer,
  2133. .functionality = intel_sdvo_ddc_proxy_func
  2134. };
  2135. static bool
  2136. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2137. struct drm_device *dev)
  2138. {
  2139. sdvo->ddc.owner = THIS_MODULE;
  2140. sdvo->ddc.class = I2C_CLASS_DDC;
  2141. snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2142. sdvo->ddc.dev.parent = &dev->pdev->dev;
  2143. sdvo->ddc.algo_data = sdvo;
  2144. sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2145. return i2c_add_adapter(&sdvo->ddc) == 0;
  2146. }
  2147. bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
  2148. {
  2149. struct drm_i915_private *dev_priv = dev->dev_private;
  2150. struct intel_encoder *intel_encoder;
  2151. struct intel_sdvo *intel_sdvo;
  2152. int i;
  2153. intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2154. if (!intel_sdvo)
  2155. return false;
  2156. intel_sdvo->sdvo_reg = sdvo_reg;
  2157. intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
  2158. intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2159. if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
  2160. kfree(intel_sdvo);
  2161. return false;
  2162. }
  2163. /* encoder type will be decided later */
  2164. intel_encoder = &intel_sdvo->base;
  2165. intel_encoder->type = INTEL_OUTPUT_SDVO;
  2166. drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2167. /* Read the regs to test if we can talk to the device */
  2168. for (i = 0; i < 0x40; i++) {
  2169. u8 byte;
  2170. if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2171. DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
  2172. IS_SDVOB(sdvo_reg) ? 'B' : 'C');
  2173. goto err;
  2174. }
  2175. }
  2176. if (IS_SDVOB(sdvo_reg))
  2177. dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
  2178. else
  2179. dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
  2180. drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2181. /* In default case sdvo lvds is false */
  2182. if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2183. goto err;
  2184. if (intel_sdvo_output_setup(intel_sdvo,
  2185. intel_sdvo->caps.output_flags) != true) {
  2186. DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
  2187. IS_SDVOB(sdvo_reg) ? 'B' : 'C');
  2188. goto err;
  2189. }
  2190. intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2191. /* Set the input timing to the screen. Assume always input 0. */
  2192. if (!intel_sdvo_set_target_input(intel_sdvo))
  2193. goto err;
  2194. if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2195. &intel_sdvo->pixel_clock_min,
  2196. &intel_sdvo->pixel_clock_max))
  2197. goto err;
  2198. DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2199. "clock range %dMHz - %dMHz, "
  2200. "input 1: %c, input 2: %c, "
  2201. "output 1: %c, output 2: %c\n",
  2202. SDVO_NAME(intel_sdvo),
  2203. intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2204. intel_sdvo->caps.device_rev_id,
  2205. intel_sdvo->pixel_clock_min / 1000,
  2206. intel_sdvo->pixel_clock_max / 1000,
  2207. (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2208. (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2209. /* check currently supported outputs */
  2210. intel_sdvo->caps.output_flags &
  2211. (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2212. intel_sdvo->caps.output_flags &
  2213. (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2214. return true;
  2215. err:
  2216. drm_encoder_cleanup(&intel_encoder->base);
  2217. i2c_del_adapter(&intel_sdvo->ddc);
  2218. kfree(intel_sdvo);
  2219. return false;
  2220. }