common.c 17 KB

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  1. /*
  2. * Low-Level PCI Support for PC
  3. *
  4. * (c) 1999--2000 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/pci.h>
  8. #include <linux/ioport.h>
  9. #include <linux/init.h>
  10. #include <linux/dmi.h>
  11. #include <linux/slab.h>
  12. #include <asm/acpi.h>
  13. #include <asm/segment.h>
  14. #include <asm/io.h>
  15. #include <asm/smp.h>
  16. #include <asm/pci_x86.h>
  17. unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
  18. PCI_PROBE_MMCONF;
  19. unsigned int pci_early_dump_regs;
  20. static int pci_bf_sort;
  21. static int smbios_type_b1_flag;
  22. int pci_routeirq;
  23. int noioapicquirk;
  24. #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
  25. int noioapicreroute = 0;
  26. #else
  27. int noioapicreroute = 1;
  28. #endif
  29. int pcibios_last_bus = -1;
  30. unsigned long pirq_table_addr;
  31. struct pci_bus *pci_root_bus;
  32. struct pci_raw_ops *raw_pci_ops;
  33. struct pci_raw_ops *raw_pci_ext_ops;
  34. int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
  35. int reg, int len, u32 *val)
  36. {
  37. if (domain == 0 && reg < 256 && raw_pci_ops)
  38. return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
  39. if (raw_pci_ext_ops)
  40. return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
  41. return -EINVAL;
  42. }
  43. int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
  44. int reg, int len, u32 val)
  45. {
  46. if (domain == 0 && reg < 256 && raw_pci_ops)
  47. return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
  48. if (raw_pci_ext_ops)
  49. return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
  50. return -EINVAL;
  51. }
  52. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
  53. {
  54. return raw_pci_read(pci_domain_nr(bus), bus->number,
  55. devfn, where, size, value);
  56. }
  57. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
  58. {
  59. return raw_pci_write(pci_domain_nr(bus), bus->number,
  60. devfn, where, size, value);
  61. }
  62. struct pci_ops pci_root_ops = {
  63. .read = pci_read,
  64. .write = pci_write,
  65. };
  66. /*
  67. * This interrupt-safe spinlock protects all accesses to PCI
  68. * configuration space.
  69. */
  70. DEFINE_RAW_SPINLOCK(pci_config_lock);
  71. static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
  72. {
  73. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  74. printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
  75. return 0;
  76. }
  77. static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitconst = {
  78. /*
  79. * Systems where PCI IO resource ISA alignment can be skipped
  80. * when the ISA enable bit in the bridge control is not set
  81. */
  82. {
  83. .callback = can_skip_ioresource_align,
  84. .ident = "IBM System x3800",
  85. .matches = {
  86. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  87. DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
  88. },
  89. },
  90. {
  91. .callback = can_skip_ioresource_align,
  92. .ident = "IBM System x3850",
  93. .matches = {
  94. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  95. DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
  96. },
  97. },
  98. {
  99. .callback = can_skip_ioresource_align,
  100. .ident = "IBM System x3950",
  101. .matches = {
  102. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  103. DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
  104. },
  105. },
  106. {}
  107. };
  108. void __init dmi_check_skip_isa_align(void)
  109. {
  110. dmi_check_system(can_skip_pciprobe_dmi_table);
  111. }
  112. static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
  113. {
  114. struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
  115. struct resource *bar_r;
  116. int bar;
  117. if (pci_probe & PCI_NOASSIGN_BARS) {
  118. /*
  119. * If the BIOS did not assign the BAR, zero out the
  120. * resource so the kernel doesn't attmept to assign
  121. * it later on in pci_assign_unassigned_resources
  122. */
  123. for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) {
  124. bar_r = &dev->resource[bar];
  125. if (bar_r->start == 0 && bar_r->end != 0) {
  126. bar_r->flags = 0;
  127. bar_r->end = 0;
  128. }
  129. }
  130. }
  131. if (pci_probe & PCI_NOASSIGN_ROMS) {
  132. if (rom_r->parent)
  133. return;
  134. if (rom_r->start) {
  135. /* we deal with BIOS assigned ROM later */
  136. return;
  137. }
  138. rom_r->start = rom_r->end = rom_r->flags = 0;
  139. }
  140. }
  141. /*
  142. * Called after each bus is probed, but before its children
  143. * are examined.
  144. */
  145. void __devinit pcibios_fixup_bus(struct pci_bus *b)
  146. {
  147. struct pci_dev *dev;
  148. /* root bus? */
  149. if (!b->parent)
  150. x86_pci_root_bus_res_quirks(b);
  151. pci_read_bridge_bases(b);
  152. list_for_each_entry(dev, &b->devices, bus_list)
  153. pcibios_fixup_device_resources(dev);
  154. }
  155. /*
  156. * Only use DMI information to set this if nothing was passed
  157. * on the kernel command line (which was parsed earlier).
  158. */
  159. static int __devinit set_bf_sort(const struct dmi_system_id *d)
  160. {
  161. if (pci_bf_sort == pci_bf_sort_default) {
  162. pci_bf_sort = pci_dmi_bf;
  163. printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
  164. }
  165. return 0;
  166. }
  167. static void __devinit read_dmi_type_b1(const struct dmi_header *dm,
  168. void *private_data)
  169. {
  170. u8 *d = (u8 *)dm + 4;
  171. if (dm->type != 0xB1)
  172. return;
  173. switch (((*(u32 *)d) >> 9) & 0x03) {
  174. case 0x00:
  175. printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n");
  176. break;
  177. case 0x01: /* set pci=bfsort */
  178. smbios_type_b1_flag = 1;
  179. break;
  180. case 0x02: /* do not set pci=bfsort */
  181. smbios_type_b1_flag = 2;
  182. break;
  183. default:
  184. break;
  185. }
  186. }
  187. static int __devinit find_sort_method(const struct dmi_system_id *d)
  188. {
  189. dmi_walk(read_dmi_type_b1, NULL);
  190. if (smbios_type_b1_flag == 1) {
  191. set_bf_sort(d);
  192. return 0;
  193. }
  194. return -1;
  195. }
  196. /*
  197. * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
  198. */
  199. #ifdef __i386__
  200. static int __devinit assign_all_busses(const struct dmi_system_id *d)
  201. {
  202. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  203. printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
  204. " (pci=assign-busses)\n", d->ident);
  205. return 0;
  206. }
  207. #endif
  208. static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {
  209. #ifdef __i386__
  210. /*
  211. * Laptops which need pci=assign-busses to see Cardbus cards
  212. */
  213. {
  214. .callback = assign_all_busses,
  215. .ident = "Samsung X20 Laptop",
  216. .matches = {
  217. DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
  218. DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
  219. },
  220. },
  221. #endif /* __i386__ */
  222. {
  223. .callback = find_sort_method,
  224. .ident = "Dell System",
  225. .matches = {
  226. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
  227. },
  228. },
  229. {
  230. .callback = set_bf_sort,
  231. .ident = "Dell PowerEdge 1950",
  232. .matches = {
  233. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  234. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
  235. },
  236. },
  237. {
  238. .callback = set_bf_sort,
  239. .ident = "Dell PowerEdge 1955",
  240. .matches = {
  241. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  242. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
  243. },
  244. },
  245. {
  246. .callback = set_bf_sort,
  247. .ident = "Dell PowerEdge 2900",
  248. .matches = {
  249. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  250. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
  251. },
  252. },
  253. {
  254. .callback = set_bf_sort,
  255. .ident = "Dell PowerEdge 2950",
  256. .matches = {
  257. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  258. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
  259. },
  260. },
  261. {
  262. .callback = set_bf_sort,
  263. .ident = "Dell PowerEdge R900",
  264. .matches = {
  265. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  266. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
  267. },
  268. },
  269. {
  270. .callback = set_bf_sort,
  271. .ident = "HP ProLiant BL20p G3",
  272. .matches = {
  273. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  274. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
  275. },
  276. },
  277. {
  278. .callback = set_bf_sort,
  279. .ident = "HP ProLiant BL20p G4",
  280. .matches = {
  281. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  282. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
  283. },
  284. },
  285. {
  286. .callback = set_bf_sort,
  287. .ident = "HP ProLiant BL30p G1",
  288. .matches = {
  289. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  290. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
  291. },
  292. },
  293. {
  294. .callback = set_bf_sort,
  295. .ident = "HP ProLiant BL25p G1",
  296. .matches = {
  297. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  298. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
  299. },
  300. },
  301. {
  302. .callback = set_bf_sort,
  303. .ident = "HP ProLiant BL35p G1",
  304. .matches = {
  305. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  306. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
  307. },
  308. },
  309. {
  310. .callback = set_bf_sort,
  311. .ident = "HP ProLiant BL45p G1",
  312. .matches = {
  313. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  314. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
  315. },
  316. },
  317. {
  318. .callback = set_bf_sort,
  319. .ident = "HP ProLiant BL45p G2",
  320. .matches = {
  321. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  322. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
  323. },
  324. },
  325. {
  326. .callback = set_bf_sort,
  327. .ident = "HP ProLiant BL460c G1",
  328. .matches = {
  329. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  330. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
  331. },
  332. },
  333. {
  334. .callback = set_bf_sort,
  335. .ident = "HP ProLiant BL465c G1",
  336. .matches = {
  337. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  338. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
  339. },
  340. },
  341. {
  342. .callback = set_bf_sort,
  343. .ident = "HP ProLiant BL480c G1",
  344. .matches = {
  345. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  346. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
  347. },
  348. },
  349. {
  350. .callback = set_bf_sort,
  351. .ident = "HP ProLiant BL685c G1",
  352. .matches = {
  353. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  354. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
  355. },
  356. },
  357. {
  358. .callback = set_bf_sort,
  359. .ident = "HP ProLiant DL360",
  360. .matches = {
  361. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  362. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
  363. },
  364. },
  365. {
  366. .callback = set_bf_sort,
  367. .ident = "HP ProLiant DL380",
  368. .matches = {
  369. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  370. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
  371. },
  372. },
  373. #ifdef __i386__
  374. {
  375. .callback = assign_all_busses,
  376. .ident = "Compaq EVO N800c",
  377. .matches = {
  378. DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
  379. DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
  380. },
  381. },
  382. #endif
  383. {
  384. .callback = set_bf_sort,
  385. .ident = "HP ProLiant DL385 G2",
  386. .matches = {
  387. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  388. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
  389. },
  390. },
  391. {
  392. .callback = set_bf_sort,
  393. .ident = "HP ProLiant DL585 G2",
  394. .matches = {
  395. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  396. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
  397. },
  398. },
  399. {}
  400. };
  401. void __init dmi_check_pciprobe(void)
  402. {
  403. dmi_check_system(pciprobe_dmi_table);
  404. }
  405. struct pci_bus * __devinit pcibios_scan_root(int busnum)
  406. {
  407. struct pci_bus *bus = NULL;
  408. struct pci_sysdata *sd;
  409. while ((bus = pci_find_next_bus(bus)) != NULL) {
  410. if (bus->number == busnum) {
  411. /* Already scanned */
  412. return bus;
  413. }
  414. }
  415. /* Allocate per-root-bus (not per bus) arch-specific data.
  416. * TODO: leak; this memory is never freed.
  417. * It's arguable whether it's worth the trouble to care.
  418. */
  419. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  420. if (!sd) {
  421. printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
  422. return NULL;
  423. }
  424. sd->node = get_mp_bus_to_node(busnum);
  425. printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
  426. bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
  427. if (!bus)
  428. kfree(sd);
  429. return bus;
  430. }
  431. void __init pcibios_set_cache_line_size(void)
  432. {
  433. struct cpuinfo_x86 *c = &boot_cpu_data;
  434. /*
  435. * Set PCI cacheline size to that of the CPU if the CPU has reported it.
  436. * (For older CPUs that don't support cpuid, we se it to 32 bytes
  437. * It's also good for 386/486s (which actually have 16)
  438. * as quite a few PCI devices do not support smaller values.
  439. */
  440. if (c->x86_clflush_size > 0) {
  441. pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
  442. printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
  443. pci_dfl_cache_line_size << 2);
  444. } else {
  445. pci_dfl_cache_line_size = 32 >> 2;
  446. printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
  447. }
  448. }
  449. int __init pcibios_init(void)
  450. {
  451. if (!raw_pci_ops) {
  452. printk(KERN_WARNING "PCI: System does not support PCI\n");
  453. return 0;
  454. }
  455. pcibios_set_cache_line_size();
  456. pcibios_resource_survey();
  457. if (pci_bf_sort >= pci_force_bf)
  458. pci_sort_breadthfirst();
  459. return 0;
  460. }
  461. char * __devinit pcibios_setup(char *str)
  462. {
  463. if (!strcmp(str, "off")) {
  464. pci_probe = 0;
  465. return NULL;
  466. } else if (!strcmp(str, "bfsort")) {
  467. pci_bf_sort = pci_force_bf;
  468. return NULL;
  469. } else if (!strcmp(str, "nobfsort")) {
  470. pci_bf_sort = pci_force_nobf;
  471. return NULL;
  472. }
  473. #ifdef CONFIG_PCI_BIOS
  474. else if (!strcmp(str, "bios")) {
  475. pci_probe = PCI_PROBE_BIOS;
  476. return NULL;
  477. } else if (!strcmp(str, "nobios")) {
  478. pci_probe &= ~PCI_PROBE_BIOS;
  479. return NULL;
  480. } else if (!strcmp(str, "biosirq")) {
  481. pci_probe |= PCI_BIOS_IRQ_SCAN;
  482. return NULL;
  483. } else if (!strncmp(str, "pirqaddr=", 9)) {
  484. pirq_table_addr = simple_strtoul(str+9, NULL, 0);
  485. return NULL;
  486. }
  487. #endif
  488. #ifdef CONFIG_PCI_DIRECT
  489. else if (!strcmp(str, "conf1")) {
  490. pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
  491. return NULL;
  492. }
  493. else if (!strcmp(str, "conf2")) {
  494. pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
  495. return NULL;
  496. }
  497. #endif
  498. #ifdef CONFIG_PCI_MMCONFIG
  499. else if (!strcmp(str, "nommconf")) {
  500. pci_probe &= ~PCI_PROBE_MMCONF;
  501. return NULL;
  502. }
  503. else if (!strcmp(str, "check_enable_amd_mmconf")) {
  504. pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
  505. return NULL;
  506. }
  507. #endif
  508. else if (!strcmp(str, "noacpi")) {
  509. acpi_noirq_set();
  510. return NULL;
  511. }
  512. else if (!strcmp(str, "noearly")) {
  513. pci_probe |= PCI_PROBE_NOEARLY;
  514. return NULL;
  515. }
  516. #ifndef CONFIG_X86_VISWS
  517. else if (!strcmp(str, "usepirqmask")) {
  518. pci_probe |= PCI_USE_PIRQ_MASK;
  519. return NULL;
  520. } else if (!strncmp(str, "irqmask=", 8)) {
  521. pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
  522. return NULL;
  523. } else if (!strncmp(str, "lastbus=", 8)) {
  524. pcibios_last_bus = simple_strtol(str+8, NULL, 0);
  525. return NULL;
  526. }
  527. #endif
  528. else if (!strcmp(str, "rom")) {
  529. pci_probe |= PCI_ASSIGN_ROMS;
  530. return NULL;
  531. } else if (!strcmp(str, "norom")) {
  532. pci_probe |= PCI_NOASSIGN_ROMS;
  533. return NULL;
  534. } else if (!strcmp(str, "nobar")) {
  535. pci_probe |= PCI_NOASSIGN_BARS;
  536. return NULL;
  537. } else if (!strcmp(str, "assign-busses")) {
  538. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  539. return NULL;
  540. } else if (!strcmp(str, "use_crs")) {
  541. pci_probe |= PCI_USE__CRS;
  542. return NULL;
  543. } else if (!strcmp(str, "nocrs")) {
  544. pci_probe |= PCI_ROOT_NO_CRS;
  545. return NULL;
  546. } else if (!strcmp(str, "earlydump")) {
  547. pci_early_dump_regs = 1;
  548. return NULL;
  549. } else if (!strcmp(str, "routeirq")) {
  550. pci_routeirq = 1;
  551. return NULL;
  552. } else if (!strcmp(str, "skip_isa_align")) {
  553. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  554. return NULL;
  555. } else if (!strcmp(str, "noioapicquirk")) {
  556. noioapicquirk = 1;
  557. return NULL;
  558. } else if (!strcmp(str, "ioapicreroute")) {
  559. if (noioapicreroute != -1)
  560. noioapicreroute = 0;
  561. return NULL;
  562. } else if (!strcmp(str, "noioapicreroute")) {
  563. if (noioapicreroute != -1)
  564. noioapicreroute = 1;
  565. return NULL;
  566. }
  567. return str;
  568. }
  569. unsigned int pcibios_assign_all_busses(void)
  570. {
  571. return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
  572. }
  573. int pcibios_enable_device(struct pci_dev *dev, int mask)
  574. {
  575. int err;
  576. if ((err = pci_enable_resources(dev, mask)) < 0)
  577. return err;
  578. if (!pci_dev_msi_enabled(dev))
  579. return pcibios_enable_irq(dev);
  580. return 0;
  581. }
  582. void pcibios_disable_device (struct pci_dev *dev)
  583. {
  584. if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
  585. pcibios_disable_irq(dev);
  586. }
  587. int pci_ext_cfg_avail(struct pci_dev *dev)
  588. {
  589. if (raw_pci_ext_ops)
  590. return 1;
  591. else
  592. return 0;
  593. }
  594. struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
  595. {
  596. struct pci_bus *bus = NULL;
  597. struct pci_sysdata *sd;
  598. /*
  599. * Allocate per-root-bus (not per bus) arch-specific data.
  600. * TODO: leak; this memory is never freed.
  601. * It's arguable whether it's worth the trouble to care.
  602. */
  603. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  604. if (!sd) {
  605. printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
  606. return NULL;
  607. }
  608. sd->node = node;
  609. bus = pci_scan_bus(busno, ops, sd);
  610. if (!bus)
  611. kfree(sd);
  612. return bus;
  613. }
  614. struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
  615. {
  616. return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
  617. }
  618. /*
  619. * NUMA info for PCI busses
  620. *
  621. * Early arch code is responsible for filling in reasonable values here.
  622. * A node id of "-1" means "use current node". In other words, if a bus
  623. * has a -1 node id, it's not tightly coupled to any particular chunk
  624. * of memory (as is the case on some Nehalem systems).
  625. */
  626. #ifdef CONFIG_NUMA
  627. #define BUS_NR 256
  628. #ifdef CONFIG_X86_64
  629. static int mp_bus_to_node[BUS_NR] = {
  630. [0 ... BUS_NR - 1] = -1
  631. };
  632. void set_mp_bus_to_node(int busnum, int node)
  633. {
  634. if (busnum >= 0 && busnum < BUS_NR)
  635. mp_bus_to_node[busnum] = node;
  636. }
  637. int get_mp_bus_to_node(int busnum)
  638. {
  639. int node = -1;
  640. if (busnum < 0 || busnum > (BUS_NR - 1))
  641. return node;
  642. node = mp_bus_to_node[busnum];
  643. /*
  644. * let numa_node_id to decide it later in dma_alloc_pages
  645. * if there is no ram on that node
  646. */
  647. if (node != -1 && !node_online(node))
  648. node = -1;
  649. return node;
  650. }
  651. #else /* CONFIG_X86_32 */
  652. static int mp_bus_to_node[BUS_NR] = {
  653. [0 ... BUS_NR - 1] = -1
  654. };
  655. void set_mp_bus_to_node(int busnum, int node)
  656. {
  657. if (busnum >= 0 && busnum < BUS_NR)
  658. mp_bus_to_node[busnum] = (unsigned char) node;
  659. }
  660. int get_mp_bus_to_node(int busnum)
  661. {
  662. int node;
  663. if (busnum < 0 || busnum > (BUS_NR - 1))
  664. return 0;
  665. node = mp_bus_to_node[busnum];
  666. return node;
  667. }
  668. #endif /* CONFIG_X86_32 */
  669. #endif /* CONFIG_NUMA */