setup.c 3.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140
  1. /*
  2. * linux/arch/m32r/platforms/m32104ut/setup.c
  3. *
  4. * Setup routines for M32104UT Board
  5. *
  6. * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
  7. * Hitoshi Yamamoto, Mamoru Sakugawa,
  8. * Naoto Sugai, Hayato Fujiwara
  9. */
  10. #include <linux/irq.h>
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <asm/system.h>
  15. #include <asm/m32r.h>
  16. #include <asm/io.h>
  17. #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
  18. icu_data_t icu_data[NR_IRQS];
  19. static void disable_m32104ut_irq(unsigned int irq)
  20. {
  21. unsigned long port, data;
  22. port = irq2port(irq);
  23. data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
  24. outl(data, port);
  25. }
  26. static void enable_m32104ut_irq(unsigned int irq)
  27. {
  28. unsigned long port, data;
  29. port = irq2port(irq);
  30. data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
  31. outl(data, port);
  32. }
  33. static void mask_m32104ut_irq(struct irq_data *data)
  34. {
  35. disable_m32104ut_irq(data->irq);
  36. }
  37. static void unmask_m32104ut_irq(struct irq_data *data)
  38. {
  39. enable_m32104ut_irq(data->irq);
  40. }
  41. static void shutdown_m32104ut_irq(struct irq_data *data)
  42. {
  43. unsigned int irq = data->irq;
  44. unsigned long port = irq2port(irq);
  45. outl(M32R_ICUCR_ILEVEL7, port);
  46. }
  47. static struct irq_chip m32104ut_irq_type =
  48. {
  49. .name = "M32104UT-IRQ",
  50. .irq_shutdown = shutdown_m32104ut_irq,
  51. .irq_unmask = unmask_m32104ut_irq,
  52. .irq_mask = mask_m32104ut_irq,
  53. };
  54. void __init init_IRQ(void)
  55. {
  56. static int once = 0;
  57. if (once)
  58. return;
  59. else
  60. once++;
  61. #if defined(CONFIG_SMC91X)
  62. /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
  63. irq_set_chip_and_handler(M32R_IRQ_INT0, &m32104ut_irq_type,
  64. handle_level_irq);
  65. /* "H" level sense */
  66. cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11;
  67. disable_m32104ut_irq(M32R_IRQ_INT0);
  68. #endif /* CONFIG_SMC91X */
  69. /* MFT2 : system timer */
  70. irq_set_chip_and_handler(M32R_IRQ_MFT2, &m32104ut_irq_type,
  71. handle_level_irq);
  72. icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
  73. disable_m32104ut_irq(M32R_IRQ_MFT2);
  74. #ifdef CONFIG_SERIAL_M32R_SIO
  75. /* SIO0_R : uart receive data */
  76. irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &m32104ut_irq_type,
  77. handle_level_irq);
  78. icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
  79. disable_m32104ut_irq(M32R_IRQ_SIO0_R);
  80. /* SIO0_S : uart send data */
  81. irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &m32104ut_irq_type,
  82. handle_level_irq);
  83. icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
  84. disable_m32104ut_irq(M32R_IRQ_SIO0_S);
  85. #endif /* CONFIG_SERIAL_M32R_SIO */
  86. }
  87. #if defined(CONFIG_SMC91X)
  88. #define LAN_IOSTART 0x300
  89. #define LAN_IOEND 0x320
  90. static struct resource smc91x_resources[] = {
  91. [0] = {
  92. .start = (LAN_IOSTART),
  93. .end = (LAN_IOEND),
  94. .flags = IORESOURCE_MEM,
  95. },
  96. [1] = {
  97. .start = M32R_IRQ_INT0,
  98. .end = M32R_IRQ_INT0,
  99. .flags = IORESOURCE_IRQ,
  100. }
  101. };
  102. static struct platform_device smc91x_device = {
  103. .name = "smc91x",
  104. .id = 0,
  105. .num_resources = ARRAY_SIZE(smc91x_resources),
  106. .resource = smc91x_resources,
  107. };
  108. #endif
  109. static int __init platform_init(void)
  110. {
  111. #if defined(CONFIG_SMC91X)
  112. platform_device_register(&smc91x_device);
  113. #endif
  114. return 0;
  115. }
  116. arch_initcall(platform_init);