ezkit.c 37 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/irq.h>
  16. #include <linux/i2c.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <asm/bfin5xx_spi.h>
  20. #include <asm/dma.h>
  21. #include <asm/gpio.h>
  22. #include <asm/nand.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/bfin_sport.h>
  25. #include <asm/portmux.h>
  26. #include <asm/bfin_sdh.h>
  27. #include <mach/bf54x_keys.h>
  28. #include <linux/input.h>
  29. #include <linux/spi/ad7877.h>
  30. /*
  31. * Name the Board for the /proc/cpuinfo
  32. */
  33. const char bfin_board_name[] = "ADI BF548-EZKIT";
  34. /*
  35. * Driver needs to know address, irq and flag pin.
  36. */
  37. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  38. #include <linux/usb/isp1760.h>
  39. static struct resource bfin_isp1760_resources[] = {
  40. [0] = {
  41. .start = 0x2C0C0000,
  42. .end = 0x2C0C0000 + 0xfffff,
  43. .flags = IORESOURCE_MEM,
  44. },
  45. [1] = {
  46. .start = IRQ_PG7,
  47. .end = IRQ_PG7,
  48. .flags = IORESOURCE_IRQ,
  49. },
  50. };
  51. static struct isp1760_platform_data isp1760_priv = {
  52. .is_isp1761 = 0,
  53. .bus_width_16 = 1,
  54. .port1_otg = 0,
  55. .analog_oc = 0,
  56. .dack_polarity_high = 0,
  57. .dreq_polarity_high = 0,
  58. };
  59. static struct platform_device bfin_isp1760_device = {
  60. .name = "isp1760",
  61. .id = 0,
  62. .dev = {
  63. .platform_data = &isp1760_priv,
  64. },
  65. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  66. .resource = bfin_isp1760_resources,
  67. };
  68. #endif
  69. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  70. #include <mach/bf54x-lq043.h>
  71. static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
  72. .width = 95,
  73. .height = 54,
  74. .xres = {480, 480, 480},
  75. .yres = {272, 272, 272},
  76. .bpp = {24, 24, 24},
  77. .disp = GPIO_PE3,
  78. };
  79. static struct resource bf54x_lq043_resources[] = {
  80. {
  81. .start = IRQ_EPPI0_ERR,
  82. .end = IRQ_EPPI0_ERR,
  83. .flags = IORESOURCE_IRQ,
  84. },
  85. };
  86. static struct platform_device bf54x_lq043_device = {
  87. .name = "bf54x-lq043",
  88. .id = -1,
  89. .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
  90. .resource = bf54x_lq043_resources,
  91. .dev = {
  92. .platform_data = &bf54x_lq043_data,
  93. },
  94. };
  95. #endif
  96. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  97. static const unsigned int bf548_keymap[] = {
  98. KEYVAL(0, 0, KEY_ENTER),
  99. KEYVAL(0, 1, KEY_HELP),
  100. KEYVAL(0, 2, KEY_0),
  101. KEYVAL(0, 3, KEY_BACKSPACE),
  102. KEYVAL(1, 0, KEY_TAB),
  103. KEYVAL(1, 1, KEY_9),
  104. KEYVAL(1, 2, KEY_8),
  105. KEYVAL(1, 3, KEY_7),
  106. KEYVAL(2, 0, KEY_DOWN),
  107. KEYVAL(2, 1, KEY_6),
  108. KEYVAL(2, 2, KEY_5),
  109. KEYVAL(2, 3, KEY_4),
  110. KEYVAL(3, 0, KEY_UP),
  111. KEYVAL(3, 1, KEY_3),
  112. KEYVAL(3, 2, KEY_2),
  113. KEYVAL(3, 3, KEY_1),
  114. };
  115. static struct bfin_kpad_platform_data bf54x_kpad_data = {
  116. .rows = 4,
  117. .cols = 4,
  118. .keymap = bf548_keymap,
  119. .keymapsize = ARRAY_SIZE(bf548_keymap),
  120. .repeat = 0,
  121. .debounce_time = 5000, /* ns (5ms) */
  122. .coldrive_time = 1000, /* ns (1ms) */
  123. .keyup_test_interval = 50, /* ms (50ms) */
  124. };
  125. static struct resource bf54x_kpad_resources[] = {
  126. {
  127. .start = IRQ_KEY,
  128. .end = IRQ_KEY,
  129. .flags = IORESOURCE_IRQ,
  130. },
  131. };
  132. static struct platform_device bf54x_kpad_device = {
  133. .name = "bf54x-keys",
  134. .id = -1,
  135. .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
  136. .resource = bf54x_kpad_resources,
  137. .dev = {
  138. .platform_data = &bf54x_kpad_data,
  139. },
  140. };
  141. #endif
  142. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  143. #include <asm/bfin_rotary.h>
  144. static struct bfin_rotary_platform_data bfin_rotary_data = {
  145. /*.rotary_up_key = KEY_UP,*/
  146. /*.rotary_down_key = KEY_DOWN,*/
  147. .rotary_rel_code = REL_WHEEL,
  148. .rotary_button_key = KEY_ENTER,
  149. .debounce = 10, /* 0..17 */
  150. .mode = ROT_QUAD_ENC | ROT_DEBE,
  151. };
  152. static struct resource bfin_rotary_resources[] = {
  153. {
  154. .start = IRQ_CNT,
  155. .end = IRQ_CNT,
  156. .flags = IORESOURCE_IRQ,
  157. },
  158. };
  159. static struct platform_device bfin_rotary_device = {
  160. .name = "bfin-rotary",
  161. .id = -1,
  162. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  163. .resource = bfin_rotary_resources,
  164. .dev = {
  165. .platform_data = &bfin_rotary_data,
  166. },
  167. };
  168. #endif
  169. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  170. #include <linux/input/adxl34x.h>
  171. static const struct adxl34x_platform_data adxl34x_info = {
  172. .x_axis_offset = 0,
  173. .y_axis_offset = 0,
  174. .z_axis_offset = 0,
  175. .tap_threshold = 0x31,
  176. .tap_duration = 0x10,
  177. .tap_latency = 0x60,
  178. .tap_window = 0xF0,
  179. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  180. .act_axis_control = 0xFF,
  181. .activity_threshold = 5,
  182. .inactivity_threshold = 3,
  183. .inactivity_time = 4,
  184. .free_fall_threshold = 0x7,
  185. .free_fall_time = 0x20,
  186. .data_rate = 0x8,
  187. .data_range = ADXL_FULL_RES,
  188. .ev_type = EV_ABS,
  189. .ev_code_x = ABS_X, /* EV_REL */
  190. .ev_code_y = ABS_Y, /* EV_REL */
  191. .ev_code_z = ABS_Z, /* EV_REL */
  192. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  193. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  194. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  195. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  196. .fifo_mode = ADXL_FIFO_STREAM,
  197. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  198. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  199. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  200. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  201. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  202. };
  203. #endif
  204. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  205. static struct platform_device rtc_device = {
  206. .name = "rtc-bfin",
  207. .id = -1,
  208. };
  209. #endif
  210. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  211. #ifdef CONFIG_SERIAL_BFIN_UART0
  212. static struct resource bfin_uart0_resources[] = {
  213. {
  214. .start = UART0_DLL,
  215. .end = UART0_RBR+2,
  216. .flags = IORESOURCE_MEM,
  217. },
  218. {
  219. .start = IRQ_UART0_RX,
  220. .end = IRQ_UART0_RX+1,
  221. .flags = IORESOURCE_IRQ,
  222. },
  223. {
  224. .start = IRQ_UART0_ERROR,
  225. .end = IRQ_UART0_ERROR,
  226. .flags = IORESOURCE_IRQ,
  227. },
  228. {
  229. .start = CH_UART0_TX,
  230. .end = CH_UART0_TX,
  231. .flags = IORESOURCE_DMA,
  232. },
  233. {
  234. .start = CH_UART0_RX,
  235. .end = CH_UART0_RX,
  236. .flags = IORESOURCE_DMA,
  237. },
  238. };
  239. static unsigned short bfin_uart0_peripherals[] = {
  240. P_UART0_TX, P_UART0_RX, 0
  241. };
  242. static struct platform_device bfin_uart0_device = {
  243. .name = "bfin-uart",
  244. .id = 0,
  245. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  246. .resource = bfin_uart0_resources,
  247. .dev = {
  248. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  249. },
  250. };
  251. #endif
  252. #ifdef CONFIG_SERIAL_BFIN_UART1
  253. static struct resource bfin_uart1_resources[] = {
  254. {
  255. .start = UART1_DLL,
  256. .end = UART1_RBR+2,
  257. .flags = IORESOURCE_MEM,
  258. },
  259. {
  260. .start = IRQ_UART1_RX,
  261. .end = IRQ_UART1_RX+1,
  262. .flags = IORESOURCE_IRQ,
  263. },
  264. {
  265. .start = IRQ_UART1_ERROR,
  266. .end = IRQ_UART1_ERROR,
  267. .flags = IORESOURCE_IRQ,
  268. },
  269. {
  270. .start = CH_UART1_TX,
  271. .end = CH_UART1_TX,
  272. .flags = IORESOURCE_DMA,
  273. },
  274. {
  275. .start = CH_UART1_RX,
  276. .end = CH_UART1_RX,
  277. .flags = IORESOURCE_DMA,
  278. },
  279. #ifdef CONFIG_BFIN_UART1_CTSRTS
  280. { /* CTS pin -- 0 means not supported */
  281. .start = GPIO_PE10,
  282. .end = GPIO_PE10,
  283. .flags = IORESOURCE_IO,
  284. },
  285. { /* RTS pin -- 0 means not supported */
  286. .start = GPIO_PE9,
  287. .end = GPIO_PE9,
  288. .flags = IORESOURCE_IO,
  289. },
  290. #endif
  291. };
  292. static unsigned short bfin_uart1_peripherals[] = {
  293. P_UART1_TX, P_UART1_RX,
  294. #ifdef CONFIG_BFIN_UART1_CTSRTS
  295. P_UART1_RTS, P_UART1_CTS,
  296. #endif
  297. 0
  298. };
  299. static struct platform_device bfin_uart1_device = {
  300. .name = "bfin-uart",
  301. .id = 1,
  302. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  303. .resource = bfin_uart1_resources,
  304. .dev = {
  305. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  306. },
  307. };
  308. #endif
  309. #ifdef CONFIG_SERIAL_BFIN_UART2
  310. static struct resource bfin_uart2_resources[] = {
  311. {
  312. .start = UART2_DLL,
  313. .end = UART2_RBR+2,
  314. .flags = IORESOURCE_MEM,
  315. },
  316. {
  317. .start = IRQ_UART2_RX,
  318. .end = IRQ_UART2_RX+1,
  319. .flags = IORESOURCE_IRQ,
  320. },
  321. {
  322. .start = IRQ_UART2_ERROR,
  323. .end = IRQ_UART2_ERROR,
  324. .flags = IORESOURCE_IRQ,
  325. },
  326. {
  327. .start = CH_UART2_TX,
  328. .end = CH_UART2_TX,
  329. .flags = IORESOURCE_DMA,
  330. },
  331. {
  332. .start = CH_UART2_RX,
  333. .end = CH_UART2_RX,
  334. .flags = IORESOURCE_DMA,
  335. },
  336. };
  337. static unsigned short bfin_uart2_peripherals[] = {
  338. P_UART2_TX, P_UART2_RX, 0
  339. };
  340. static struct platform_device bfin_uart2_device = {
  341. .name = "bfin-uart",
  342. .id = 2,
  343. .num_resources = ARRAY_SIZE(bfin_uart2_resources),
  344. .resource = bfin_uart2_resources,
  345. .dev = {
  346. .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
  347. },
  348. };
  349. #endif
  350. #ifdef CONFIG_SERIAL_BFIN_UART3
  351. static struct resource bfin_uart3_resources[] = {
  352. {
  353. .start = UART3_DLL,
  354. .end = UART3_RBR+2,
  355. .flags = IORESOURCE_MEM,
  356. },
  357. {
  358. .start = IRQ_UART3_RX,
  359. .end = IRQ_UART3_RX+1,
  360. .flags = IORESOURCE_IRQ,
  361. },
  362. {
  363. .start = IRQ_UART3_ERROR,
  364. .end = IRQ_UART3_ERROR,
  365. .flags = IORESOURCE_IRQ,
  366. },
  367. {
  368. .start = CH_UART3_TX,
  369. .end = CH_UART3_TX,
  370. .flags = IORESOURCE_DMA,
  371. },
  372. {
  373. .start = CH_UART3_RX,
  374. .end = CH_UART3_RX,
  375. .flags = IORESOURCE_DMA,
  376. },
  377. #ifdef CONFIG_BFIN_UART3_CTSRTS
  378. { /* CTS pin -- 0 means not supported */
  379. .start = GPIO_PB3,
  380. .end = GPIO_PB3,
  381. .flags = IORESOURCE_IO,
  382. },
  383. { /* RTS pin -- 0 means not supported */
  384. .start = GPIO_PB2,
  385. .end = GPIO_PB2,
  386. .flags = IORESOURCE_IO,
  387. },
  388. #endif
  389. };
  390. static unsigned short bfin_uart3_peripherals[] = {
  391. P_UART3_TX, P_UART3_RX,
  392. #ifdef CONFIG_BFIN_UART3_CTSRTS
  393. P_UART3_RTS, P_UART3_CTS,
  394. #endif
  395. 0
  396. };
  397. static struct platform_device bfin_uart3_device = {
  398. .name = "bfin-uart",
  399. .id = 3,
  400. .num_resources = ARRAY_SIZE(bfin_uart3_resources),
  401. .resource = bfin_uart3_resources,
  402. .dev = {
  403. .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
  404. },
  405. };
  406. #endif
  407. #endif
  408. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  409. #ifdef CONFIG_BFIN_SIR0
  410. static struct resource bfin_sir0_resources[] = {
  411. {
  412. .start = 0xFFC00400,
  413. .end = 0xFFC004FF,
  414. .flags = IORESOURCE_MEM,
  415. },
  416. {
  417. .start = IRQ_UART0_RX,
  418. .end = IRQ_UART0_RX+1,
  419. .flags = IORESOURCE_IRQ,
  420. },
  421. {
  422. .start = CH_UART0_RX,
  423. .end = CH_UART0_RX+1,
  424. .flags = IORESOURCE_DMA,
  425. },
  426. };
  427. static struct platform_device bfin_sir0_device = {
  428. .name = "bfin_sir",
  429. .id = 0,
  430. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  431. .resource = bfin_sir0_resources,
  432. };
  433. #endif
  434. #ifdef CONFIG_BFIN_SIR1
  435. static struct resource bfin_sir1_resources[] = {
  436. {
  437. .start = 0xFFC02000,
  438. .end = 0xFFC020FF,
  439. .flags = IORESOURCE_MEM,
  440. },
  441. {
  442. .start = IRQ_UART1_RX,
  443. .end = IRQ_UART1_RX+1,
  444. .flags = IORESOURCE_IRQ,
  445. },
  446. {
  447. .start = CH_UART1_RX,
  448. .end = CH_UART1_RX+1,
  449. .flags = IORESOURCE_DMA,
  450. },
  451. };
  452. static struct platform_device bfin_sir1_device = {
  453. .name = "bfin_sir",
  454. .id = 1,
  455. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  456. .resource = bfin_sir1_resources,
  457. };
  458. #endif
  459. #ifdef CONFIG_BFIN_SIR2
  460. static struct resource bfin_sir2_resources[] = {
  461. {
  462. .start = 0xFFC02100,
  463. .end = 0xFFC021FF,
  464. .flags = IORESOURCE_MEM,
  465. },
  466. {
  467. .start = IRQ_UART2_RX,
  468. .end = IRQ_UART2_RX+1,
  469. .flags = IORESOURCE_IRQ,
  470. },
  471. {
  472. .start = CH_UART2_RX,
  473. .end = CH_UART2_RX+1,
  474. .flags = IORESOURCE_DMA,
  475. },
  476. };
  477. static struct platform_device bfin_sir2_device = {
  478. .name = "bfin_sir",
  479. .id = 2,
  480. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  481. .resource = bfin_sir2_resources,
  482. };
  483. #endif
  484. #ifdef CONFIG_BFIN_SIR3
  485. static struct resource bfin_sir3_resources[] = {
  486. {
  487. .start = 0xFFC03100,
  488. .end = 0xFFC031FF,
  489. .flags = IORESOURCE_MEM,
  490. },
  491. {
  492. .start = IRQ_UART3_RX,
  493. .end = IRQ_UART3_RX+1,
  494. .flags = IORESOURCE_IRQ,
  495. },
  496. {
  497. .start = CH_UART3_RX,
  498. .end = CH_UART3_RX+1,
  499. .flags = IORESOURCE_DMA,
  500. },
  501. };
  502. static struct platform_device bfin_sir3_device = {
  503. .name = "bfin_sir",
  504. .id = 3,
  505. .num_resources = ARRAY_SIZE(bfin_sir3_resources),
  506. .resource = bfin_sir3_resources,
  507. };
  508. #endif
  509. #endif
  510. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  511. #include <linux/smsc911x.h>
  512. static struct resource smsc911x_resources[] = {
  513. {
  514. .name = "smsc911x-memory",
  515. .start = 0x24000000,
  516. .end = 0x24000000 + 0xFF,
  517. .flags = IORESOURCE_MEM,
  518. },
  519. {
  520. .start = IRQ_PE8,
  521. .end = IRQ_PE8,
  522. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  523. },
  524. };
  525. static struct smsc911x_platform_config smsc911x_config = {
  526. .flags = SMSC911X_USE_32BIT,
  527. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  528. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  529. .phy_interface = PHY_INTERFACE_MODE_MII,
  530. };
  531. static struct platform_device smsc911x_device = {
  532. .name = "smsc911x",
  533. .id = 0,
  534. .num_resources = ARRAY_SIZE(smsc911x_resources),
  535. .resource = smsc911x_resources,
  536. .dev = {
  537. .platform_data = &smsc911x_config,
  538. },
  539. };
  540. #endif
  541. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  542. static struct resource musb_resources[] = {
  543. [0] = {
  544. .start = 0xFFC03C00,
  545. .end = 0xFFC040FF,
  546. .flags = IORESOURCE_MEM,
  547. },
  548. [1] = { /* general IRQ */
  549. .start = IRQ_USB_INT0,
  550. .end = IRQ_USB_INT0,
  551. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  552. .name = "mc"
  553. },
  554. [2] = { /* DMA IRQ */
  555. .start = IRQ_USB_DMA,
  556. .end = IRQ_USB_DMA,
  557. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  558. .name = "dma"
  559. },
  560. };
  561. static struct musb_hdrc_config musb_config = {
  562. .multipoint = 0,
  563. .dyn_fifo = 0,
  564. .soft_con = 1,
  565. .dma = 1,
  566. .num_eps = 8,
  567. .dma_channels = 8,
  568. .gpio_vrsel = GPIO_PE7,
  569. /* Some custom boards need to be active low, just set it to "0"
  570. * if it is the case.
  571. */
  572. .gpio_vrsel_active = 1,
  573. .clkin = 24, /* musb CLKIN in MHZ */
  574. };
  575. static struct musb_hdrc_platform_data musb_plat = {
  576. #if defined(CONFIG_USB_MUSB_OTG)
  577. .mode = MUSB_OTG,
  578. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  579. .mode = MUSB_HOST,
  580. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  581. .mode = MUSB_PERIPHERAL,
  582. #endif
  583. .config = &musb_config,
  584. };
  585. static u64 musb_dmamask = ~(u32)0;
  586. static struct platform_device musb_device = {
  587. .name = "musb-blackfin",
  588. .id = 0,
  589. .dev = {
  590. .dma_mask = &musb_dmamask,
  591. .coherent_dma_mask = 0xffffffff,
  592. .platform_data = &musb_plat,
  593. },
  594. .num_resources = ARRAY_SIZE(musb_resources),
  595. .resource = musb_resources,
  596. };
  597. #endif
  598. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  599. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  600. static struct resource bfin_sport0_uart_resources[] = {
  601. {
  602. .start = SPORT0_TCR1,
  603. .end = SPORT0_MRCS3+4,
  604. .flags = IORESOURCE_MEM,
  605. },
  606. {
  607. .start = IRQ_SPORT0_RX,
  608. .end = IRQ_SPORT0_RX+1,
  609. .flags = IORESOURCE_IRQ,
  610. },
  611. {
  612. .start = IRQ_SPORT0_ERROR,
  613. .end = IRQ_SPORT0_ERROR,
  614. .flags = IORESOURCE_IRQ,
  615. },
  616. };
  617. static unsigned short bfin_sport0_peripherals[] = {
  618. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  619. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  620. };
  621. static struct platform_device bfin_sport0_uart_device = {
  622. .name = "bfin-sport-uart",
  623. .id = 0,
  624. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  625. .resource = bfin_sport0_uart_resources,
  626. .dev = {
  627. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  628. },
  629. };
  630. #endif
  631. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  632. static struct resource bfin_sport1_uart_resources[] = {
  633. {
  634. .start = SPORT1_TCR1,
  635. .end = SPORT1_MRCS3+4,
  636. .flags = IORESOURCE_MEM,
  637. },
  638. {
  639. .start = IRQ_SPORT1_RX,
  640. .end = IRQ_SPORT1_RX+1,
  641. .flags = IORESOURCE_IRQ,
  642. },
  643. {
  644. .start = IRQ_SPORT1_ERROR,
  645. .end = IRQ_SPORT1_ERROR,
  646. .flags = IORESOURCE_IRQ,
  647. },
  648. };
  649. static unsigned short bfin_sport1_peripherals[] = {
  650. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  651. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  652. };
  653. static struct platform_device bfin_sport1_uart_device = {
  654. .name = "bfin-sport-uart",
  655. .id = 1,
  656. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  657. .resource = bfin_sport1_uart_resources,
  658. .dev = {
  659. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  660. },
  661. };
  662. #endif
  663. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  664. static struct resource bfin_sport2_uart_resources[] = {
  665. {
  666. .start = SPORT2_TCR1,
  667. .end = SPORT2_MRCS3+4,
  668. .flags = IORESOURCE_MEM,
  669. },
  670. {
  671. .start = IRQ_SPORT2_RX,
  672. .end = IRQ_SPORT2_RX+1,
  673. .flags = IORESOURCE_IRQ,
  674. },
  675. {
  676. .start = IRQ_SPORT2_ERROR,
  677. .end = IRQ_SPORT2_ERROR,
  678. .flags = IORESOURCE_IRQ,
  679. },
  680. };
  681. static unsigned short bfin_sport2_peripherals[] = {
  682. P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
  683. P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
  684. };
  685. static struct platform_device bfin_sport2_uart_device = {
  686. .name = "bfin-sport-uart",
  687. .id = 2,
  688. .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
  689. .resource = bfin_sport2_uart_resources,
  690. .dev = {
  691. .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
  692. },
  693. };
  694. #endif
  695. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  696. static struct resource bfin_sport3_uart_resources[] = {
  697. {
  698. .start = SPORT3_TCR1,
  699. .end = SPORT3_MRCS3+4,
  700. .flags = IORESOURCE_MEM,
  701. },
  702. {
  703. .start = IRQ_SPORT3_RX,
  704. .end = IRQ_SPORT3_RX+1,
  705. .flags = IORESOURCE_IRQ,
  706. },
  707. {
  708. .start = IRQ_SPORT3_ERROR,
  709. .end = IRQ_SPORT3_ERROR,
  710. .flags = IORESOURCE_IRQ,
  711. },
  712. };
  713. static unsigned short bfin_sport3_peripherals[] = {
  714. P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
  715. P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
  716. };
  717. static struct platform_device bfin_sport3_uart_device = {
  718. .name = "bfin-sport-uart",
  719. .id = 3,
  720. .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
  721. .resource = bfin_sport3_uart_resources,
  722. .dev = {
  723. .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
  724. },
  725. };
  726. #endif
  727. #endif
  728. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  729. static unsigned short bfin_can0_peripherals[] = {
  730. P_CAN0_RX, P_CAN0_TX, 0
  731. };
  732. static struct resource bfin_can0_resources[] = {
  733. {
  734. .start = 0xFFC02A00,
  735. .end = 0xFFC02FFF,
  736. .flags = IORESOURCE_MEM,
  737. },
  738. {
  739. .start = IRQ_CAN0_RX,
  740. .end = IRQ_CAN0_RX,
  741. .flags = IORESOURCE_IRQ,
  742. },
  743. {
  744. .start = IRQ_CAN0_TX,
  745. .end = IRQ_CAN0_TX,
  746. .flags = IORESOURCE_IRQ,
  747. },
  748. {
  749. .start = IRQ_CAN0_ERROR,
  750. .end = IRQ_CAN0_ERROR,
  751. .flags = IORESOURCE_IRQ,
  752. },
  753. };
  754. static struct platform_device bfin_can0_device = {
  755. .name = "bfin_can",
  756. .id = 0,
  757. .num_resources = ARRAY_SIZE(bfin_can0_resources),
  758. .resource = bfin_can0_resources,
  759. .dev = {
  760. .platform_data = &bfin_can0_peripherals, /* Passed to driver */
  761. },
  762. };
  763. static unsigned short bfin_can1_peripherals[] = {
  764. P_CAN1_RX, P_CAN1_TX, 0
  765. };
  766. static struct resource bfin_can1_resources[] = {
  767. {
  768. .start = 0xFFC03200,
  769. .end = 0xFFC037FF,
  770. .flags = IORESOURCE_MEM,
  771. },
  772. {
  773. .start = IRQ_CAN1_RX,
  774. .end = IRQ_CAN1_RX,
  775. .flags = IORESOURCE_IRQ,
  776. },
  777. {
  778. .start = IRQ_CAN1_TX,
  779. .end = IRQ_CAN1_TX,
  780. .flags = IORESOURCE_IRQ,
  781. },
  782. {
  783. .start = IRQ_CAN1_ERROR,
  784. .end = IRQ_CAN1_ERROR,
  785. .flags = IORESOURCE_IRQ,
  786. },
  787. };
  788. static struct platform_device bfin_can1_device = {
  789. .name = "bfin_can",
  790. .id = 1,
  791. .num_resources = ARRAY_SIZE(bfin_can1_resources),
  792. .resource = bfin_can1_resources,
  793. .dev = {
  794. .platform_data = &bfin_can1_peripherals, /* Passed to driver */
  795. },
  796. };
  797. #endif
  798. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  799. static struct resource bfin_atapi_resources[] = {
  800. {
  801. .start = 0xFFC03800,
  802. .end = 0xFFC0386F,
  803. .flags = IORESOURCE_MEM,
  804. },
  805. {
  806. .start = IRQ_ATAPI_ERR,
  807. .end = IRQ_ATAPI_ERR,
  808. .flags = IORESOURCE_IRQ,
  809. },
  810. };
  811. static struct platform_device bfin_atapi_device = {
  812. .name = "pata-bf54x",
  813. .id = -1,
  814. .num_resources = ARRAY_SIZE(bfin_atapi_resources),
  815. .resource = bfin_atapi_resources,
  816. };
  817. #endif
  818. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  819. static struct mtd_partition partition_info[] = {
  820. {
  821. .name = "bootloader(nand)",
  822. .offset = 0,
  823. .size = 0x80000,
  824. }, {
  825. .name = "linux kernel(nand)",
  826. .offset = MTDPART_OFS_APPEND,
  827. .size = 4 * 1024 * 1024,
  828. },
  829. {
  830. .name = "file system(nand)",
  831. .offset = MTDPART_OFS_APPEND,
  832. .size = MTDPART_SIZ_FULL,
  833. },
  834. };
  835. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  836. .data_width = NFC_NWIDTH_8,
  837. .partitions = partition_info,
  838. .nr_partitions = ARRAY_SIZE(partition_info),
  839. .rd_dly = 3,
  840. .wr_dly = 3,
  841. };
  842. static struct resource bf5xx_nand_resources[] = {
  843. {
  844. .start = 0xFFC03B00,
  845. .end = 0xFFC03B4F,
  846. .flags = IORESOURCE_MEM,
  847. },
  848. {
  849. .start = CH_NFC,
  850. .end = CH_NFC,
  851. .flags = IORESOURCE_IRQ,
  852. },
  853. };
  854. static struct platform_device bf5xx_nand_device = {
  855. .name = "bf5xx-nand",
  856. .id = 0,
  857. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  858. .resource = bf5xx_nand_resources,
  859. .dev = {
  860. .platform_data = &bf5xx_nand_platform,
  861. },
  862. };
  863. #endif
  864. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  865. static struct bfin_sd_host bfin_sdh_data = {
  866. .dma_chan = CH_SDH,
  867. .irq_int0 = IRQ_SDH_MASK0,
  868. .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
  869. };
  870. static struct platform_device bf54x_sdh_device = {
  871. .name = "bfin-sdh",
  872. .id = 0,
  873. .dev = {
  874. .platform_data = &bfin_sdh_data,
  875. },
  876. };
  877. #endif
  878. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  879. static struct mtd_partition ezkit_partitions[] = {
  880. {
  881. .name = "bootloader(nor)",
  882. .size = 0x80000,
  883. .offset = 0,
  884. }, {
  885. .name = "linux kernel(nor)",
  886. .size = 0x400000,
  887. .offset = MTDPART_OFS_APPEND,
  888. }, {
  889. .name = "file system(nor)",
  890. .size = 0x1000000 - 0x80000 - 0x400000 - 0x8000 * 4,
  891. .offset = MTDPART_OFS_APPEND,
  892. }, {
  893. .name = "config(nor)",
  894. .size = 0x8000 * 3,
  895. .offset = MTDPART_OFS_APPEND,
  896. }, {
  897. .name = "u-boot env(nor)",
  898. .size = 0x8000,
  899. .offset = MTDPART_OFS_APPEND,
  900. }
  901. };
  902. static struct physmap_flash_data ezkit_flash_data = {
  903. .width = 2,
  904. .parts = ezkit_partitions,
  905. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  906. };
  907. static struct resource ezkit_flash_resource = {
  908. .start = 0x20000000,
  909. .end = 0x21ffffff,
  910. .flags = IORESOURCE_MEM,
  911. };
  912. static struct platform_device ezkit_flash_device = {
  913. .name = "physmap-flash",
  914. .id = 0,
  915. .dev = {
  916. .platform_data = &ezkit_flash_data,
  917. },
  918. .num_resources = 1,
  919. .resource = &ezkit_flash_resource,
  920. };
  921. #endif
  922. #if defined(CONFIG_MTD_M25P80) \
  923. || defined(CONFIG_MTD_M25P80_MODULE)
  924. /* SPI flash chip (m25p16) */
  925. static struct mtd_partition bfin_spi_flash_partitions[] = {
  926. {
  927. .name = "bootloader(spi)",
  928. .size = 0x00080000,
  929. .offset = 0,
  930. .mask_flags = MTD_CAP_ROM
  931. }, {
  932. .name = "linux kernel(spi)",
  933. .size = MTDPART_SIZ_FULL,
  934. .offset = MTDPART_OFS_APPEND,
  935. }
  936. };
  937. static struct flash_platform_data bfin_spi_flash_data = {
  938. .name = "m25p80",
  939. .parts = bfin_spi_flash_partitions,
  940. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  941. .type = "m25p16",
  942. };
  943. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  944. .enable_dma = 0, /* use dma transfer with this chip*/
  945. .bits_per_word = 8,
  946. };
  947. #endif
  948. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  949. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  950. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  951. .enable_dma = 0,
  952. .bits_per_word = 16,
  953. };
  954. #endif
  955. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  956. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  957. .enable_dma = 0,
  958. .bits_per_word = 16,
  959. };
  960. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  961. .model = 7877,
  962. .vref_delay_usecs = 50, /* internal, no capacitor */
  963. .x_plate_ohms = 419,
  964. .y_plate_ohms = 486,
  965. .pressure_max = 1000,
  966. .pressure_min = 0,
  967. .stopacq_polarity = 1,
  968. .first_conversion_delay = 3,
  969. .acquisition_time = 1,
  970. .averaging = 1,
  971. .pen_down_acc_interval = 1,
  972. };
  973. #endif
  974. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  975. static struct bfin5xx_spi_chip spidev_chip_info = {
  976. .enable_dma = 0,
  977. .bits_per_word = 8,
  978. };
  979. #endif
  980. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  981. static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
  982. .enable_dma = 0, /* use dma transfer with this chip*/
  983. .bits_per_word = 8,
  984. };
  985. #endif
  986. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  987. #if defined(CONFIG_MTD_M25P80) \
  988. || defined(CONFIG_MTD_M25P80_MODULE)
  989. {
  990. /* the modalias must be the same as spi device driver name */
  991. .modalias = "m25p80", /* Name of spi_driver for this device */
  992. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  993. .bus_num = 0, /* Framework bus number */
  994. .chip_select = 1, /* SPI_SSEL1*/
  995. .platform_data = &bfin_spi_flash_data,
  996. .controller_data = &spi_flash_chip_info,
  997. .mode = SPI_MODE_3,
  998. },
  999. #endif
  1000. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  1001. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  1002. {
  1003. .modalias = "ad183x",
  1004. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1005. .bus_num = 1,
  1006. .chip_select = 4,
  1007. .controller_data = &ad1836_spi_chip_info,
  1008. },
  1009. #endif
  1010. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  1011. {
  1012. .modalias = "ad7877",
  1013. .platform_data = &bfin_ad7877_ts_info,
  1014. .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
  1015. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  1016. .bus_num = 0,
  1017. .chip_select = 2,
  1018. .controller_data = &spi_ad7877_chip_info,
  1019. },
  1020. #endif
  1021. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  1022. {
  1023. .modalias = "spidev",
  1024. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1025. .bus_num = 0,
  1026. .chip_select = 1,
  1027. .controller_data = &spidev_chip_info,
  1028. },
  1029. #endif
  1030. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  1031. {
  1032. .modalias = "adxl34x",
  1033. .platform_data = &adxl34x_info,
  1034. .irq = IRQ_PC5,
  1035. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1036. .bus_num = 1,
  1037. .chip_select = 2,
  1038. .controller_data = &spi_adxl34x_chip_info,
  1039. .mode = SPI_MODE_3,
  1040. },
  1041. #endif
  1042. };
  1043. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1044. /* SPI (0) */
  1045. static struct resource bfin_spi0_resource[] = {
  1046. [0] = {
  1047. .start = SPI0_REGBASE,
  1048. .end = SPI0_REGBASE + 0xFF,
  1049. .flags = IORESOURCE_MEM,
  1050. },
  1051. [1] = {
  1052. .start = CH_SPI0,
  1053. .end = CH_SPI0,
  1054. .flags = IORESOURCE_DMA,
  1055. },
  1056. [2] = {
  1057. .start = IRQ_SPI0,
  1058. .end = IRQ_SPI0,
  1059. .flags = IORESOURCE_IRQ,
  1060. }
  1061. };
  1062. /* SPI (1) */
  1063. static struct resource bfin_spi1_resource[] = {
  1064. [0] = {
  1065. .start = SPI1_REGBASE,
  1066. .end = SPI1_REGBASE + 0xFF,
  1067. .flags = IORESOURCE_MEM,
  1068. },
  1069. [1] = {
  1070. .start = CH_SPI1,
  1071. .end = CH_SPI1,
  1072. .flags = IORESOURCE_DMA,
  1073. },
  1074. [2] = {
  1075. .start = IRQ_SPI1,
  1076. .end = IRQ_SPI1,
  1077. .flags = IORESOURCE_IRQ,
  1078. }
  1079. };
  1080. /* SPI controller data */
  1081. static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
  1082. .num_chipselect = 4,
  1083. .enable_dma = 1, /* master has the ability to do dma transfer */
  1084. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1085. };
  1086. static struct platform_device bf54x_spi_master0 = {
  1087. .name = "bfin-spi",
  1088. .id = 0, /* Bus number */
  1089. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1090. .resource = bfin_spi0_resource,
  1091. .dev = {
  1092. .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
  1093. },
  1094. };
  1095. static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
  1096. .num_chipselect = 4,
  1097. .enable_dma = 1, /* master has the ability to do dma transfer */
  1098. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  1099. };
  1100. static struct platform_device bf54x_spi_master1 = {
  1101. .name = "bfin-spi",
  1102. .id = 1, /* Bus number */
  1103. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  1104. .resource = bfin_spi1_resource,
  1105. .dev = {
  1106. .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
  1107. },
  1108. };
  1109. #endif /* spi master and devices */
  1110. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1111. static struct resource bfin_twi0_resource[] = {
  1112. [0] = {
  1113. .start = TWI0_REGBASE,
  1114. .end = TWI0_REGBASE + 0xFF,
  1115. .flags = IORESOURCE_MEM,
  1116. },
  1117. [1] = {
  1118. .start = IRQ_TWI0,
  1119. .end = IRQ_TWI0,
  1120. .flags = IORESOURCE_IRQ,
  1121. },
  1122. };
  1123. static struct platform_device i2c_bfin_twi0_device = {
  1124. .name = "i2c-bfin-twi",
  1125. .id = 0,
  1126. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1127. .resource = bfin_twi0_resource,
  1128. };
  1129. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1130. static struct resource bfin_twi1_resource[] = {
  1131. [0] = {
  1132. .start = TWI1_REGBASE,
  1133. .end = TWI1_REGBASE + 0xFF,
  1134. .flags = IORESOURCE_MEM,
  1135. },
  1136. [1] = {
  1137. .start = IRQ_TWI1,
  1138. .end = IRQ_TWI1,
  1139. .flags = IORESOURCE_IRQ,
  1140. },
  1141. };
  1142. static struct platform_device i2c_bfin_twi1_device = {
  1143. .name = "i2c-bfin-twi",
  1144. .id = 1,
  1145. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  1146. .resource = bfin_twi1_resource,
  1147. };
  1148. #endif
  1149. #endif
  1150. static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
  1151. };
  1152. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1153. static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
  1154. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1155. {
  1156. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  1157. },
  1158. #endif
  1159. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  1160. {
  1161. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  1162. .irq = 212,
  1163. },
  1164. #endif
  1165. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  1166. {
  1167. I2C_BOARD_INFO("adxl34x", 0x53),
  1168. .irq = IRQ_PC5,
  1169. .platform_data = (void *)&adxl34x_info,
  1170. },
  1171. #endif
  1172. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1173. {
  1174. I2C_BOARD_INFO("ad5252", 0x2f),
  1175. },
  1176. #endif
  1177. };
  1178. #endif
  1179. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1180. #include <linux/gpio_keys.h>
  1181. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  1182. {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"},
  1183. {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"},
  1184. {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"},
  1185. {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"},
  1186. };
  1187. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  1188. .buttons = bfin_gpio_keys_table,
  1189. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  1190. };
  1191. static struct platform_device bfin_device_gpiokeys = {
  1192. .name = "gpio-keys",
  1193. .dev = {
  1194. .platform_data = &bfin_gpio_keys_data,
  1195. },
  1196. };
  1197. #endif
  1198. static const unsigned int cclk_vlev_datasheet[] =
  1199. {
  1200. /*
  1201. * Internal VLEV BF54XSBBC1533
  1202. ****temporarily using these values until data sheet is updated
  1203. */
  1204. VRPAIR(VLEV_085, 150000000),
  1205. VRPAIR(VLEV_090, 250000000),
  1206. VRPAIR(VLEV_110, 276000000),
  1207. VRPAIR(VLEV_115, 301000000),
  1208. VRPAIR(VLEV_120, 525000000),
  1209. VRPAIR(VLEV_125, 550000000),
  1210. VRPAIR(VLEV_130, 600000000),
  1211. };
  1212. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1213. .tuple_tab = cclk_vlev_datasheet,
  1214. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1215. .vr_settling_time = 25 /* us */,
  1216. };
  1217. static struct platform_device bfin_dpmc = {
  1218. .name = "bfin dpmc",
  1219. .dev = {
  1220. .platform_data = &bfin_dmpc_vreg_data,
  1221. },
  1222. };
  1223. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
  1224. defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
  1225. defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1226. #define SPORT_REQ(x) \
  1227. [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
  1228. P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
  1229. static const u16 bfin_snd_pin[][7] = {
  1230. SPORT_REQ(0),
  1231. SPORT_REQ(1),
  1232. };
  1233. static struct bfin_snd_platform_data bfin_snd_data[] = {
  1234. {
  1235. .pin_req = &bfin_snd_pin[0][0],
  1236. },
  1237. {
  1238. .pin_req = &bfin_snd_pin[1][0],
  1239. },
  1240. };
  1241. #define BFIN_SND_RES(x) \
  1242. [x] = { \
  1243. { \
  1244. .start = SPORT##x##_TCR1, \
  1245. .end = SPORT##x##_TCR1, \
  1246. .flags = IORESOURCE_MEM \
  1247. }, \
  1248. { \
  1249. .start = CH_SPORT##x##_RX, \
  1250. .end = CH_SPORT##x##_RX, \
  1251. .flags = IORESOURCE_DMA, \
  1252. }, \
  1253. { \
  1254. .start = CH_SPORT##x##_TX, \
  1255. .end = CH_SPORT##x##_TX, \
  1256. .flags = IORESOURCE_DMA, \
  1257. }, \
  1258. { \
  1259. .start = IRQ_SPORT##x##_ERROR, \
  1260. .end = IRQ_SPORT##x##_ERROR, \
  1261. .flags = IORESOURCE_IRQ, \
  1262. } \
  1263. }
  1264. static struct resource bfin_snd_resources[][4] = {
  1265. BFIN_SND_RES(0),
  1266. BFIN_SND_RES(1),
  1267. };
  1268. static struct platform_device bfin_pcm = {
  1269. .name = "bfin-pcm-audio",
  1270. .id = -1,
  1271. };
  1272. #endif
  1273. #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
  1274. static struct platform_device bfin_ad73311_codec_device = {
  1275. .name = "ad73311",
  1276. .id = -1,
  1277. };
  1278. #endif
  1279. #if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE)
  1280. static struct platform_device bfin_ad1980_codec_device = {
  1281. .name = "ad1980",
  1282. .id = -1,
  1283. };
  1284. #endif
  1285. #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
  1286. static struct platform_device bfin_i2s = {
  1287. .name = "bfin-i2s",
  1288. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1289. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  1290. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  1291. .dev = {
  1292. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  1293. },
  1294. };
  1295. #endif
  1296. #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
  1297. static struct platform_device bfin_tdm = {
  1298. .name = "bfin-tdm",
  1299. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1300. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  1301. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  1302. .dev = {
  1303. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  1304. },
  1305. };
  1306. #endif
  1307. #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
  1308. static struct platform_device bfin_ac97 = {
  1309. .name = "bfin-ac97",
  1310. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  1311. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  1312. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  1313. .dev = {
  1314. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  1315. },
  1316. };
  1317. #endif
  1318. static struct platform_device *ezkit_devices[] __initdata = {
  1319. &bfin_dpmc,
  1320. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  1321. &rtc_device,
  1322. #endif
  1323. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1324. #ifdef CONFIG_SERIAL_BFIN_UART0
  1325. &bfin_uart0_device,
  1326. #endif
  1327. #ifdef CONFIG_SERIAL_BFIN_UART1
  1328. &bfin_uart1_device,
  1329. #endif
  1330. #ifdef CONFIG_SERIAL_BFIN_UART2
  1331. &bfin_uart2_device,
  1332. #endif
  1333. #ifdef CONFIG_SERIAL_BFIN_UART3
  1334. &bfin_uart3_device,
  1335. #endif
  1336. #endif
  1337. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1338. #ifdef CONFIG_BFIN_SIR0
  1339. &bfin_sir0_device,
  1340. #endif
  1341. #ifdef CONFIG_BFIN_SIR1
  1342. &bfin_sir1_device,
  1343. #endif
  1344. #ifdef CONFIG_BFIN_SIR2
  1345. &bfin_sir2_device,
  1346. #endif
  1347. #ifdef CONFIG_BFIN_SIR3
  1348. &bfin_sir3_device,
  1349. #endif
  1350. #endif
  1351. #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
  1352. &bf54x_lq043_device,
  1353. #endif
  1354. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  1355. &smsc911x_device,
  1356. #endif
  1357. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  1358. &musb_device,
  1359. #endif
  1360. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  1361. &bfin_isp1760_device,
  1362. #endif
  1363. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1364. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1365. &bfin_sport0_uart_device,
  1366. #endif
  1367. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1368. &bfin_sport1_uart_device,
  1369. #endif
  1370. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1371. &bfin_sport2_uart_device,
  1372. #endif
  1373. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1374. &bfin_sport3_uart_device,
  1375. #endif
  1376. #endif
  1377. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  1378. &bfin_can0_device,
  1379. &bfin_can1_device,
  1380. #endif
  1381. #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
  1382. &bfin_atapi_device,
  1383. #endif
  1384. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  1385. &bf5xx_nand_device,
  1386. #endif
  1387. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  1388. &bf54x_sdh_device,
  1389. #endif
  1390. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1391. &bf54x_spi_master0,
  1392. &bf54x_spi_master1,
  1393. #endif
  1394. #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
  1395. &bf54x_kpad_device,
  1396. #endif
  1397. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  1398. &bfin_rotary_device,
  1399. #endif
  1400. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1401. &i2c_bfin_twi0_device,
  1402. #if !defined(CONFIG_BF542)
  1403. &i2c_bfin_twi1_device,
  1404. #endif
  1405. #endif
  1406. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1407. &bfin_device_gpiokeys,
  1408. #endif
  1409. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1410. &ezkit_flash_device,
  1411. #endif
  1412. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
  1413. defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
  1414. defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1415. &bfin_pcm,
  1416. #endif
  1417. #if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE)
  1418. &bfin_ad1980_codec_device,
  1419. #endif
  1420. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  1421. &bfin_i2s,
  1422. #endif
  1423. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1424. &bfin_tdm,
  1425. #endif
  1426. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  1427. &bfin_ac97,
  1428. #endif
  1429. };
  1430. static int __init ezkit_init(void)
  1431. {
  1432. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1433. i2c_register_board_info(0, bfin_i2c_board_info0,
  1434. ARRAY_SIZE(bfin_i2c_board_info0));
  1435. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  1436. i2c_register_board_info(1, bfin_i2c_board_info1,
  1437. ARRAY_SIZE(bfin_i2c_board_info1));
  1438. #endif
  1439. platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
  1440. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1441. return 0;
  1442. }
  1443. arch_initcall(ezkit_init);
  1444. static struct platform_device *ezkit_early_devices[] __initdata = {
  1445. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1446. #ifdef CONFIG_SERIAL_BFIN_UART0
  1447. &bfin_uart0_device,
  1448. #endif
  1449. #ifdef CONFIG_SERIAL_BFIN_UART1
  1450. &bfin_uart1_device,
  1451. #endif
  1452. #ifdef CONFIG_SERIAL_BFIN_UART2
  1453. &bfin_uart2_device,
  1454. #endif
  1455. #ifdef CONFIG_SERIAL_BFIN_UART3
  1456. &bfin_uart3_device,
  1457. #endif
  1458. #endif
  1459. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1460. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1461. &bfin_sport0_uart_device,
  1462. #endif
  1463. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1464. &bfin_sport1_uart_device,
  1465. #endif
  1466. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1467. &bfin_sport2_uart_device,
  1468. #endif
  1469. #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
  1470. &bfin_sport3_uart_device,
  1471. #endif
  1472. #endif
  1473. };
  1474. void __init native_machine_early_platform_add_devices(void)
  1475. {
  1476. printk(KERN_INFO "register early platform devices\n");
  1477. early_platform_add_devices(ezkit_early_devices,
  1478. ARRAY_SIZE(ezkit_early_devices));
  1479. }