pm.c 8.5 KB

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  1. /* linux/arch/arm/plat-s3c/pm.c
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2004-2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * S3C common power management (suspend to ram) support.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/suspend.h>
  16. #include <linux/errno.h>
  17. #include <linux/delay.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/io.h>
  20. #include <asm/cacheflush.h>
  21. #include <mach/hardware.h>
  22. #include <mach/map.h>
  23. #include <plat/regs-serial.h>
  24. #include <mach/regs-clock.h>
  25. #include <mach/regs-irq.h>
  26. #include <asm/irq.h>
  27. #include <plat/pm.h>
  28. #include <mach/pm-core.h>
  29. /* for external use */
  30. unsigned long s3c_pm_flags;
  31. /* Debug code:
  32. *
  33. * This code supports debug output to the low level UARTs for use on
  34. * resume before the console layer is available.
  35. */
  36. #ifdef CONFIG_SAMSUNG_PM_DEBUG
  37. extern void printascii(const char *);
  38. void s3c_pm_dbg(const char *fmt, ...)
  39. {
  40. va_list va;
  41. char buff[256];
  42. va_start(va, fmt);
  43. vsprintf(buff, fmt, va);
  44. va_end(va);
  45. printascii(buff);
  46. }
  47. static inline void s3c_pm_debug_init(void)
  48. {
  49. /* restart uart clocks so we can use them to output */
  50. s3c_pm_debug_init_uart();
  51. }
  52. #else
  53. #define s3c_pm_debug_init() do { } while(0)
  54. #endif /* CONFIG_SAMSUNG_PM_DEBUG */
  55. /* Save the UART configurations if we are configured for debug. */
  56. unsigned char pm_uart_udivslot;
  57. #ifdef CONFIG_SAMSUNG_PM_DEBUG
  58. struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
  59. static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
  60. {
  61. void __iomem *regs = S3C_VA_UARTx(uart);
  62. save->ulcon = __raw_readl(regs + S3C2410_ULCON);
  63. save->ucon = __raw_readl(regs + S3C2410_UCON);
  64. save->ufcon = __raw_readl(regs + S3C2410_UFCON);
  65. save->umcon = __raw_readl(regs + S3C2410_UMCON);
  66. save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
  67. if (pm_uart_udivslot)
  68. save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);
  69. S3C_PMDBG("UART[%d]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
  70. uart, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
  71. }
  72. static void s3c_pm_save_uarts(void)
  73. {
  74. struct pm_uart_save *save = uart_save;
  75. unsigned int uart;
  76. for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
  77. s3c_pm_save_uart(uart, save);
  78. }
  79. static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
  80. {
  81. void __iomem *regs = S3C_VA_UARTx(uart);
  82. s3c_pm_arch_update_uart(regs, save);
  83. __raw_writel(save->ulcon, regs + S3C2410_ULCON);
  84. __raw_writel(save->ucon, regs + S3C2410_UCON);
  85. __raw_writel(save->ufcon, regs + S3C2410_UFCON);
  86. __raw_writel(save->umcon, regs + S3C2410_UMCON);
  87. __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
  88. if (pm_uart_udivslot)
  89. __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
  90. }
  91. static void s3c_pm_restore_uarts(void)
  92. {
  93. struct pm_uart_save *save = uart_save;
  94. unsigned int uart;
  95. for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
  96. s3c_pm_restore_uart(uart, save);
  97. }
  98. #else
  99. static void s3c_pm_save_uarts(void) { }
  100. static void s3c_pm_restore_uarts(void) { }
  101. #endif
  102. /* The IRQ ext-int code goes here, it is too small to currently bother
  103. * with its own file. */
  104. unsigned long s3c_irqwake_intmask = 0xffffffffL;
  105. unsigned long s3c_irqwake_eintmask = 0xffffffffL;
  106. int s3c_irqext_wake(struct irq_data *data, unsigned int state)
  107. {
  108. unsigned long bit = 1L << IRQ_EINT_BIT(data->irq);
  109. if (!(s3c_irqwake_eintallow & bit))
  110. return -ENOENT;
  111. printk(KERN_INFO "wake %s for irq %d\n",
  112. state ? "enabled" : "disabled", data->irq);
  113. if (!state)
  114. s3c_irqwake_eintmask |= bit;
  115. else
  116. s3c_irqwake_eintmask &= ~bit;
  117. return 0;
  118. }
  119. /* helper functions to save and restore register state */
  120. /**
  121. * s3c_pm_do_save() - save a set of registers for restoration on resume.
  122. * @ptr: Pointer to an array of registers.
  123. * @count: Size of the ptr array.
  124. *
  125. * Run through the list of registers given, saving their contents in the
  126. * array for later restoration when we wakeup.
  127. */
  128. void s3c_pm_do_save(struct sleep_save *ptr, int count)
  129. {
  130. for (; count > 0; count--, ptr++) {
  131. ptr->val = __raw_readl(ptr->reg);
  132. S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
  133. }
  134. }
  135. /**
  136. * s3c_pm_do_restore() - restore register values from the save list.
  137. * @ptr: Pointer to an array of registers.
  138. * @count: Size of the ptr array.
  139. *
  140. * Restore the register values saved from s3c_pm_do_save().
  141. *
  142. * Note, we do not use S3C_PMDBG() in here, as the system may not have
  143. * restore the UARTs state yet
  144. */
  145. void s3c_pm_do_restore(struct sleep_save *ptr, int count)
  146. {
  147. for (; count > 0; count--, ptr++) {
  148. printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
  149. ptr->reg, ptr->val, __raw_readl(ptr->reg));
  150. __raw_writel(ptr->val, ptr->reg);
  151. }
  152. }
  153. /**
  154. * s3c_pm_do_restore_core() - early restore register values from save list.
  155. *
  156. * This is similar to s3c_pm_do_restore() except we try and minimise the
  157. * side effects of the function in case registers that hardware might need
  158. * to work has been restored.
  159. *
  160. * WARNING: Do not put any debug in here that may effect memory or use
  161. * peripherals, as things may be changing!
  162. */
  163. void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)
  164. {
  165. for (; count > 0; count--, ptr++)
  166. __raw_writel(ptr->val, ptr->reg);
  167. }
  168. /* s3c2410_pm_show_resume_irqs
  169. *
  170. * print any IRQs asserted at resume time (ie, we woke from)
  171. */
  172. static void __maybe_unused s3c_pm_show_resume_irqs(int start,
  173. unsigned long which,
  174. unsigned long mask)
  175. {
  176. int i;
  177. which &= ~mask;
  178. for (i = 0; i <= 31; i++) {
  179. if (which & (1L<<i)) {
  180. S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
  181. }
  182. }
  183. }
  184. void (*pm_cpu_prep)(void);
  185. void (*pm_cpu_sleep)(void);
  186. #define any_allowed(mask, allow) (((mask) & (allow)) != (allow))
  187. /* s3c_pm_enter
  188. *
  189. * central control for sleep/resume process
  190. */
  191. static int s3c_pm_enter(suspend_state_t state)
  192. {
  193. /* ensure the debug is initialised (if enabled) */
  194. s3c_pm_debug_init();
  195. S3C_PMDBG("%s(%d)\n", __func__, state);
  196. if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
  197. printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
  198. return -EINVAL;
  199. }
  200. /* check if we have anything to wake-up with... bad things seem
  201. * to happen if you suspend with no wakeup (system will often
  202. * require a full power-cycle)
  203. */
  204. if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
  205. !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
  206. printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
  207. printk(KERN_ERR "%s: Aborting sleep\n", __func__);
  208. return -EINVAL;
  209. }
  210. /* save all necessary core registers not covered by the drivers */
  211. s3c_pm_save_gpios();
  212. s3c_pm_save_uarts();
  213. s3c_pm_save_core();
  214. /* set the irq configuration for wake */
  215. s3c_pm_configure_extint();
  216. S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
  217. s3c_irqwake_intmask, s3c_irqwake_eintmask);
  218. s3c_pm_arch_prepare_irqs();
  219. /* call cpu specific preparation */
  220. pm_cpu_prep();
  221. /* flush cache back to ram */
  222. flush_cache_all();
  223. s3c_pm_check_store();
  224. /* send the cpu to sleep... */
  225. s3c_pm_arch_stop_clocks();
  226. /* s3c_cpu_save will also act as our return point from when
  227. * we resume as it saves its own register state and restores it
  228. * during the resume. */
  229. s3c_cpu_save(0, PLAT_PHYS_OFFSET - PAGE_OFFSET);
  230. /* restore the cpu state using the kernel's cpu init code. */
  231. cpu_init();
  232. /* restore the system state */
  233. s3c_pm_restore_core();
  234. s3c_pm_restore_uarts();
  235. s3c_pm_restore_gpios();
  236. s3c_pm_debug_init();
  237. /* check what irq (if any) restored the system */
  238. s3c_pm_arch_show_resume_irqs();
  239. S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
  240. /* LEDs should now be 1110 */
  241. s3c_pm_debug_smdkled(1 << 1, 0);
  242. s3c_pm_check_restore();
  243. /* ok, let's return from sleep */
  244. S3C_PMDBG("S3C PM Resume (post-restore)\n");
  245. return 0;
  246. }
  247. static int s3c_pm_prepare(void)
  248. {
  249. /* prepare check area if configured */
  250. s3c_pm_check_prepare();
  251. return 0;
  252. }
  253. static void s3c_pm_finish(void)
  254. {
  255. s3c_pm_check_cleanup();
  256. }
  257. static const struct platform_suspend_ops s3c_pm_ops = {
  258. .enter = s3c_pm_enter,
  259. .prepare = s3c_pm_prepare,
  260. .finish = s3c_pm_finish,
  261. .valid = suspend_valid_only_mem,
  262. };
  263. /* s3c_pm_init
  264. *
  265. * Attach the power management functions. This should be called
  266. * from the board specific initialisation if the board supports
  267. * it.
  268. */
  269. int __init s3c_pm_init(void)
  270. {
  271. printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");
  272. suspend_set_ops(&s3c_pm_ops);
  273. return 0;
  274. }