sleep.S 2.6 KB

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  1. /* linux/arch/arm/plat-s3c24xx/sleep.S
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 Power Manager (Suspend-To-RAM) support
  7. *
  8. * Based on PXA/SA1100 sleep code by:
  9. * Nicolas Pitre, (c) 2002 Monta Vista Software Inc
  10. * Cliff Brake, (c) 2001
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/linkage.h>
  27. #include <asm/assembler.h>
  28. #include <mach/hardware.h>
  29. #include <mach/map.h>
  30. #include <mach/regs-gpio.h>
  31. #include <mach/regs-clock.h>
  32. #include <mach/regs-mem.h>
  33. #include <plat/regs-serial.h>
  34. /* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not
  35. * reset the UART configuration, only enable if you really need this!
  36. */
  37. //#define CONFIG_DEBUG_RESUME
  38. .text
  39. /* s3c_cpu_save
  40. *
  41. * entry:
  42. * r1 = v:p offset
  43. */
  44. ENTRY(s3c_cpu_save)
  45. stmfd sp!, { r4 - r12, lr }
  46. ldr r3, =resume_with_mmu
  47. bl cpu_suspend
  48. @@ jump to final code to send system to sleep
  49. ldr r0, =pm_cpu_sleep
  50. @@ldr pc, [ r0 ]
  51. ldr r0, [ r0 ]
  52. mov pc, r0
  53. @@ return to the caller, after having the MMU
  54. @@ turned on, this restores the last bits from the
  55. @@ stack
  56. resume_with_mmu:
  57. ldmfd sp!, { r4 - r12, pc }
  58. .ltorg
  59. /* sleep magic, to allow the bootloader to check for an valid
  60. * image to resume to. Must be the first word before the
  61. * s3c_cpu_resume entry.
  62. */
  63. .word 0x2bedf00d
  64. /* s3c_cpu_resume
  65. *
  66. * resume code entry for bootloader to call
  67. */
  68. ENTRY(s3c_cpu_resume)
  69. mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
  70. msr cpsr_c, r0
  71. @@ load UART to allow us to print the two characters for
  72. @@ resume debug
  73. mov r2, #S3C24XX_PA_UART & 0xff000000
  74. orr r2, r2, #S3C24XX_PA_UART & 0xff000
  75. #if 0
  76. /* SMDK2440 LED set */
  77. mov r14, #S3C24XX_PA_GPIO
  78. ldr r12, [ r14, #0x54 ]
  79. bic r12, r12, #3<<4
  80. orr r12, r12, #1<<7
  81. str r12, [ r14, #0x54 ]
  82. #endif
  83. #ifdef CONFIG_DEBUG_RESUME
  84. mov r3, #'L'
  85. strb r3, [ r2, #S3C2410_UTXH ]
  86. 1001:
  87. ldrb r14, [ r3, #S3C2410_UTRSTAT ]
  88. tst r14, #S3C2410_UTRSTAT_TXE
  89. beq 1001b
  90. #endif /* CONFIG_DEBUG_RESUME */
  91. b cpu_resume