timer.c 4.5 KB

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  1. /*
  2. * linux/arch/arm/plat-nomadik/timer.c
  3. *
  4. * Copyright (C) 2008 STMicroelectronics
  5. * Copyright (C) 2010 Alessandro Rubini
  6. * Copyright (C) 2010 Linus Walleij for ST-Ericsson
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2, as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/irq.h>
  15. #include <linux/io.h>
  16. #include <linux/clockchips.h>
  17. #include <linux/clk.h>
  18. #include <linux/jiffies.h>
  19. #include <linux/err.h>
  20. #include <linux/sched.h>
  21. #include <asm/mach/time.h>
  22. #include <asm/sched_clock.h>
  23. #include <plat/mtu.h>
  24. void __iomem *mtu_base; /* Assigned by machine code */
  25. /*
  26. * Override the global weak sched_clock symbol with this
  27. * local implementation which uses the clocksource to get some
  28. * better resolution when scheduling the kernel.
  29. */
  30. static DEFINE_CLOCK_DATA(cd);
  31. unsigned long long notrace sched_clock(void)
  32. {
  33. u32 cyc;
  34. if (unlikely(!mtu_base))
  35. return 0;
  36. cyc = -readl(mtu_base + MTU_VAL(0));
  37. return cyc_to_sched_clock(&cd, cyc, (u32)~0);
  38. }
  39. static void notrace nomadik_update_sched_clock(void)
  40. {
  41. u32 cyc = -readl(mtu_base + MTU_VAL(0));
  42. update_sched_clock(&cd, cyc, (u32)~0);
  43. }
  44. /* Clockevent device: use one-shot mode */
  45. static void nmdk_clkevt_mode(enum clock_event_mode mode,
  46. struct clock_event_device *dev)
  47. {
  48. u32 cr;
  49. switch (mode) {
  50. case CLOCK_EVT_MODE_PERIODIC:
  51. pr_err("%s: periodic mode not supported\n", __func__);
  52. break;
  53. case CLOCK_EVT_MODE_ONESHOT:
  54. /* Load highest value, enable device, enable interrupts */
  55. cr = readl(mtu_base + MTU_CR(1));
  56. writel(0, mtu_base + MTU_LR(1));
  57. writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(1));
  58. writel(1 << 1, mtu_base + MTU_IMSC);
  59. break;
  60. case CLOCK_EVT_MODE_SHUTDOWN:
  61. case CLOCK_EVT_MODE_UNUSED:
  62. /* disable irq */
  63. writel(0, mtu_base + MTU_IMSC);
  64. /* disable timer */
  65. cr = readl(mtu_base + MTU_CR(1));
  66. cr &= ~MTU_CRn_ENA;
  67. writel(cr, mtu_base + MTU_CR(1));
  68. /* load some high default value */
  69. writel(0xffffffff, mtu_base + MTU_LR(1));
  70. break;
  71. case CLOCK_EVT_MODE_RESUME:
  72. break;
  73. }
  74. }
  75. static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev)
  76. {
  77. /* writing the value has immediate effect */
  78. writel(evt, mtu_base + MTU_LR(1));
  79. return 0;
  80. }
  81. static struct clock_event_device nmdk_clkevt = {
  82. .name = "mtu_1",
  83. .features = CLOCK_EVT_FEAT_ONESHOT,
  84. .rating = 200,
  85. .set_mode = nmdk_clkevt_mode,
  86. .set_next_event = nmdk_clkevt_next,
  87. };
  88. /*
  89. * IRQ Handler for timer 1 of the MTU block.
  90. */
  91. static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id)
  92. {
  93. struct clock_event_device *evdev = dev_id;
  94. writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */
  95. evdev->event_handler(evdev);
  96. return IRQ_HANDLED;
  97. }
  98. static struct irqaction nmdk_timer_irq = {
  99. .name = "Nomadik Timer Tick",
  100. .flags = IRQF_DISABLED | IRQF_TIMER,
  101. .handler = nmdk_timer_interrupt,
  102. .dev_id = &nmdk_clkevt,
  103. };
  104. void __init nmdk_timer_init(void)
  105. {
  106. unsigned long rate;
  107. struct clk *clk0;
  108. u32 cr = MTU_CRn_32BITS;
  109. clk0 = clk_get_sys("mtu0", NULL);
  110. BUG_ON(IS_ERR(clk0));
  111. clk_enable(clk0);
  112. /*
  113. * Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
  114. * for ux500.
  115. * Use a divide-by-16 counter if the tick rate is more than 32MHz.
  116. * At 32 MHz, the timer (with 32 bit counter) can be programmed
  117. * to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer
  118. * with 16 gives too low timer resolution.
  119. */
  120. rate = clk_get_rate(clk0);
  121. if (rate > 32000000) {
  122. rate /= 16;
  123. cr |= MTU_CRn_PRESCALE_16;
  124. } else {
  125. cr |= MTU_CRn_PRESCALE_1;
  126. }
  127. /* Timer 0 is the free running clocksource */
  128. writel(cr, mtu_base + MTU_CR(0));
  129. writel(0, mtu_base + MTU_LR(0));
  130. writel(0, mtu_base + MTU_BGLR(0));
  131. writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0));
  132. if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",
  133. rate, 200, 32, clocksource_mmio_readl_down))
  134. pr_err("timer: failed to initialize clock source %s\n",
  135. "mtu_0");
  136. init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate);
  137. /* Timer 1 is used for events */
  138. clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE);
  139. writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */
  140. nmdk_clkevt.max_delta_ns =
  141. clockevent_delta2ns(0xffffffff, &nmdk_clkevt);
  142. nmdk_clkevt.min_delta_ns =
  143. clockevent_delta2ns(0x00000002, &nmdk_clkevt);
  144. nmdk_clkevt.cpumask = cpumask_of(0);
  145. /* Register irq and clockevents */
  146. setup_irq(IRQ_MTU0, &nmdk_timer_irq);
  147. clockevents_register_device(&nmdk_clkevt);
  148. }