3ds_debugboard.c 5.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197
  1. /*
  2. * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
  3. * Copyright (C) 2010 Jason Wang <jason77.wang@gmail.com>
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <linux/interrupt.h>
  13. #include <linux/irq.h>
  14. #include <linux/io.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/gpio.h>
  17. #include <linux/smsc911x.h>
  18. #include <mach/hardware.h>
  19. /* LAN9217 ethernet base address */
  20. #define LAN9217_BASE_ADDR(n) (n + 0x0)
  21. /* External UART */
  22. #define UARTA_BASE_ADDR(n) (n + 0x8000)
  23. #define UARTB_BASE_ADDR(n) (n + 0x10000)
  24. #define BOARD_IO_ADDR(n) (n + 0x20000)
  25. /* LED switchs */
  26. #define LED_SWITCH_REG 0x00
  27. /* buttons */
  28. #define SWITCH_BUTTONS_REG 0x08
  29. /* status, interrupt */
  30. #define INTR_STATUS_REG 0x10
  31. #define INTR_MASK_REG 0x38
  32. #define INTR_RESET_REG 0x20
  33. /* magic word for debug CPLD */
  34. #define MAGIC_NUMBER1_REG 0x40
  35. #define MAGIC_NUMBER2_REG 0x48
  36. /* CPLD code version */
  37. #define CPLD_CODE_VER_REG 0x50
  38. /* magic word for debug CPLD */
  39. #define MAGIC_NUMBER3_REG 0x58
  40. /* module reset register*/
  41. #define MODULE_RESET_REG 0x60
  42. /* CPU ID and Personality ID */
  43. #define MCU_BOARD_ID_REG 0x68
  44. #define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_BOARD_IRQ_START)
  45. #define MXC_IRQ_TO_GPIO(irq) ((irq) - MXC_INTERNAL_IRQS)
  46. #define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START)
  47. #define MXC_MAX_EXP_IO_LINES 16
  48. /* interrupts like external uart , external ethernet etc*/
  49. #define EXPIO_INT_ENET (MXC_BOARD_IRQ_START + 0)
  50. #define EXPIO_INT_XUART_A (MXC_BOARD_IRQ_START + 1)
  51. #define EXPIO_INT_XUART_B (MXC_BOARD_IRQ_START + 2)
  52. #define EXPIO_INT_BUTTON_A (MXC_BOARD_IRQ_START + 3)
  53. #define EXPIO_INT_BUTTON_B (MXC_BOARD_IRQ_START + 4)
  54. static void __iomem *brd_io;
  55. static struct resource smsc911x_resources[] = {
  56. {
  57. .flags = IORESOURCE_MEM,
  58. } , {
  59. .start = EXPIO_INT_ENET,
  60. .end = EXPIO_INT_ENET,
  61. .flags = IORESOURCE_IRQ,
  62. },
  63. };
  64. static struct smsc911x_platform_config smsc911x_config = {
  65. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  66. .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
  67. };
  68. static struct platform_device smsc_lan9217_device = {
  69. .name = "smsc911x",
  70. .id = 0,
  71. .dev = {
  72. .platform_data = &smsc911x_config,
  73. },
  74. .num_resources = ARRAY_SIZE(smsc911x_resources),
  75. .resource = smsc911x_resources,
  76. };
  77. static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc)
  78. {
  79. u32 imr_val;
  80. u32 int_valid;
  81. u32 expio_irq;
  82. /* irq = gpio irq number */
  83. desc->irq_data.chip->irq_mask(&desc->irq_data);
  84. imr_val = __raw_readw(brd_io + INTR_MASK_REG);
  85. int_valid = __raw_readw(brd_io + INTR_STATUS_REG) & ~imr_val;
  86. expio_irq = MXC_BOARD_IRQ_START;
  87. for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
  88. if ((int_valid & 1) == 0)
  89. continue;
  90. generic_handle_irq(expio_irq);
  91. }
  92. desc->irq_data.chip->irq_ack(&desc->irq_data);
  93. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  94. }
  95. /*
  96. * Disable an expio pin's interrupt by setting the bit in the imr.
  97. * Irq is an expio virtual irq number
  98. */
  99. static void expio_mask_irq(struct irq_data *d)
  100. {
  101. u16 reg;
  102. u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
  103. reg = __raw_readw(brd_io + INTR_MASK_REG);
  104. reg |= (1 << expio);
  105. __raw_writew(reg, brd_io + INTR_MASK_REG);
  106. }
  107. static void expio_ack_irq(struct irq_data *d)
  108. {
  109. u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
  110. __raw_writew(1 << expio, brd_io + INTR_RESET_REG);
  111. __raw_writew(0, brd_io + INTR_RESET_REG);
  112. expio_mask_irq(d);
  113. }
  114. static void expio_unmask_irq(struct irq_data *d)
  115. {
  116. u16 reg;
  117. u32 expio = MXC_IRQ_TO_EXPIO(d->irq);
  118. reg = __raw_readw(brd_io + INTR_MASK_REG);
  119. reg &= ~(1 << expio);
  120. __raw_writew(reg, brd_io + INTR_MASK_REG);
  121. }
  122. static struct irq_chip expio_irq_chip = {
  123. .irq_ack = expio_ack_irq,
  124. .irq_mask = expio_mask_irq,
  125. .irq_unmask = expio_unmask_irq,
  126. };
  127. int __init mxc_expio_init(u32 base, u32 p_irq)
  128. {
  129. int i;
  130. brd_io = ioremap(BOARD_IO_ADDR(base), SZ_4K);
  131. if (brd_io == NULL)
  132. return -ENOMEM;
  133. if ((__raw_readw(brd_io + MAGIC_NUMBER1_REG) != 0xAAAA) ||
  134. (__raw_readw(brd_io + MAGIC_NUMBER2_REG) != 0x5555) ||
  135. (__raw_readw(brd_io + MAGIC_NUMBER3_REG) != 0xCAFE)) {
  136. pr_info("3-Stack Debug board not detected\n");
  137. iounmap(brd_io);
  138. brd_io = NULL;
  139. return -ENODEV;
  140. }
  141. pr_info("3-Stack Debug board detected, rev = 0x%04X\n",
  142. readw(brd_io + CPLD_CODE_VER_REG));
  143. /*
  144. * Configure INT line as GPIO input
  145. */
  146. gpio_request(MXC_IRQ_TO_GPIO(p_irq), "expio_pirq");
  147. gpio_direction_input(MXC_IRQ_TO_GPIO(p_irq));
  148. /* disable the interrupt and clear the status */
  149. __raw_writew(0, brd_io + INTR_MASK_REG);
  150. __raw_writew(0xFFFF, brd_io + INTR_RESET_REG);
  151. __raw_writew(0, brd_io + INTR_RESET_REG);
  152. __raw_writew(0x1F, brd_io + INTR_MASK_REG);
  153. for (i = MXC_EXP_IO_BASE;
  154. i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) {
  155. irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
  156. set_irq_flags(i, IRQF_VALID);
  157. }
  158. irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW);
  159. irq_set_chained_handler(p_irq, mxc_expio_irq_handler);
  160. /* Register Lan device on the debugboard */
  161. smsc911x_resources[0].start = LAN9217_BASE_ADDR(base);
  162. smsc911x_resources[0].end = LAN9217_BASE_ADDR(base) + 0x100 - 1;
  163. platform_device_register(&smsc_lan9217_device);
  164. return 0;
  165. }