devices.c 12 KB

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  1. /*
  2. * Copyright (C) 2010,2011 Google, Inc.
  3. *
  4. * Author:
  5. * Colin Cross <ccross@android.com>
  6. * Erik Gilling <ccross@android.com>
  7. *
  8. * This software is licensed under the terms of the GNU General Public
  9. * License version 2, as published by the Free Software Foundation, and
  10. * may be copied, distributed, and modified under those terms.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. */
  18. #include <linux/resource.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/fsl_devices.h>
  22. #include <linux/serial_8250.h>
  23. #include <asm/pmu.h>
  24. #include <mach/irqs.h>
  25. #include <mach/iomap.h>
  26. #include <mach/dma.h>
  27. static struct resource i2c_resource1[] = {
  28. [0] = {
  29. .start = INT_I2C,
  30. .end = INT_I2C,
  31. .flags = IORESOURCE_IRQ,
  32. },
  33. [1] = {
  34. .start = TEGRA_I2C_BASE,
  35. .end = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
  36. .flags = IORESOURCE_MEM,
  37. },
  38. };
  39. static struct resource i2c_resource2[] = {
  40. [0] = {
  41. .start = INT_I2C2,
  42. .end = INT_I2C2,
  43. .flags = IORESOURCE_IRQ,
  44. },
  45. [1] = {
  46. .start = TEGRA_I2C2_BASE,
  47. .end = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
  48. .flags = IORESOURCE_MEM,
  49. },
  50. };
  51. static struct resource i2c_resource3[] = {
  52. [0] = {
  53. .start = INT_I2C3,
  54. .end = INT_I2C3,
  55. .flags = IORESOURCE_IRQ,
  56. },
  57. [1] = {
  58. .start = TEGRA_I2C3_BASE,
  59. .end = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
  60. .flags = IORESOURCE_MEM,
  61. },
  62. };
  63. static struct resource i2c_resource4[] = {
  64. [0] = {
  65. .start = INT_DVC,
  66. .end = INT_DVC,
  67. .flags = IORESOURCE_IRQ,
  68. },
  69. [1] = {
  70. .start = TEGRA_DVC_BASE,
  71. .end = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. };
  75. struct platform_device tegra_i2c_device1 = {
  76. .name = "tegra-i2c",
  77. .id = 0,
  78. .resource = i2c_resource1,
  79. .num_resources = ARRAY_SIZE(i2c_resource1),
  80. .dev = {
  81. .platform_data = 0,
  82. },
  83. };
  84. struct platform_device tegra_i2c_device2 = {
  85. .name = "tegra-i2c",
  86. .id = 1,
  87. .resource = i2c_resource2,
  88. .num_resources = ARRAY_SIZE(i2c_resource2),
  89. .dev = {
  90. .platform_data = 0,
  91. },
  92. };
  93. struct platform_device tegra_i2c_device3 = {
  94. .name = "tegra-i2c",
  95. .id = 2,
  96. .resource = i2c_resource3,
  97. .num_resources = ARRAY_SIZE(i2c_resource3),
  98. .dev = {
  99. .platform_data = 0,
  100. },
  101. };
  102. struct platform_device tegra_i2c_device4 = {
  103. .name = "tegra-i2c",
  104. .id = 3,
  105. .resource = i2c_resource4,
  106. .num_resources = ARRAY_SIZE(i2c_resource4),
  107. .dev = {
  108. .platform_data = 0,
  109. },
  110. };
  111. static struct resource spi_resource1[] = {
  112. [0] = {
  113. .start = INT_S_LINK1,
  114. .end = INT_S_LINK1,
  115. .flags = IORESOURCE_IRQ,
  116. },
  117. [1] = {
  118. .start = TEGRA_SPI1_BASE,
  119. .end = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
  120. .flags = IORESOURCE_MEM,
  121. },
  122. };
  123. static struct resource spi_resource2[] = {
  124. [0] = {
  125. .start = INT_SPI_2,
  126. .end = INT_SPI_2,
  127. .flags = IORESOURCE_IRQ,
  128. },
  129. [1] = {
  130. .start = TEGRA_SPI2_BASE,
  131. .end = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
  132. .flags = IORESOURCE_MEM,
  133. },
  134. };
  135. static struct resource spi_resource3[] = {
  136. [0] = {
  137. .start = INT_SPI_3,
  138. .end = INT_SPI_3,
  139. .flags = IORESOURCE_IRQ,
  140. },
  141. [1] = {
  142. .start = TEGRA_SPI3_BASE,
  143. .end = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
  144. .flags = IORESOURCE_MEM,
  145. },
  146. };
  147. static struct resource spi_resource4[] = {
  148. [0] = {
  149. .start = INT_SPI_4,
  150. .end = INT_SPI_4,
  151. .flags = IORESOURCE_IRQ,
  152. },
  153. [1] = {
  154. .start = TEGRA_SPI4_BASE,
  155. .end = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
  156. .flags = IORESOURCE_MEM,
  157. },
  158. };
  159. struct platform_device tegra_spi_device1 = {
  160. .name = "spi_tegra",
  161. .id = 0,
  162. .resource = spi_resource1,
  163. .num_resources = ARRAY_SIZE(spi_resource1),
  164. .dev = {
  165. .coherent_dma_mask = 0xffffffff,
  166. },
  167. };
  168. struct platform_device tegra_spi_device2 = {
  169. .name = "spi_tegra",
  170. .id = 1,
  171. .resource = spi_resource2,
  172. .num_resources = ARRAY_SIZE(spi_resource2),
  173. .dev = {
  174. .coherent_dma_mask = 0xffffffff,
  175. },
  176. };
  177. struct platform_device tegra_spi_device3 = {
  178. .name = "spi_tegra",
  179. .id = 2,
  180. .resource = spi_resource3,
  181. .num_resources = ARRAY_SIZE(spi_resource3),
  182. .dev = {
  183. .coherent_dma_mask = 0xffffffff,
  184. },
  185. };
  186. struct platform_device tegra_spi_device4 = {
  187. .name = "spi_tegra",
  188. .id = 3,
  189. .resource = spi_resource4,
  190. .num_resources = ARRAY_SIZE(spi_resource4),
  191. .dev = {
  192. .coherent_dma_mask = 0xffffffff,
  193. },
  194. };
  195. static struct resource sdhci_resource1[] = {
  196. [0] = {
  197. .start = INT_SDMMC1,
  198. .end = INT_SDMMC1,
  199. .flags = IORESOURCE_IRQ,
  200. },
  201. [1] = {
  202. .start = TEGRA_SDMMC1_BASE,
  203. .end = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
  204. .flags = IORESOURCE_MEM,
  205. },
  206. };
  207. static struct resource sdhci_resource2[] = {
  208. [0] = {
  209. .start = INT_SDMMC2,
  210. .end = INT_SDMMC2,
  211. .flags = IORESOURCE_IRQ,
  212. },
  213. [1] = {
  214. .start = TEGRA_SDMMC2_BASE,
  215. .end = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
  216. .flags = IORESOURCE_MEM,
  217. },
  218. };
  219. static struct resource sdhci_resource3[] = {
  220. [0] = {
  221. .start = INT_SDMMC3,
  222. .end = INT_SDMMC3,
  223. .flags = IORESOURCE_IRQ,
  224. },
  225. [1] = {
  226. .start = TEGRA_SDMMC3_BASE,
  227. .end = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
  228. .flags = IORESOURCE_MEM,
  229. },
  230. };
  231. static struct resource sdhci_resource4[] = {
  232. [0] = {
  233. .start = INT_SDMMC4,
  234. .end = INT_SDMMC4,
  235. .flags = IORESOURCE_IRQ,
  236. },
  237. [1] = {
  238. .start = TEGRA_SDMMC4_BASE,
  239. .end = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
  240. .flags = IORESOURCE_MEM,
  241. },
  242. };
  243. /* board files should fill in platform_data register the devices themselvs.
  244. * See board-harmony.c for an example
  245. */
  246. struct platform_device tegra_sdhci_device1 = {
  247. .name = "sdhci-tegra",
  248. .id = 0,
  249. .resource = sdhci_resource1,
  250. .num_resources = ARRAY_SIZE(sdhci_resource1),
  251. };
  252. struct platform_device tegra_sdhci_device2 = {
  253. .name = "sdhci-tegra",
  254. .id = 1,
  255. .resource = sdhci_resource2,
  256. .num_resources = ARRAY_SIZE(sdhci_resource2),
  257. };
  258. struct platform_device tegra_sdhci_device3 = {
  259. .name = "sdhci-tegra",
  260. .id = 2,
  261. .resource = sdhci_resource3,
  262. .num_resources = ARRAY_SIZE(sdhci_resource3),
  263. };
  264. struct platform_device tegra_sdhci_device4 = {
  265. .name = "sdhci-tegra",
  266. .id = 3,
  267. .resource = sdhci_resource4,
  268. .num_resources = ARRAY_SIZE(sdhci_resource4),
  269. };
  270. static struct resource tegra_usb1_resources[] = {
  271. [0] = {
  272. .start = TEGRA_USB_BASE,
  273. .end = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
  274. .flags = IORESOURCE_MEM,
  275. },
  276. [1] = {
  277. .start = INT_USB,
  278. .end = INT_USB,
  279. .flags = IORESOURCE_IRQ,
  280. },
  281. };
  282. static struct resource tegra_usb2_resources[] = {
  283. [0] = {
  284. .start = TEGRA_USB2_BASE,
  285. .end = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
  286. .flags = IORESOURCE_MEM,
  287. },
  288. [1] = {
  289. .start = INT_USB2,
  290. .end = INT_USB2,
  291. .flags = IORESOURCE_IRQ,
  292. },
  293. };
  294. static struct resource tegra_usb3_resources[] = {
  295. [0] = {
  296. .start = TEGRA_USB3_BASE,
  297. .end = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
  298. .flags = IORESOURCE_MEM,
  299. },
  300. [1] = {
  301. .start = INT_USB3,
  302. .end = INT_USB3,
  303. .flags = IORESOURCE_IRQ,
  304. },
  305. };
  306. static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
  307. struct platform_device tegra_ehci1_device = {
  308. .name = "tegra-ehci",
  309. .id = 0,
  310. .dev = {
  311. .dma_mask = &tegra_ehci_dmamask,
  312. .coherent_dma_mask = DMA_BIT_MASK(32),
  313. },
  314. .resource = tegra_usb1_resources,
  315. .num_resources = ARRAY_SIZE(tegra_usb1_resources),
  316. };
  317. struct platform_device tegra_ehci2_device = {
  318. .name = "tegra-ehci",
  319. .id = 1,
  320. .dev = {
  321. .dma_mask = &tegra_ehci_dmamask,
  322. .coherent_dma_mask = DMA_BIT_MASK(32),
  323. },
  324. .resource = tegra_usb2_resources,
  325. .num_resources = ARRAY_SIZE(tegra_usb2_resources),
  326. };
  327. struct platform_device tegra_ehci3_device = {
  328. .name = "tegra-ehci",
  329. .id = 2,
  330. .dev = {
  331. .dma_mask = &tegra_ehci_dmamask,
  332. .coherent_dma_mask = DMA_BIT_MASK(32),
  333. },
  334. .resource = tegra_usb3_resources,
  335. .num_resources = ARRAY_SIZE(tegra_usb3_resources),
  336. };
  337. static struct resource tegra_pmu_resources[] = {
  338. [0] = {
  339. .start = INT_CPU0_PMU_INTR,
  340. .end = INT_CPU0_PMU_INTR,
  341. .flags = IORESOURCE_IRQ,
  342. },
  343. [1] = {
  344. .start = INT_CPU1_PMU_INTR,
  345. .end = INT_CPU1_PMU_INTR,
  346. .flags = IORESOURCE_IRQ,
  347. },
  348. };
  349. struct platform_device tegra_pmu_device = {
  350. .name = "arm-pmu",
  351. .id = ARM_PMU_DEVICE_CPU,
  352. .num_resources = ARRAY_SIZE(tegra_pmu_resources),
  353. .resource = tegra_pmu_resources,
  354. };
  355. static struct resource tegra_uarta_resources[] = {
  356. [0] = {
  357. .start = TEGRA_UARTA_BASE,
  358. .end = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
  359. .flags = IORESOURCE_MEM,
  360. },
  361. [1] = {
  362. .start = INT_UARTA,
  363. .end = INT_UARTA,
  364. .flags = IORESOURCE_IRQ,
  365. },
  366. };
  367. static struct resource tegra_uartb_resources[] = {
  368. [0] = {
  369. .start = TEGRA_UARTB_BASE,
  370. .end = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
  371. .flags = IORESOURCE_MEM,
  372. },
  373. [1] = {
  374. .start = INT_UARTB,
  375. .end = INT_UARTB,
  376. .flags = IORESOURCE_IRQ,
  377. },
  378. };
  379. static struct resource tegra_uartc_resources[] = {
  380. [0] = {
  381. .start = TEGRA_UARTC_BASE,
  382. .end = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
  383. .flags = IORESOURCE_MEM,
  384. },
  385. [1] = {
  386. .start = INT_UARTC,
  387. .end = INT_UARTC,
  388. .flags = IORESOURCE_IRQ,
  389. },
  390. };
  391. static struct resource tegra_uartd_resources[] = {
  392. [0] = {
  393. .start = TEGRA_UARTD_BASE,
  394. .end = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
  395. .flags = IORESOURCE_MEM,
  396. },
  397. [1] = {
  398. .start = INT_UARTD,
  399. .end = INT_UARTD,
  400. .flags = IORESOURCE_IRQ,
  401. },
  402. };
  403. static struct resource tegra_uarte_resources[] = {
  404. [0] = {
  405. .start = TEGRA_UARTE_BASE,
  406. .end = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
  407. .flags = IORESOURCE_MEM,
  408. },
  409. [1] = {
  410. .start = INT_UARTE,
  411. .end = INT_UARTE,
  412. .flags = IORESOURCE_IRQ,
  413. },
  414. };
  415. struct platform_device tegra_uarta_device = {
  416. .name = "tegra_uart",
  417. .id = 0,
  418. .num_resources = ARRAY_SIZE(tegra_uarta_resources),
  419. .resource = tegra_uarta_resources,
  420. .dev = {
  421. .coherent_dma_mask = DMA_BIT_MASK(32),
  422. },
  423. };
  424. struct platform_device tegra_uartb_device = {
  425. .name = "tegra_uart",
  426. .id = 1,
  427. .num_resources = ARRAY_SIZE(tegra_uartb_resources),
  428. .resource = tegra_uartb_resources,
  429. .dev = {
  430. .coherent_dma_mask = DMA_BIT_MASK(32),
  431. },
  432. };
  433. struct platform_device tegra_uartc_device = {
  434. .name = "tegra_uart",
  435. .id = 2,
  436. .num_resources = ARRAY_SIZE(tegra_uartc_resources),
  437. .resource = tegra_uartc_resources,
  438. .dev = {
  439. .coherent_dma_mask = DMA_BIT_MASK(32),
  440. },
  441. };
  442. struct platform_device tegra_uartd_device = {
  443. .name = "tegra_uart",
  444. .id = 3,
  445. .num_resources = ARRAY_SIZE(tegra_uartd_resources),
  446. .resource = tegra_uartd_resources,
  447. .dev = {
  448. .coherent_dma_mask = DMA_BIT_MASK(32),
  449. },
  450. };
  451. struct platform_device tegra_uarte_device = {
  452. .name = "tegra_uart",
  453. .id = 4,
  454. .num_resources = ARRAY_SIZE(tegra_uarte_resources),
  455. .resource = tegra_uarte_resources,
  456. .dev = {
  457. .coherent_dma_mask = DMA_BIT_MASK(32),
  458. },
  459. };
  460. static struct resource i2s_resource1[] = {
  461. [0] = {
  462. .start = INT_I2S1,
  463. .end = INT_I2S1,
  464. .flags = IORESOURCE_IRQ
  465. },
  466. [1] = {
  467. .start = TEGRA_DMA_REQ_SEL_I2S_1,
  468. .end = TEGRA_DMA_REQ_SEL_I2S_1,
  469. .flags = IORESOURCE_DMA
  470. },
  471. [2] = {
  472. .start = TEGRA_I2S1_BASE,
  473. .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
  474. .flags = IORESOURCE_MEM
  475. }
  476. };
  477. static struct resource i2s_resource2[] = {
  478. [0] = {
  479. .start = INT_I2S2,
  480. .end = INT_I2S2,
  481. .flags = IORESOURCE_IRQ
  482. },
  483. [1] = {
  484. .start = TEGRA_DMA_REQ_SEL_I2S2_1,
  485. .end = TEGRA_DMA_REQ_SEL_I2S2_1,
  486. .flags = IORESOURCE_DMA
  487. },
  488. [2] = {
  489. .start = TEGRA_I2S2_BASE,
  490. .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
  491. .flags = IORESOURCE_MEM
  492. }
  493. };
  494. struct platform_device tegra_i2s_device1 = {
  495. .name = "tegra-i2s",
  496. .id = 0,
  497. .resource = i2s_resource1,
  498. .num_resources = ARRAY_SIZE(i2s_resource1),
  499. };
  500. struct platform_device tegra_i2s_device2 = {
  501. .name = "tegra-i2s",
  502. .id = 1,
  503. .resource = i2s_resource2,
  504. .num_resources = ARRAY_SIZE(i2s_resource2),
  505. };
  506. static struct resource tegra_das_resources[] = {
  507. [0] = {
  508. .start = TEGRA_APB_MISC_DAS_BASE,
  509. .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
  510. .flags = IORESOURCE_MEM,
  511. },
  512. };
  513. struct platform_device tegra_das_device = {
  514. .name = "tegra-das",
  515. .id = -1,
  516. .num_resources = ARRAY_SIZE(tegra_das_resources),
  517. .resource = tegra_das_resources,
  518. };
  519. struct platform_device tegra_pcm_device = {
  520. .name = "tegra-pcm-audio",
  521. .id = -1,
  522. };