board-ap4evb.c 32 KB

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  1. /*
  2. * AP4EVB board support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/mfd/tmio.h>
  28. #include <linux/mmc/host.h>
  29. #include <linux/mmc/sh_mobile_sdhi.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/mtd/partitions.h>
  32. #include <linux/mtd/physmap.h>
  33. #include <linux/mmc/sh_mmcif.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c/tsc2007.h>
  36. #include <linux/io.h>
  37. #include <linux/smsc911x.h>
  38. #include <linux/sh_intc.h>
  39. #include <linux/sh_clk.h>
  40. #include <linux/gpio.h>
  41. #include <linux/input.h>
  42. #include <linux/leds.h>
  43. #include <linux/input/sh_keysc.h>
  44. #include <linux/usb/r8a66597.h>
  45. #include <media/sh_mobile_ceu.h>
  46. #include <media/sh_mobile_csi2.h>
  47. #include <media/soc_camera.h>
  48. #include <sound/sh_fsi.h>
  49. #include <video/sh_mobile_hdmi.h>
  50. #include <video/sh_mobile_lcdc.h>
  51. #include <video/sh_mipi_dsi.h>
  52. #include <mach/common.h>
  53. #include <mach/irqs.h>
  54. #include <mach/sh7372.h>
  55. #include <asm/mach-types.h>
  56. #include <asm/mach/arch.h>
  57. #include <asm/mach/map.h>
  58. #include <asm/mach/time.h>
  59. #include <asm/setup.h>
  60. /*
  61. * Address Interface BusWidth note
  62. * ------------------------------------------------------------------
  63. * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
  64. * 0x0800_0000 user area -
  65. * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
  66. * 0x1400_0000 Ether (LAN9220) 16bit
  67. * 0x1600_0000 user area - cannot use with NAND
  68. * 0x1800_0000 user area -
  69. * 0x1A00_0000 -
  70. * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
  71. */
  72. /*
  73. * NOR Flash ROM
  74. *
  75. * SW1 | SW2 | SW7 | NOR Flash ROM
  76. * bit1 | bit1 bit2 | bit1 | Memory allocation
  77. * ------+------------+------+------------------
  78. * OFF | ON OFF | ON | Area 0
  79. * OFF | ON OFF | OFF | Area 4
  80. */
  81. /*
  82. * NAND Flash ROM
  83. *
  84. * SW1 | SW2 | SW7 | NAND Flash ROM
  85. * bit1 | bit1 bit2 | bit2 | Memory allocation
  86. * ------+------------+------+------------------
  87. * OFF | ON OFF | ON | FCE 0
  88. * OFF | ON OFF | OFF | FCE 1
  89. */
  90. /*
  91. * SMSC 9220
  92. *
  93. * SW1 SMSC 9220
  94. * -----------------------
  95. * ON access disable
  96. * OFF access enable
  97. */
  98. /*
  99. * LCD / IRQ / KEYSC / IrDA
  100. *
  101. * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
  102. * LCD = 2nd LCDC (WVGA)
  103. *
  104. * | SW43 |
  105. * SW3 | ON | OFF |
  106. * -------------+-----------------------+---------------+
  107. * ON | KEY / IrDA | LCD |
  108. * OFF | KEY / IrDA / IRQ | IRQ |
  109. *
  110. *
  111. * QHD / WVGA display
  112. *
  113. * You can choice display type on menuconfig.
  114. * Then, check above dip-switch.
  115. */
  116. /*
  117. * USB
  118. *
  119. * J7 : 1-2 MAX3355E VBUS
  120. * 2-3 DC 5.0V
  121. *
  122. * S39: bit2: off
  123. */
  124. /*
  125. * FSI/FSMI
  126. *
  127. * SW41 : ON : SH-Mobile AP4 Audio Mode
  128. * : OFF : Bluetooth Audio Mode
  129. */
  130. /*
  131. * MMC0/SDHI1 (CN7)
  132. *
  133. * J22 : select card voltage
  134. * 1-2 pin : 1.8v
  135. * 2-3 pin : 3.3v
  136. *
  137. * SW1 | SW33
  138. * | bit1 | bit2 | bit3 | bit4
  139. * ------------+------+------+------+-------
  140. * MMC0 OFF | OFF | ON | ON | X
  141. * SDHI1 OFF | ON | X | OFF | ON
  142. *
  143. * voltage lebel
  144. * CN7 : 1.8v
  145. * CN12: 3.3v
  146. */
  147. /* MTD */
  148. static struct mtd_partition nor_flash_partitions[] = {
  149. {
  150. .name = "loader",
  151. .offset = 0x00000000,
  152. .size = 512 * 1024,
  153. .mask_flags = MTD_WRITEABLE,
  154. },
  155. {
  156. .name = "bootenv",
  157. .offset = MTDPART_OFS_APPEND,
  158. .size = 512 * 1024,
  159. .mask_flags = MTD_WRITEABLE,
  160. },
  161. {
  162. .name = "kernel_ro",
  163. .offset = MTDPART_OFS_APPEND,
  164. .size = 8 * 1024 * 1024,
  165. .mask_flags = MTD_WRITEABLE,
  166. },
  167. {
  168. .name = "kernel",
  169. .offset = MTDPART_OFS_APPEND,
  170. .size = 8 * 1024 * 1024,
  171. },
  172. {
  173. .name = "data",
  174. .offset = MTDPART_OFS_APPEND,
  175. .size = MTDPART_SIZ_FULL,
  176. },
  177. };
  178. static struct physmap_flash_data nor_flash_data = {
  179. .width = 2,
  180. .parts = nor_flash_partitions,
  181. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  182. };
  183. static struct resource nor_flash_resources[] = {
  184. [0] = {
  185. .start = 0x00000000,
  186. .end = 0x08000000 - 1,
  187. .flags = IORESOURCE_MEM,
  188. }
  189. };
  190. static struct platform_device nor_flash_device = {
  191. .name = "physmap-flash",
  192. .dev = {
  193. .platform_data = &nor_flash_data,
  194. },
  195. .num_resources = ARRAY_SIZE(nor_flash_resources),
  196. .resource = nor_flash_resources,
  197. };
  198. /* SMSC 9220 */
  199. static struct resource smc911x_resources[] = {
  200. {
  201. .start = 0x14000000,
  202. .end = 0x16000000 - 1,
  203. .flags = IORESOURCE_MEM,
  204. }, {
  205. .start = evt2irq(0x02c0) /* IRQ6A */,
  206. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  207. },
  208. };
  209. static struct smsc911x_platform_config smsc911x_info = {
  210. .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
  211. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  212. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  213. };
  214. static struct platform_device smc911x_device = {
  215. .name = "smsc911x",
  216. .id = -1,
  217. .num_resources = ARRAY_SIZE(smc911x_resources),
  218. .resource = smc911x_resources,
  219. .dev = {
  220. .platform_data = &smsc911x_info,
  221. },
  222. };
  223. /*
  224. * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  225. * connected to GPIO A22 of SH7372 (GPIO_PORT41).
  226. */
  227. static int slot_cn7_get_cd(struct platform_device *pdev)
  228. {
  229. return !gpio_get_value(GPIO_PORT41);
  230. }
  231. /* MERAM */
  232. static struct sh_mobile_meram_info meram_info = {
  233. .addr_mode = SH_MOBILE_MERAM_MODE1,
  234. };
  235. static struct resource meram_resources[] = {
  236. [0] = {
  237. .name = "MERAM",
  238. .start = 0xe8000000,
  239. .end = 0xe81fffff,
  240. .flags = IORESOURCE_MEM,
  241. },
  242. };
  243. static struct platform_device meram_device = {
  244. .name = "sh_mobile_meram",
  245. .id = 0,
  246. .num_resources = ARRAY_SIZE(meram_resources),
  247. .resource = meram_resources,
  248. .dev = {
  249. .platform_data = &meram_info,
  250. },
  251. };
  252. /* SH_MMCIF */
  253. static struct resource sh_mmcif_resources[] = {
  254. [0] = {
  255. .name = "MMCIF",
  256. .start = 0xE6BD0000,
  257. .end = 0xE6BD00FF,
  258. .flags = IORESOURCE_MEM,
  259. },
  260. [1] = {
  261. /* MMC ERR */
  262. .start = evt2irq(0x1ac0),
  263. .flags = IORESOURCE_IRQ,
  264. },
  265. [2] = {
  266. /* MMC NOR */
  267. .start = evt2irq(0x1ae0),
  268. .flags = IORESOURCE_IRQ,
  269. },
  270. };
  271. static struct sh_mmcif_dma sh_mmcif_dma = {
  272. .chan_priv_rx = {
  273. .slave_id = SHDMA_SLAVE_MMCIF_RX,
  274. },
  275. .chan_priv_tx = {
  276. .slave_id = SHDMA_SLAVE_MMCIF_TX,
  277. },
  278. };
  279. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  280. .sup_pclk = 0,
  281. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  282. .caps = MMC_CAP_4_BIT_DATA |
  283. MMC_CAP_8_BIT_DATA |
  284. MMC_CAP_NEEDS_POLL,
  285. .get_cd = slot_cn7_get_cd,
  286. .dma = &sh_mmcif_dma,
  287. };
  288. static struct platform_device sh_mmcif_device = {
  289. .name = "sh_mmcif",
  290. .id = 0,
  291. .dev = {
  292. .dma_mask = NULL,
  293. .coherent_dma_mask = 0xffffffff,
  294. .platform_data = &sh_mmcif_plat,
  295. },
  296. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  297. .resource = sh_mmcif_resources,
  298. };
  299. /* SDHI0 */
  300. static struct sh_mobile_sdhi_info sdhi0_info = {
  301. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  302. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  303. .tmio_caps = MMC_CAP_SDIO_IRQ,
  304. };
  305. static struct resource sdhi0_resources[] = {
  306. [0] = {
  307. .name = "SDHI0",
  308. .start = 0xe6850000,
  309. .end = 0xe68500ff,
  310. .flags = IORESOURCE_MEM,
  311. },
  312. [1] = {
  313. .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
  314. .flags = IORESOURCE_IRQ,
  315. },
  316. [2] = {
  317. .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
  318. .flags = IORESOURCE_IRQ,
  319. },
  320. [3] = {
  321. .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
  322. .flags = IORESOURCE_IRQ,
  323. },
  324. };
  325. static struct platform_device sdhi0_device = {
  326. .name = "sh_mobile_sdhi",
  327. .num_resources = ARRAY_SIZE(sdhi0_resources),
  328. .resource = sdhi0_resources,
  329. .id = 0,
  330. .dev = {
  331. .platform_data = &sdhi0_info,
  332. },
  333. };
  334. /* SDHI1 */
  335. static struct sh_mobile_sdhi_info sdhi1_info = {
  336. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  337. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  338. .tmio_ocr_mask = MMC_VDD_165_195,
  339. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  340. .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
  341. .get_cd = slot_cn7_get_cd,
  342. };
  343. static struct resource sdhi1_resources[] = {
  344. [0] = {
  345. .name = "SDHI1",
  346. .start = 0xe6860000,
  347. .end = 0xe68600ff,
  348. .flags = IORESOURCE_MEM,
  349. },
  350. [1] = {
  351. .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
  352. .flags = IORESOURCE_IRQ,
  353. },
  354. [2] = {
  355. .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
  356. .flags = IORESOURCE_IRQ,
  357. },
  358. [3] = {
  359. .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
  360. .flags = IORESOURCE_IRQ,
  361. },
  362. };
  363. static struct platform_device sdhi1_device = {
  364. .name = "sh_mobile_sdhi",
  365. .num_resources = ARRAY_SIZE(sdhi1_resources),
  366. .resource = sdhi1_resources,
  367. .id = 1,
  368. .dev = {
  369. .platform_data = &sdhi1_info,
  370. },
  371. };
  372. /* USB1 */
  373. static void usb1_host_port_power(int port, int power)
  374. {
  375. if (!power) /* only power-on supported for now */
  376. return;
  377. /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
  378. __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
  379. }
  380. static struct r8a66597_platdata usb1_host_data = {
  381. .on_chip = 1,
  382. .port_power = usb1_host_port_power,
  383. };
  384. static struct resource usb1_host_resources[] = {
  385. [0] = {
  386. .name = "USBHS",
  387. .start = 0xE68B0000,
  388. .end = 0xE68B00E6 - 1,
  389. .flags = IORESOURCE_MEM,
  390. },
  391. [1] = {
  392. .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
  393. .flags = IORESOURCE_IRQ,
  394. },
  395. };
  396. static struct platform_device usb1_host_device = {
  397. .name = "r8a66597_hcd",
  398. .id = 1,
  399. .dev = {
  400. .dma_mask = NULL, /* not use dma */
  401. .coherent_dma_mask = 0xffffffff,
  402. .platform_data = &usb1_host_data,
  403. },
  404. .num_resources = ARRAY_SIZE(usb1_host_resources),
  405. .resource = usb1_host_resources,
  406. };
  407. const static struct fb_videomode ap4evb_lcdc_modes[] = {
  408. {
  409. #ifdef CONFIG_AP4EVB_QHD
  410. .name = "R63302(QHD)",
  411. .xres = 544,
  412. .yres = 961,
  413. .left_margin = 72,
  414. .right_margin = 600,
  415. .hsync_len = 16,
  416. .upper_margin = 8,
  417. .lower_margin = 8,
  418. .vsync_len = 2,
  419. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  420. #else
  421. .name = "WVGA Panel",
  422. .xres = 800,
  423. .yres = 480,
  424. .left_margin = 220,
  425. .right_margin = 110,
  426. .hsync_len = 70,
  427. .upper_margin = 20,
  428. .lower_margin = 5,
  429. .vsync_len = 5,
  430. .sync = 0,
  431. #endif
  432. },
  433. };
  434. static struct sh_mobile_meram_cfg lcd_meram_cfg = {
  435. .icb[0] = {
  436. .marker_icb = 28,
  437. .cache_icb = 24,
  438. .meram_offset = 0x0,
  439. .meram_size = 0x40,
  440. },
  441. .icb[1] = {
  442. .marker_icb = 29,
  443. .cache_icb = 25,
  444. .meram_offset = 0x40,
  445. .meram_size = 0x40,
  446. },
  447. };
  448. static struct sh_mobile_lcdc_info lcdc_info = {
  449. .meram_dev = &meram_info,
  450. .ch[0] = {
  451. .chan = LCDC_CHAN_MAINLCD,
  452. .bpp = 16,
  453. .lcd_cfg = ap4evb_lcdc_modes,
  454. .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
  455. .meram_cfg = &lcd_meram_cfg,
  456. }
  457. };
  458. static struct resource lcdc_resources[] = {
  459. [0] = {
  460. .name = "LCDC",
  461. .start = 0xfe940000, /* P4-only space */
  462. .end = 0xfe943fff,
  463. .flags = IORESOURCE_MEM,
  464. },
  465. [1] = {
  466. .start = intcs_evt2irq(0x580),
  467. .flags = IORESOURCE_IRQ,
  468. },
  469. };
  470. static struct platform_device lcdc_device = {
  471. .name = "sh_mobile_lcdc_fb",
  472. .num_resources = ARRAY_SIZE(lcdc_resources),
  473. .resource = lcdc_resources,
  474. .dev = {
  475. .platform_data = &lcdc_info,
  476. .coherent_dma_mask = ~0,
  477. },
  478. };
  479. /*
  480. * QHD display
  481. */
  482. #ifdef CONFIG_AP4EVB_QHD
  483. /* KEYSC (Needs SW43 set to ON) */
  484. static struct sh_keysc_info keysc_info = {
  485. .mode = SH_KEYSC_MODE_1,
  486. .scan_timing = 3,
  487. .delay = 2500,
  488. .keycodes = {
  489. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
  490. KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
  491. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
  492. KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
  493. KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
  494. },
  495. };
  496. static struct resource keysc_resources[] = {
  497. [0] = {
  498. .name = "KEYSC",
  499. .start = 0xe61b0000,
  500. .end = 0xe61b0063,
  501. .flags = IORESOURCE_MEM,
  502. },
  503. [1] = {
  504. .start = evt2irq(0x0be0), /* KEYSC_KEY */
  505. .flags = IORESOURCE_IRQ,
  506. },
  507. };
  508. static struct platform_device keysc_device = {
  509. .name = "sh_keysc",
  510. .id = 0, /* "keysc0" clock */
  511. .num_resources = ARRAY_SIZE(keysc_resources),
  512. .resource = keysc_resources,
  513. .dev = {
  514. .platform_data = &keysc_info,
  515. },
  516. };
  517. /* MIPI-DSI */
  518. static struct resource mipidsi0_resources[] = {
  519. [0] = {
  520. .start = 0xffc60000,
  521. .end = 0xffc63073,
  522. .flags = IORESOURCE_MEM,
  523. },
  524. [1] = {
  525. .start = 0xffc68000,
  526. .end = 0xffc680ef,
  527. .flags = IORESOURCE_MEM,
  528. },
  529. };
  530. static struct sh_mipi_dsi_info mipidsi0_info = {
  531. .data_format = MIPI_RGB888,
  532. .lcd_chan = &lcdc_info.ch[0],
  533. .vsynw_offset = 17,
  534. };
  535. static struct platform_device mipidsi0_device = {
  536. .name = "sh-mipi-dsi",
  537. .num_resources = ARRAY_SIZE(mipidsi0_resources),
  538. .resource = mipidsi0_resources,
  539. .id = 0,
  540. .dev = {
  541. .platform_data = &mipidsi0_info,
  542. },
  543. };
  544. static struct platform_device *qhd_devices[] __initdata = {
  545. &mipidsi0_device,
  546. &keysc_device,
  547. };
  548. #endif /* CONFIG_AP4EVB_QHD */
  549. /* FSI */
  550. #define IRQ_FSI evt2irq(0x1840)
  551. static int __fsi_set_rate(struct clk *clk, long rate, int enable)
  552. {
  553. int ret = 0;
  554. if (rate <= 0)
  555. return ret;
  556. if (enable) {
  557. ret = clk_set_rate(clk, rate);
  558. if (0 == ret)
  559. ret = clk_enable(clk);
  560. } else {
  561. clk_disable(clk);
  562. }
  563. return ret;
  564. }
  565. static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
  566. {
  567. return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
  568. }
  569. static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
  570. {
  571. struct clk *fsia_ick;
  572. struct clk *fsiack;
  573. int ret = -EIO;
  574. fsia_ick = clk_get(dev, "icka");
  575. if (IS_ERR(fsia_ick))
  576. return PTR_ERR(fsia_ick);
  577. /*
  578. * FSIACK is connected to AK4642,
  579. * and use external clock pin from it.
  580. * it is parent of fsia_ick now.
  581. */
  582. fsiack = clk_get_parent(fsia_ick);
  583. if (!fsiack)
  584. goto fsia_ick_out;
  585. /*
  586. * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
  587. *
  588. ** FIXME **
  589. * Because the freq_table of external clk (fsiack) are all 0,
  590. * the return value of clk_round_rate became 0.
  591. * So, it use __fsi_set_rate here.
  592. */
  593. ret = __fsi_set_rate(fsiack, rate, enable);
  594. if (ret < 0)
  595. goto fsiack_out;
  596. ret = __fsi_set_round_rate(fsia_ick, rate, enable);
  597. if ((ret < 0) && enable)
  598. __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
  599. fsiack_out:
  600. clk_put(fsiack);
  601. fsia_ick_out:
  602. clk_put(fsia_ick);
  603. return 0;
  604. }
  605. static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
  606. {
  607. struct clk *fsib_clk;
  608. struct clk *fdiv_clk = &sh7372_fsidivb_clk;
  609. long fsib_rate = 0;
  610. long fdiv_rate = 0;
  611. int ackmd_bpfmd;
  612. int ret;
  613. switch (rate) {
  614. case 44100:
  615. fsib_rate = rate * 256;
  616. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  617. break;
  618. case 48000:
  619. fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
  620. fdiv_rate = rate * 256;
  621. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  622. break;
  623. default:
  624. pr_err("unsupported rate in FSI2 port B\n");
  625. return -EINVAL;
  626. }
  627. /* FSI B setting */
  628. fsib_clk = clk_get(dev, "ickb");
  629. if (IS_ERR(fsib_clk))
  630. return -EIO;
  631. ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
  632. if (ret < 0)
  633. goto fsi_set_rate_end;
  634. /* FSI DIV setting */
  635. ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
  636. if (ret < 0) {
  637. /* disable FSI B */
  638. if (enable)
  639. __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
  640. goto fsi_set_rate_end;
  641. }
  642. ret = ackmd_bpfmd;
  643. fsi_set_rate_end:
  644. clk_put(fsib_clk);
  645. return ret;
  646. }
  647. static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
  648. {
  649. int ret;
  650. if (is_porta)
  651. ret = fsi_ak4642_set_rate(dev, rate, enable);
  652. else
  653. ret = fsi_hdmi_set_rate(dev, rate, enable);
  654. return ret;
  655. }
  656. static struct sh_fsi_platform_info fsi_info = {
  657. .porta_flags = SH_FSI_BRS_INV,
  658. .portb_flags = SH_FSI_BRS_INV |
  659. SH_FSI_BRM_INV |
  660. SH_FSI_LRS_INV |
  661. SH_FSI_FMT_SPDIF,
  662. .set_rate = fsi_set_rate,
  663. };
  664. static struct resource fsi_resources[] = {
  665. [0] = {
  666. .name = "FSI",
  667. .start = 0xFE3C0000,
  668. .end = 0xFE3C0400 - 1,
  669. .flags = IORESOURCE_MEM,
  670. },
  671. [1] = {
  672. .start = IRQ_FSI,
  673. .flags = IORESOURCE_IRQ,
  674. },
  675. };
  676. static struct platform_device fsi_device = {
  677. .name = "sh_fsi2",
  678. .id = -1,
  679. .num_resources = ARRAY_SIZE(fsi_resources),
  680. .resource = fsi_resources,
  681. .dev = {
  682. .platform_data = &fsi_info,
  683. },
  684. };
  685. static struct platform_device fsi_ak4643_device = {
  686. .name = "sh_fsi2_a_ak4643",
  687. };
  688. static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
  689. .icb[0] = {
  690. .marker_icb = 30,
  691. .cache_icb = 26,
  692. .meram_offset = 0x80,
  693. .meram_size = 0x100,
  694. },
  695. .icb[1] = {
  696. .marker_icb = 31,
  697. .cache_icb = 27,
  698. .meram_offset = 0x180,
  699. .meram_size = 0x100,
  700. },
  701. };
  702. static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
  703. .clock_source = LCDC_CLK_EXTERNAL,
  704. .meram_dev = &meram_info,
  705. .ch[0] = {
  706. .chan = LCDC_CHAN_MAINLCD,
  707. .bpp = 16,
  708. .interface_type = RGB24,
  709. .clock_divider = 1,
  710. .flags = LCDC_FLAGS_DWPOL,
  711. .meram_cfg = &hdmi_meram_cfg,
  712. }
  713. };
  714. static struct resource lcdc1_resources[] = {
  715. [0] = {
  716. .name = "LCDC1",
  717. .start = 0xfe944000,
  718. .end = 0xfe947fff,
  719. .flags = IORESOURCE_MEM,
  720. },
  721. [1] = {
  722. .start = intcs_evt2irq(0x1780),
  723. .flags = IORESOURCE_IRQ,
  724. },
  725. };
  726. static struct platform_device lcdc1_device = {
  727. .name = "sh_mobile_lcdc_fb",
  728. .num_resources = ARRAY_SIZE(lcdc1_resources),
  729. .resource = lcdc1_resources,
  730. .id = 1,
  731. .dev = {
  732. .platform_data = &sh_mobile_lcdc1_info,
  733. .coherent_dma_mask = ~0,
  734. },
  735. };
  736. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  737. unsigned long *parent_freq);
  738. static struct sh_mobile_hdmi_info hdmi_info = {
  739. .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
  740. .lcd_dev = &lcdc1_device.dev,
  741. .flags = HDMI_SND_SRC_SPDIF,
  742. .clk_optimize_parent = ap4evb_clk_optimize,
  743. };
  744. static struct resource hdmi_resources[] = {
  745. [0] = {
  746. .name = "HDMI",
  747. .start = 0xe6be0000,
  748. .end = 0xe6be00ff,
  749. .flags = IORESOURCE_MEM,
  750. },
  751. [1] = {
  752. /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
  753. .start = evt2irq(0x17e0),
  754. .flags = IORESOURCE_IRQ,
  755. },
  756. };
  757. static struct platform_device hdmi_device = {
  758. .name = "sh-mobile-hdmi",
  759. .num_resources = ARRAY_SIZE(hdmi_resources),
  760. .resource = hdmi_resources,
  761. .id = -1,
  762. .dev = {
  763. .platform_data = &hdmi_info,
  764. },
  765. };
  766. static struct platform_device fsi_hdmi_device = {
  767. .name = "sh_fsi2_b_hdmi",
  768. };
  769. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  770. unsigned long *parent_freq)
  771. {
  772. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  773. long error;
  774. if (IS_ERR(hdmi_ick)) {
  775. int ret = PTR_ERR(hdmi_ick);
  776. pr_err("Cannot get HDMI ICK: %d\n", ret);
  777. return ret;
  778. }
  779. error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
  780. clk_put(hdmi_ick);
  781. return error;
  782. }
  783. static struct gpio_led ap4evb_leds[] = {
  784. {
  785. .name = "led4",
  786. .gpio = GPIO_PORT185,
  787. .default_state = LEDS_GPIO_DEFSTATE_ON,
  788. },
  789. {
  790. .name = "led2",
  791. .gpio = GPIO_PORT186,
  792. .default_state = LEDS_GPIO_DEFSTATE_ON,
  793. },
  794. {
  795. .name = "led3",
  796. .gpio = GPIO_PORT187,
  797. .default_state = LEDS_GPIO_DEFSTATE_ON,
  798. },
  799. {
  800. .name = "led1",
  801. .gpio = GPIO_PORT188,
  802. .default_state = LEDS_GPIO_DEFSTATE_ON,
  803. }
  804. };
  805. static struct gpio_led_platform_data ap4evb_leds_pdata = {
  806. .num_leds = ARRAY_SIZE(ap4evb_leds),
  807. .leds = ap4evb_leds,
  808. };
  809. static struct platform_device leds_device = {
  810. .name = "leds-gpio",
  811. .id = 0,
  812. .dev = {
  813. .platform_data = &ap4evb_leds_pdata,
  814. },
  815. };
  816. static struct i2c_board_info imx074_info = {
  817. I2C_BOARD_INFO("imx074", 0x1a),
  818. };
  819. static struct soc_camera_link imx074_link = {
  820. .bus_id = 0,
  821. .board_info = &imx074_info,
  822. .i2c_adapter_id = 0,
  823. .module_name = "imx074",
  824. };
  825. static struct platform_device ap4evb_camera = {
  826. .name = "soc-camera-pdrv",
  827. .id = 0,
  828. .dev = {
  829. .platform_data = &imx074_link,
  830. },
  831. };
  832. static struct sh_csi2_client_config csi2_clients[] = {
  833. {
  834. .phy = SH_CSI2_PHY_MAIN,
  835. .lanes = 3,
  836. .channel = 0,
  837. .pdev = &ap4evb_camera,
  838. },
  839. };
  840. static struct sh_csi2_pdata csi2_info = {
  841. .type = SH_CSI2C,
  842. .clients = csi2_clients,
  843. .num_clients = ARRAY_SIZE(csi2_clients),
  844. .flags = SH_CSI2_ECC | SH_CSI2_CRC,
  845. };
  846. static struct resource csi2_resources[] = {
  847. [0] = {
  848. .name = "CSI2",
  849. .start = 0xffc90000,
  850. .end = 0xffc90fff,
  851. .flags = IORESOURCE_MEM,
  852. },
  853. [1] = {
  854. .start = intcs_evt2irq(0x17a0),
  855. .flags = IORESOURCE_IRQ,
  856. },
  857. };
  858. static struct platform_device csi2_device = {
  859. .name = "sh-mobile-csi2",
  860. .id = 0,
  861. .num_resources = ARRAY_SIZE(csi2_resources),
  862. .resource = csi2_resources,
  863. .dev = {
  864. .platform_data = &csi2_info,
  865. },
  866. };
  867. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  868. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  869. .csi2_dev = &csi2_device.dev,
  870. };
  871. static struct resource ceu_resources[] = {
  872. [0] = {
  873. .name = "CEU",
  874. .start = 0xfe910000,
  875. .end = 0xfe91009f,
  876. .flags = IORESOURCE_MEM,
  877. },
  878. [1] = {
  879. .start = intcs_evt2irq(0x880),
  880. .flags = IORESOURCE_IRQ,
  881. },
  882. [2] = {
  883. /* place holder for contiguous memory */
  884. },
  885. };
  886. static struct platform_device ceu_device = {
  887. .name = "sh_mobile_ceu",
  888. .id = 0, /* "ceu0" clock */
  889. .num_resources = ARRAY_SIZE(ceu_resources),
  890. .resource = ceu_resources,
  891. .dev = {
  892. .platform_data = &sh_mobile_ceu_info,
  893. .coherent_dma_mask = 0xffffffff,
  894. },
  895. };
  896. static struct platform_device *ap4evb_devices[] __initdata = {
  897. &leds_device,
  898. &nor_flash_device,
  899. &smc911x_device,
  900. &sdhi0_device,
  901. &sdhi1_device,
  902. &usb1_host_device,
  903. &fsi_device,
  904. &fsi_ak4643_device,
  905. &fsi_hdmi_device,
  906. &sh_mmcif_device,
  907. &lcdc1_device,
  908. &lcdc_device,
  909. &hdmi_device,
  910. &csi2_device,
  911. &ceu_device,
  912. &ap4evb_camera,
  913. &meram_device,
  914. };
  915. static void __init hdmi_init_pm_clock(void)
  916. {
  917. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  918. int ret;
  919. long rate;
  920. if (IS_ERR(hdmi_ick)) {
  921. ret = PTR_ERR(hdmi_ick);
  922. pr_err("Cannot get HDMI ICK: %d\n", ret);
  923. goto out;
  924. }
  925. ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
  926. if (ret < 0) {
  927. pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
  928. goto out;
  929. }
  930. pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
  931. rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
  932. if (rate < 0) {
  933. pr_err("Cannot get suitable rate: %ld\n", rate);
  934. ret = rate;
  935. goto out;
  936. }
  937. ret = clk_set_rate(&sh7372_pllc2_clk, rate);
  938. if (ret < 0) {
  939. pr_err("Cannot set rate %ld: %d\n", rate, ret);
  940. goto out;
  941. }
  942. pr_debug("PLLC2 set frequency %lu\n", rate);
  943. ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
  944. if (ret < 0)
  945. pr_err("Cannot set HDMI parent: %d\n", ret);
  946. out:
  947. if (!IS_ERR(hdmi_ick))
  948. clk_put(hdmi_ick);
  949. }
  950. static void __init fsi_init_pm_clock(void)
  951. {
  952. struct clk *fsia_ick;
  953. int ret;
  954. fsia_ick = clk_get(&fsi_device.dev, "icka");
  955. if (IS_ERR(fsia_ick)) {
  956. ret = PTR_ERR(fsia_ick);
  957. pr_err("Cannot get FSI ICK: %d\n", ret);
  958. return;
  959. }
  960. ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
  961. if (ret < 0)
  962. pr_err("Cannot set FSI-A parent: %d\n", ret);
  963. clk_put(fsia_ick);
  964. }
  965. /*
  966. * FIXME !!
  967. *
  968. * gpio_no_direction
  969. * are quick_hack.
  970. *
  971. * current gpio frame work doesn't have
  972. * the method to control only pull up/down/free.
  973. * this function should be replaced by correct gpio function
  974. */
  975. static void __init gpio_no_direction(u32 addr)
  976. {
  977. __raw_writeb(0x00, addr);
  978. }
  979. /* TouchScreen */
  980. #ifdef CONFIG_AP4EVB_QHD
  981. # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
  982. # define GPIO_TSC_PORT GPIO_PORT123
  983. #else /* WVGA */
  984. # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
  985. # define GPIO_TSC_PORT GPIO_PORT40
  986. #endif
  987. #define IRQ28 evt2irq(0x3380) /* IRQ28A */
  988. #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
  989. static int ts_get_pendown_state(void)
  990. {
  991. int val;
  992. gpio_free(GPIO_TSC_IRQ);
  993. gpio_request(GPIO_TSC_PORT, NULL);
  994. gpio_direction_input(GPIO_TSC_PORT);
  995. val = gpio_get_value(GPIO_TSC_PORT);
  996. gpio_request(GPIO_TSC_IRQ, NULL);
  997. return !val;
  998. }
  999. static int ts_init(void)
  1000. {
  1001. gpio_request(GPIO_TSC_IRQ, NULL);
  1002. return 0;
  1003. }
  1004. static struct tsc2007_platform_data tsc2007_info = {
  1005. .model = 2007,
  1006. .x_plate_ohms = 180,
  1007. .get_pendown_state = ts_get_pendown_state,
  1008. .init_platform_hw = ts_init,
  1009. };
  1010. static struct i2c_board_info tsc_device = {
  1011. I2C_BOARD_INFO("tsc2007", 0x48),
  1012. .type = "tsc2007",
  1013. .platform_data = &tsc2007_info,
  1014. /*.irq is selected on ap4evb_init */
  1015. };
  1016. /* I2C */
  1017. static struct i2c_board_info i2c0_devices[] = {
  1018. {
  1019. I2C_BOARD_INFO("ak4643", 0x13),
  1020. },
  1021. };
  1022. static struct i2c_board_info i2c1_devices[] = {
  1023. {
  1024. I2C_BOARD_INFO("r2025sd", 0x32),
  1025. },
  1026. };
  1027. static struct map_desc ap4evb_io_desc[] __initdata = {
  1028. /* create a 1:1 entity map for 0xe6xxxxxx
  1029. * used by CPGA, INTC and PFC.
  1030. */
  1031. {
  1032. .virtual = 0xe6000000,
  1033. .pfn = __phys_to_pfn(0xe6000000),
  1034. .length = 256 << 20,
  1035. .type = MT_DEVICE_NONSHARED
  1036. },
  1037. };
  1038. static void __init ap4evb_map_io(void)
  1039. {
  1040. iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
  1041. /* setup early devices and console here as well */
  1042. sh7372_add_early_devices();
  1043. shmobile_setup_console();
  1044. }
  1045. #define GPIO_PORT9CR 0xE6051009
  1046. #define GPIO_PORT10CR 0xE605100A
  1047. #define USCCR1 0xE6058144
  1048. static void __init ap4evb_init(void)
  1049. {
  1050. u32 srcr4;
  1051. struct clk *clk;
  1052. sh7372_pinmux_init();
  1053. /* enable SCIFA0 */
  1054. gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
  1055. gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
  1056. /* enable SMSC911X */
  1057. gpio_request(GPIO_FN_CS5A, NULL);
  1058. gpio_request(GPIO_FN_IRQ6_39, NULL);
  1059. /* enable Debug switch (S6) */
  1060. gpio_request(GPIO_PORT32, NULL);
  1061. gpio_request(GPIO_PORT33, NULL);
  1062. gpio_request(GPIO_PORT34, NULL);
  1063. gpio_request(GPIO_PORT35, NULL);
  1064. gpio_direction_input(GPIO_PORT32);
  1065. gpio_direction_input(GPIO_PORT33);
  1066. gpio_direction_input(GPIO_PORT34);
  1067. gpio_direction_input(GPIO_PORT35);
  1068. gpio_export(GPIO_PORT32, 0);
  1069. gpio_export(GPIO_PORT33, 0);
  1070. gpio_export(GPIO_PORT34, 0);
  1071. gpio_export(GPIO_PORT35, 0);
  1072. /* SDHI0 */
  1073. gpio_request(GPIO_FN_SDHICD0, NULL);
  1074. gpio_request(GPIO_FN_SDHIWP0, NULL);
  1075. gpio_request(GPIO_FN_SDHICMD0, NULL);
  1076. gpio_request(GPIO_FN_SDHICLK0, NULL);
  1077. gpio_request(GPIO_FN_SDHID0_3, NULL);
  1078. gpio_request(GPIO_FN_SDHID0_2, NULL);
  1079. gpio_request(GPIO_FN_SDHID0_1, NULL);
  1080. gpio_request(GPIO_FN_SDHID0_0, NULL);
  1081. /* SDHI1 */
  1082. gpio_request(GPIO_FN_SDHICMD1, NULL);
  1083. gpio_request(GPIO_FN_SDHICLK1, NULL);
  1084. gpio_request(GPIO_FN_SDHID1_3, NULL);
  1085. gpio_request(GPIO_FN_SDHID1_2, NULL);
  1086. gpio_request(GPIO_FN_SDHID1_1, NULL);
  1087. gpio_request(GPIO_FN_SDHID1_0, NULL);
  1088. /* MMCIF */
  1089. gpio_request(GPIO_FN_MMCD0_0, NULL);
  1090. gpio_request(GPIO_FN_MMCD0_1, NULL);
  1091. gpio_request(GPIO_FN_MMCD0_2, NULL);
  1092. gpio_request(GPIO_FN_MMCD0_3, NULL);
  1093. gpio_request(GPIO_FN_MMCD0_4, NULL);
  1094. gpio_request(GPIO_FN_MMCD0_5, NULL);
  1095. gpio_request(GPIO_FN_MMCD0_6, NULL);
  1096. gpio_request(GPIO_FN_MMCD0_7, NULL);
  1097. gpio_request(GPIO_FN_MMCCMD0, NULL);
  1098. gpio_request(GPIO_FN_MMCCLK0, NULL);
  1099. /* USB enable */
  1100. gpio_request(GPIO_FN_VBUS0_1, NULL);
  1101. gpio_request(GPIO_FN_IDIN_1_18, NULL);
  1102. gpio_request(GPIO_FN_PWEN_1_115, NULL);
  1103. gpio_request(GPIO_FN_OVCN_1_114, NULL);
  1104. gpio_request(GPIO_FN_EXTLP_1, NULL);
  1105. gpio_request(GPIO_FN_OVCN2_1, NULL);
  1106. /* setup USB phy */
  1107. __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
  1108. /* enable FSI2 port A (ak4643) */
  1109. gpio_request(GPIO_FN_FSIAIBT, NULL);
  1110. gpio_request(GPIO_FN_FSIAILR, NULL);
  1111. gpio_request(GPIO_FN_FSIAISLD, NULL);
  1112. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  1113. gpio_request(GPIO_PORT161, NULL);
  1114. gpio_direction_output(GPIO_PORT161, 0); /* slave */
  1115. gpio_request(GPIO_PORT9, NULL);
  1116. gpio_request(GPIO_PORT10, NULL);
  1117. gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
  1118. gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  1119. /* card detect pin for MMC slot (CN7) */
  1120. gpio_request(GPIO_PORT41, NULL);
  1121. gpio_direction_input(GPIO_PORT41);
  1122. /* setup FSI2 port B (HDMI) */
  1123. gpio_request(GPIO_FN_FSIBCK, NULL);
  1124. __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
  1125. /* set SPU2 clock to 119.6 MHz */
  1126. clk = clk_get(NULL, "spu_clk");
  1127. if (!IS_ERR(clk)) {
  1128. clk_set_rate(clk, clk_round_rate(clk, 119600000));
  1129. clk_put(clk);
  1130. }
  1131. /*
  1132. * set irq priority, to avoid sound chopping
  1133. * when NFS rootfs is used
  1134. * FSI(3) > SMSC911X(2)
  1135. */
  1136. intc_set_priority(IRQ_FSI, 3);
  1137. i2c_register_board_info(0, i2c0_devices,
  1138. ARRAY_SIZE(i2c0_devices));
  1139. i2c_register_board_info(1, i2c1_devices,
  1140. ARRAY_SIZE(i2c1_devices));
  1141. #ifdef CONFIG_AP4EVB_QHD
  1142. /*
  1143. * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
  1144. * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
  1145. */
  1146. /* enable KEYSC */
  1147. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1148. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1149. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1150. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1151. gpio_request(GPIO_FN_KEYOUT4, NULL);
  1152. gpio_request(GPIO_FN_KEYIN0_136, NULL);
  1153. gpio_request(GPIO_FN_KEYIN1_135, NULL);
  1154. gpio_request(GPIO_FN_KEYIN2_134, NULL);
  1155. gpio_request(GPIO_FN_KEYIN3_133, NULL);
  1156. gpio_request(GPIO_FN_KEYIN4, NULL);
  1157. /* enable TouchScreen */
  1158. irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
  1159. tsc_device.irq = IRQ28;
  1160. i2c_register_board_info(1, &tsc_device, 1);
  1161. /* LCDC0 */
  1162. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  1163. lcdc_info.ch[0].interface_type = RGB24;
  1164. lcdc_info.ch[0].clock_divider = 1;
  1165. lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
  1166. lcdc_info.ch[0].lcd_size_cfg.width = 44;
  1167. lcdc_info.ch[0].lcd_size_cfg.height = 79;
  1168. platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
  1169. #else
  1170. /*
  1171. * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
  1172. * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
  1173. */
  1174. gpio_request(GPIO_FN_LCDD17, NULL);
  1175. gpio_request(GPIO_FN_LCDD16, NULL);
  1176. gpio_request(GPIO_FN_LCDD15, NULL);
  1177. gpio_request(GPIO_FN_LCDD14, NULL);
  1178. gpio_request(GPIO_FN_LCDD13, NULL);
  1179. gpio_request(GPIO_FN_LCDD12, NULL);
  1180. gpio_request(GPIO_FN_LCDD11, NULL);
  1181. gpio_request(GPIO_FN_LCDD10, NULL);
  1182. gpio_request(GPIO_FN_LCDD9, NULL);
  1183. gpio_request(GPIO_FN_LCDD8, NULL);
  1184. gpio_request(GPIO_FN_LCDD7, NULL);
  1185. gpio_request(GPIO_FN_LCDD6, NULL);
  1186. gpio_request(GPIO_FN_LCDD5, NULL);
  1187. gpio_request(GPIO_FN_LCDD4, NULL);
  1188. gpio_request(GPIO_FN_LCDD3, NULL);
  1189. gpio_request(GPIO_FN_LCDD2, NULL);
  1190. gpio_request(GPIO_FN_LCDD1, NULL);
  1191. gpio_request(GPIO_FN_LCDD0, NULL);
  1192. gpio_request(GPIO_FN_LCDDISP, NULL);
  1193. gpio_request(GPIO_FN_LCDDCK, NULL);
  1194. gpio_request(GPIO_PORT189, NULL); /* backlight */
  1195. gpio_direction_output(GPIO_PORT189, 1);
  1196. gpio_request(GPIO_PORT151, NULL); /* LCDDON */
  1197. gpio_direction_output(GPIO_PORT151, 1);
  1198. lcdc_info.clock_source = LCDC_CLK_BUS;
  1199. lcdc_info.ch[0].interface_type = RGB18;
  1200. lcdc_info.ch[0].clock_divider = 3;
  1201. lcdc_info.ch[0].flags = 0;
  1202. lcdc_info.ch[0].lcd_size_cfg.width = 152;
  1203. lcdc_info.ch[0].lcd_size_cfg.height = 91;
  1204. /* enable TouchScreen */
  1205. irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
  1206. tsc_device.irq = IRQ7;
  1207. i2c_register_board_info(0, &tsc_device, 1);
  1208. #endif /* CONFIG_AP4EVB_QHD */
  1209. /* CEU */
  1210. /*
  1211. * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
  1212. * becomes available
  1213. */
  1214. /* MIPI-CSI stuff */
  1215. gpio_request(GPIO_FN_VIO_CKO, NULL);
  1216. clk = clk_get(NULL, "vck1_clk");
  1217. if (!IS_ERR(clk)) {
  1218. clk_set_rate(clk, clk_round_rate(clk, 13000000));
  1219. clk_enable(clk);
  1220. clk_put(clk);
  1221. }
  1222. sh7372_add_standard_devices();
  1223. /* HDMI */
  1224. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  1225. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  1226. /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
  1227. #define SRCR4 0xe61580bc
  1228. srcr4 = __raw_readl(SRCR4);
  1229. __raw_writel(srcr4 | (1 << 13), SRCR4);
  1230. udelay(50);
  1231. __raw_writel(srcr4 & ~(1 << 13), SRCR4);
  1232. platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
  1233. hdmi_init_pm_clock();
  1234. fsi_init_pm_clock();
  1235. sh7372_pm_init();
  1236. }
  1237. static void __init ap4evb_timer_init(void)
  1238. {
  1239. sh7372_clock_init();
  1240. shmobile_timer.init();
  1241. /* External clock source */
  1242. clk_set_rate(&sh7372_dv_clki_clk, 27000000);
  1243. }
  1244. static struct sys_timer ap4evb_timer = {
  1245. .init = ap4evb_timer_init,
  1246. };
  1247. MACHINE_START(AP4EVB, "ap4evb")
  1248. .map_io = ap4evb_map_io,
  1249. .init_irq = sh7372_init_irq,
  1250. .handle_irq = shmobile_handle_irq_intc,
  1251. .init_machine = ap4evb_init,
  1252. .timer = &ap4evb_timer,
  1253. MACHINE_END