nanoengine.c 2.9 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/nanoengine.c
  3. *
  4. * Bright Star Engineering's nanoEngine board init code.
  5. *
  6. * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/init.h>
  14. #include <linux/kernel.h>
  15. #include <linux/mtd/mtd.h>
  16. #include <linux/mtd/partitions.h>
  17. #include <linux/root_dev.h>
  18. #include <asm/mach-types.h>
  19. #include <asm/setup.h>
  20. #include <asm/mach/arch.h>
  21. #include <asm/mach/flash.h>
  22. #include <asm/mach/map.h>
  23. #include <asm/mach/serial_sa1100.h>
  24. #include <mach/hardware.h>
  25. #include <mach/nanoengine.h>
  26. #include "generic.h"
  27. /* Flash bank 0 */
  28. static struct mtd_partition nanoengine_partitions[] = {
  29. {
  30. .name = "nanoEngine boot firmware and parameter table",
  31. .size = 0x00010000, /* 32K */
  32. .offset = 0,
  33. .mask_flags = MTD_WRITEABLE,
  34. }, {
  35. .name = "kernel/initrd reserved",
  36. .size = 0x002f0000,
  37. .offset = 0x00010000,
  38. .mask_flags = MTD_WRITEABLE,
  39. }, {
  40. .name = "experimental filesystem allocation",
  41. .size = 0x00100000,
  42. .offset = 0x00300000,
  43. .mask_flags = MTD_WRITEABLE,
  44. }
  45. };
  46. static struct flash_platform_data nanoengine_flash_data = {
  47. .map_name = "jedec_probe",
  48. .parts = nanoengine_partitions,
  49. .nr_parts = ARRAY_SIZE(nanoengine_partitions),
  50. };
  51. static struct resource nanoengine_flash_resources[] = {
  52. {
  53. .start = SA1100_CS0_PHYS,
  54. .end = SA1100_CS0_PHYS + SZ_32M - 1,
  55. .flags = IORESOURCE_MEM,
  56. }, {
  57. .start = SA1100_CS1_PHYS,
  58. .end = SA1100_CS1_PHYS + SZ_32M - 1,
  59. .flags = IORESOURCE_MEM,
  60. }
  61. };
  62. static struct map_desc nanoengine_io_desc[] __initdata = {
  63. {
  64. /* System Registers */
  65. .virtual = 0xf0000000,
  66. .pfn = __phys_to_pfn(0x10000000),
  67. .length = 0x00100000,
  68. .type = MT_DEVICE
  69. }, {
  70. /* Internal PCI Memory Read/Write */
  71. .virtual = NANO_PCI_MEM_RW_VIRT,
  72. .pfn = __phys_to_pfn(NANO_PCI_MEM_RW_PHYS),
  73. .length = NANO_PCI_MEM_RW_SIZE,
  74. .type = MT_DEVICE
  75. }, {
  76. /* Internal PCI Config Space */
  77. .virtual = NANO_PCI_CONFIG_SPACE_VIRT,
  78. .pfn = __phys_to_pfn(NANO_PCI_CONFIG_SPACE_PHYS),
  79. .length = NANO_PCI_CONFIG_SPACE_SIZE,
  80. .type = MT_DEVICE
  81. }
  82. };
  83. static void __init nanoengine_map_io(void)
  84. {
  85. sa1100_map_io();
  86. iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc));
  87. sa1100_register_uart(0, 1);
  88. sa1100_register_uart(1, 2);
  89. sa1100_register_uart(2, 3);
  90. Ser1SDCR0 |= SDCR0_UART;
  91. /* disable IRDA -- UART2 is used as a normal serial port */
  92. Ser2UTCR4 = 0;
  93. Ser2HSCR0 = 0;
  94. }
  95. static void __init nanoengine_init(void)
  96. {
  97. sa11x0_register_mtd(&nanoengine_flash_data, nanoengine_flash_resources,
  98. ARRAY_SIZE(nanoengine_flash_resources));
  99. }
  100. MACHINE_START(NANOENGINE, "BSE nanoEngine")
  101. .boot_params = 0xc0000000,
  102. .map_io = nanoengine_map_io,
  103. .init_irq = sa1100_init_irq,
  104. .timer = &sa1100_timer,
  105. .init_machine = nanoengine_init,
  106. MACHINE_END