dma.c 4.0 KB

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  1. /*
  2. * Copyright (C) 2010 Samsung Electronics Co. Ltd.
  3. * Jaswinder Singh <jassi.brar@samsung.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. #include <linux/platform_device.h>
  20. #include <linux/dma-mapping.h>
  21. #include <plat/devs.h>
  22. #include <mach/map.h>
  23. #include <mach/irqs.h>
  24. #include <plat/s3c-pl330-pdata.h>
  25. static u64 dma_dmamask = DMA_BIT_MASK(32);
  26. static struct resource s5pc100_pdma0_resource[] = {
  27. [0] = {
  28. .start = S5PC100_PA_PDMA0,
  29. .end = S5PC100_PA_PDMA0 + SZ_4K,
  30. .flags = IORESOURCE_MEM,
  31. },
  32. [1] = {
  33. .start = IRQ_PDMA0,
  34. .end = IRQ_PDMA0,
  35. .flags = IORESOURCE_IRQ,
  36. },
  37. };
  38. static struct s3c_pl330_platdata s5pc100_pdma0_pdata = {
  39. .peri = {
  40. [0] = DMACH_UART0_RX,
  41. [1] = DMACH_UART0_TX,
  42. [2] = DMACH_UART1_RX,
  43. [3] = DMACH_UART1_TX,
  44. [4] = DMACH_UART2_RX,
  45. [5] = DMACH_UART2_TX,
  46. [6] = DMACH_UART3_RX,
  47. [7] = DMACH_UART3_TX,
  48. [8] = DMACH_IRDA,
  49. [9] = DMACH_I2S0_RX,
  50. [10] = DMACH_I2S0_TX,
  51. [11] = DMACH_I2S0S_TX,
  52. [12] = DMACH_I2S1_RX,
  53. [13] = DMACH_I2S1_TX,
  54. [14] = DMACH_I2S2_RX,
  55. [15] = DMACH_I2S2_TX,
  56. [16] = DMACH_SPI0_RX,
  57. [17] = DMACH_SPI0_TX,
  58. [18] = DMACH_SPI1_RX,
  59. [19] = DMACH_SPI1_TX,
  60. [20] = DMACH_SPI2_RX,
  61. [21] = DMACH_SPI2_TX,
  62. [22] = DMACH_AC97_MICIN,
  63. [23] = DMACH_AC97_PCMIN,
  64. [24] = DMACH_AC97_PCMOUT,
  65. [25] = DMACH_EXTERNAL,
  66. [26] = DMACH_PWM,
  67. [27] = DMACH_SPDIF,
  68. [28] = DMACH_HSI_RX,
  69. [29] = DMACH_HSI_TX,
  70. [30] = DMACH_MAX,
  71. [31] = DMACH_MAX,
  72. },
  73. };
  74. static struct platform_device s5pc100_device_pdma0 = {
  75. .name = "s3c-pl330",
  76. .id = 0,
  77. .num_resources = ARRAY_SIZE(s5pc100_pdma0_resource),
  78. .resource = s5pc100_pdma0_resource,
  79. .dev = {
  80. .dma_mask = &dma_dmamask,
  81. .coherent_dma_mask = DMA_BIT_MASK(32),
  82. .platform_data = &s5pc100_pdma0_pdata,
  83. },
  84. };
  85. static struct resource s5pc100_pdma1_resource[] = {
  86. [0] = {
  87. .start = S5PC100_PA_PDMA1,
  88. .end = S5PC100_PA_PDMA1 + SZ_4K,
  89. .flags = IORESOURCE_MEM,
  90. },
  91. [1] = {
  92. .start = IRQ_PDMA1,
  93. .end = IRQ_PDMA1,
  94. .flags = IORESOURCE_IRQ,
  95. },
  96. };
  97. static struct s3c_pl330_platdata s5pc100_pdma1_pdata = {
  98. .peri = {
  99. [0] = DMACH_UART0_RX,
  100. [1] = DMACH_UART0_TX,
  101. [2] = DMACH_UART1_RX,
  102. [3] = DMACH_UART1_TX,
  103. [4] = DMACH_UART2_RX,
  104. [5] = DMACH_UART2_TX,
  105. [6] = DMACH_UART3_RX,
  106. [7] = DMACH_UART3_TX,
  107. [8] = DMACH_IRDA,
  108. [9] = DMACH_I2S0_RX,
  109. [10] = DMACH_I2S0_TX,
  110. [11] = DMACH_I2S0S_TX,
  111. [12] = DMACH_I2S1_RX,
  112. [13] = DMACH_I2S1_TX,
  113. [14] = DMACH_I2S2_RX,
  114. [15] = DMACH_I2S2_TX,
  115. [16] = DMACH_SPI0_RX,
  116. [17] = DMACH_SPI0_TX,
  117. [18] = DMACH_SPI1_RX,
  118. [19] = DMACH_SPI1_TX,
  119. [20] = DMACH_SPI2_RX,
  120. [21] = DMACH_SPI2_TX,
  121. [22] = DMACH_PCM0_RX,
  122. [23] = DMACH_PCM0_TX,
  123. [24] = DMACH_PCM1_RX,
  124. [25] = DMACH_PCM1_TX,
  125. [26] = DMACH_MSM_REQ0,
  126. [27] = DMACH_MSM_REQ1,
  127. [28] = DMACH_MSM_REQ2,
  128. [29] = DMACH_MSM_REQ3,
  129. [30] = DMACH_MAX,
  130. [31] = DMACH_MAX,
  131. },
  132. };
  133. static struct platform_device s5pc100_device_pdma1 = {
  134. .name = "s3c-pl330",
  135. .id = 1,
  136. .num_resources = ARRAY_SIZE(s5pc100_pdma1_resource),
  137. .resource = s5pc100_pdma1_resource,
  138. .dev = {
  139. .dma_mask = &dma_dmamask,
  140. .coherent_dma_mask = DMA_BIT_MASK(32),
  141. .platform_data = &s5pc100_pdma1_pdata,
  142. },
  143. };
  144. static struct platform_device *s5pc100_dmacs[] __initdata = {
  145. &s5pc100_device_pdma0,
  146. &s5pc100_device_pdma1,
  147. };
  148. static int __init s5pc100_dma_init(void)
  149. {
  150. platform_add_devices(s5pc100_dmacs, ARRAY_SIZE(s5pc100_dmacs));
  151. return 0;
  152. }
  153. arch_initcall(s5pc100_dma_init);