cpu.c 4.3 KB

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  1. /* linux/arch/arm/mach-s5p64x0/cpu.c
  2. *
  3. * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/types.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/list.h>
  14. #include <linux/timer.h>
  15. #include <linux/init.h>
  16. #include <linux/clk.h>
  17. #include <linux/io.h>
  18. #include <linux/sysdev.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/sched.h>
  22. #include <asm/mach/arch.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/mach/irq.h>
  25. #include <asm/proc-fns.h>
  26. #include <asm/irq.h>
  27. #include <mach/hardware.h>
  28. #include <mach/map.h>
  29. #include <mach/regs-clock.h>
  30. #include <plat/regs-serial.h>
  31. #include <plat/cpu.h>
  32. #include <plat/devs.h>
  33. #include <plat/clock.h>
  34. #include <plat/s5p6440.h>
  35. #include <plat/s5p6450.h>
  36. #include <plat/adc-core.h>
  37. /* Initial IO mappings */
  38. static struct map_desc s5p64x0_iodesc[] __initdata = {
  39. {
  40. .virtual = (unsigned long)S5P_VA_GPIO,
  41. .pfn = __phys_to_pfn(S5P64X0_PA_GPIO),
  42. .length = SZ_4K,
  43. .type = MT_DEVICE,
  44. }, {
  45. .virtual = (unsigned long)VA_VIC0,
  46. .pfn = __phys_to_pfn(S5P64X0_PA_VIC0),
  47. .length = SZ_16K,
  48. .type = MT_DEVICE,
  49. }, {
  50. .virtual = (unsigned long)VA_VIC1,
  51. .pfn = __phys_to_pfn(S5P64X0_PA_VIC1),
  52. .length = SZ_16K,
  53. .type = MT_DEVICE,
  54. },
  55. };
  56. static struct map_desc s5p6440_iodesc[] __initdata = {
  57. {
  58. .virtual = (unsigned long)S3C_VA_UART,
  59. .pfn = __phys_to_pfn(S5P6440_PA_UART(0)),
  60. .length = SZ_4K,
  61. .type = MT_DEVICE,
  62. },
  63. };
  64. static struct map_desc s5p6450_iodesc[] __initdata = {
  65. {
  66. .virtual = (unsigned long)S3C_VA_UART,
  67. .pfn = __phys_to_pfn(S5P6450_PA_UART(0)),
  68. .length = SZ_512K,
  69. .type = MT_DEVICE,
  70. }, {
  71. .virtual = (unsigned long)S3C_VA_UART + SZ_512K,
  72. .pfn = __phys_to_pfn(S5P6450_PA_UART(5)),
  73. .length = SZ_4K,
  74. .type = MT_DEVICE,
  75. },
  76. };
  77. static void s5p64x0_idle(void)
  78. {
  79. unsigned long val;
  80. if (!need_resched()) {
  81. val = __raw_readl(S5P64X0_PWR_CFG);
  82. val &= ~(0x3 << 5);
  83. val |= (0x1 << 5);
  84. __raw_writel(val, S5P64X0_PWR_CFG);
  85. cpu_do_idle();
  86. }
  87. local_irq_enable();
  88. }
  89. /*
  90. * s5p64x0_map_io
  91. *
  92. * register the standard CPU IO areas
  93. */
  94. void __init s5p6440_map_io(void)
  95. {
  96. /* initialize any device information early */
  97. s3c_adc_setname("s3c64xx-adc");
  98. iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
  99. iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
  100. }
  101. void __init s5p6450_map_io(void)
  102. {
  103. /* initialize any device information early */
  104. s3c_adc_setname("s3c64xx-adc");
  105. iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
  106. iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
  107. }
  108. /*
  109. * s5p64x0_init_clocks
  110. *
  111. * register and setup the CPU clocks
  112. */
  113. void __init s5p6440_init_clocks(int xtal)
  114. {
  115. printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
  116. s3c24xx_register_baseclocks(xtal);
  117. s5p_register_clocks(xtal);
  118. s5p6440_register_clocks();
  119. s5p6440_setup_clocks();
  120. }
  121. void __init s5p6450_init_clocks(int xtal)
  122. {
  123. printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
  124. s3c24xx_register_baseclocks(xtal);
  125. s5p_register_clocks(xtal);
  126. s5p6450_register_clocks();
  127. s5p6450_setup_clocks();
  128. }
  129. /*
  130. * s5p64x0_init_irq
  131. *
  132. * register the CPU interrupts
  133. */
  134. void __init s5p6440_init_irq(void)
  135. {
  136. /* S5P6440 supports 2 VIC */
  137. u32 vic[2];
  138. /*
  139. * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
  140. * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
  141. */
  142. vic[0] = 0xff800ae7;
  143. vic[1] = 0xffbf23e5;
  144. s5p_init_irq(vic, ARRAY_SIZE(vic));
  145. }
  146. void __init s5p6450_init_irq(void)
  147. {
  148. /* S5P6450 supports only 2 VIC */
  149. u32 vic[2];
  150. /*
  151. * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
  152. * VIC1 is missing IRQ VIC1[12, 14, 23]
  153. */
  154. vic[0] = 0xff9f1fff;
  155. vic[1] = 0xff7fafff;
  156. s5p_init_irq(vic, ARRAY_SIZE(vic));
  157. }
  158. struct sysdev_class s5p64x0_sysclass = {
  159. .name = "s5p64x0-core",
  160. };
  161. static struct sys_device s5p64x0_sysdev = {
  162. .cls = &s5p64x0_sysclass,
  163. };
  164. static int __init s5p64x0_core_init(void)
  165. {
  166. return sysdev_class_register(&s5p64x0_sysclass);
  167. }
  168. core_initcall(s5p64x0_core_init);
  169. int __init s5p64x0_init(void)
  170. {
  171. printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
  172. /* set idle function */
  173. pm_idle = s5p64x0_idle;
  174. return sysdev_register(&s5p64x0_sysdev);
  175. }