irq.c 2.9 KB

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  1. /* linux/arch/arm/mach-s3c2440/irq.c
  2. *
  3. * Copyright (c) 2003-2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/ioport.h>
  25. #include <linux/sysdev.h>
  26. #include <linux/io.h>
  27. #include <mach/hardware.h>
  28. #include <asm/irq.h>
  29. #include <asm/mach/irq.h>
  30. #include <mach/regs-irq.h>
  31. #include <mach/regs-gpio.h>
  32. #include <plat/cpu.h>
  33. #include <plat/pm.h>
  34. #include <plat/irq.h>
  35. /* WDT/AC97 */
  36. static void s3c_irq_demux_wdtac97(unsigned int irq,
  37. struct irq_desc *desc)
  38. {
  39. unsigned int subsrc, submsk;
  40. /* read the current pending interrupts, and the mask
  41. * for what it is available */
  42. subsrc = __raw_readl(S3C2410_SUBSRCPND);
  43. submsk = __raw_readl(S3C2410_INTSUBMSK);
  44. subsrc &= ~submsk;
  45. subsrc >>= 13;
  46. subsrc &= 3;
  47. if (subsrc != 0) {
  48. if (subsrc & 1) {
  49. generic_handle_irq(IRQ_S3C2440_WDT);
  50. }
  51. if (subsrc & 2) {
  52. generic_handle_irq(IRQ_S3C2440_AC97);
  53. }
  54. }
  55. }
  56. #define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
  57. static void
  58. s3c_irq_wdtac97_mask(struct irq_data *data)
  59. {
  60. s3c_irqsub_mask(data->irq, INTMSK_WDT, 3 << 13);
  61. }
  62. static void
  63. s3c_irq_wdtac97_unmask(struct irq_data *data)
  64. {
  65. s3c_irqsub_unmask(data->irq, INTMSK_WDT);
  66. }
  67. static void
  68. s3c_irq_wdtac97_ack(struct irq_data *data)
  69. {
  70. s3c_irqsub_maskack(data->irq, INTMSK_WDT, 3 << 13);
  71. }
  72. static struct irq_chip s3c_irq_wdtac97 = {
  73. .irq_mask = s3c_irq_wdtac97_mask,
  74. .irq_unmask = s3c_irq_wdtac97_unmask,
  75. .irq_ack = s3c_irq_wdtac97_ack,
  76. };
  77. static int s3c2440_irq_add(struct sys_device *sysdev)
  78. {
  79. unsigned int irqno;
  80. printk("S3C2440: IRQ Support\n");
  81. /* add new chained handler for wdt, ac7 */
  82. irq_set_chip_and_handler(IRQ_WDT, &s3c_irq_level_chip,
  83. handle_level_irq);
  84. irq_set_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
  85. for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
  86. irq_set_chip_and_handler(irqno, &s3c_irq_wdtac97,
  87. handle_level_irq);
  88. set_irq_flags(irqno, IRQF_VALID);
  89. }
  90. return 0;
  91. }
  92. static struct sysdev_driver s3c2440_irq_driver = {
  93. .add = s3c2440_irq_add,
  94. };
  95. static int s3c2440_irq_init(void)
  96. {
  97. return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
  98. }
  99. arch_initcall(s3c2440_irq_init);