time.c 4.2 KB

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  1. /*
  2. * arch/arm/mach-netx/time.c
  3. *
  4. * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2
  8. * as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/init.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/irq.h>
  22. #include <linux/clocksource.h>
  23. #include <linux/clockchips.h>
  24. #include <linux/io.h>
  25. #include <mach/hardware.h>
  26. #include <asm/mach/time.h>
  27. #include <mach/netx-regs.h>
  28. #define TIMER_CLOCKEVENT 0
  29. #define TIMER_CLOCKSOURCE 1
  30. static void netx_set_mode(enum clock_event_mode mode,
  31. struct clock_event_device *clk)
  32. {
  33. u32 tmode;
  34. /* disable timer */
  35. writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
  36. switch (mode) {
  37. case CLOCK_EVT_MODE_PERIODIC:
  38. writel(LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
  39. tmode = NETX_GPIO_COUNTER_CTRL_RST_EN |
  40. NETX_GPIO_COUNTER_CTRL_IRQ_EN |
  41. NETX_GPIO_COUNTER_CTRL_RUN;
  42. break;
  43. case CLOCK_EVT_MODE_ONESHOT:
  44. writel(0, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
  45. tmode = NETX_GPIO_COUNTER_CTRL_IRQ_EN |
  46. NETX_GPIO_COUNTER_CTRL_RUN;
  47. break;
  48. default:
  49. WARN(1, "%s: unhandled mode %d\n", __func__, mode);
  50. /* fall through */
  51. case CLOCK_EVT_MODE_SHUTDOWN:
  52. case CLOCK_EVT_MODE_UNUSED:
  53. case CLOCK_EVT_MODE_RESUME:
  54. tmode = 0;
  55. break;
  56. }
  57. writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
  58. }
  59. static int netx_set_next_event(unsigned long evt,
  60. struct clock_event_device *clk)
  61. {
  62. writel(0 - evt, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKEVENT));
  63. return 0;
  64. }
  65. static struct clock_event_device netx_clockevent = {
  66. .name = "netx-timer" __stringify(TIMER_CLOCKEVENT),
  67. .shift = 32,
  68. .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
  69. .set_next_event = netx_set_next_event,
  70. .set_mode = netx_set_mode,
  71. };
  72. /*
  73. * IRQ handler for the timer
  74. */
  75. static irqreturn_t
  76. netx_timer_interrupt(int irq, void *dev_id)
  77. {
  78. struct clock_event_device *evt = &netx_clockevent;
  79. /* acknowledge interrupt */
  80. writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
  81. evt->event_handler(evt);
  82. return IRQ_HANDLED;
  83. }
  84. static struct irqaction netx_timer_irq = {
  85. .name = "NetX Timer Tick",
  86. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  87. .handler = netx_timer_interrupt,
  88. };
  89. /*
  90. * Set up timer interrupt
  91. */
  92. static void __init netx_timer_init(void)
  93. {
  94. /* disable timer initially */
  95. writel(0, NETX_GPIO_COUNTER_CTRL(0));
  96. /* Reset the timer value to zero */
  97. writel(0, NETX_GPIO_COUNTER_CURRENT(0));
  98. writel(LATCH, NETX_GPIO_COUNTER_MAX(0));
  99. /* acknowledge interrupt */
  100. writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
  101. /* Enable the interrupt in the specific timer
  102. * register and start timer
  103. */
  104. writel(COUNTER_BIT(0), NETX_GPIO_IRQ_ENABLE);
  105. writel(NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN,
  106. NETX_GPIO_COUNTER_CTRL(0));
  107. setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq);
  108. /* Setup timer one for clocksource */
  109. writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE));
  110. writel(0, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE));
  111. writel(0xffffffff, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKSOURCE));
  112. writel(NETX_GPIO_COUNTER_CTRL_RUN,
  113. NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE));
  114. clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE),
  115. "netx_timer", CLOCK_TICK_RATE, 200, 32, clocksource_mmio_readl_up);
  116. netx_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
  117. netx_clockevent.shift);
  118. netx_clockevent.max_delta_ns =
  119. clockevent_delta2ns(0xfffffffe, &netx_clockevent);
  120. /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine.
  121. * Adding some safety ... */
  122. netx_clockevent.min_delta_ns =
  123. clockevent_delta2ns(0xa00, &netx_clockevent);
  124. netx_clockevent.cpumask = cpumask_of(0);
  125. clockevents_register_device(&netx_clockevent);
  126. }
  127. struct sys_timer netx_timer = {
  128. .init = netx_timer_init,
  129. };