board-8626m-refc02.c 6.6 KB

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  1. /*
  2. *
  3. * arch/arm/mach-meson1/meson.c
  4. *
  5. * Copyright (C) 2010 AMLOGIC, INC.
  6. *
  7. * License terms: GNU General Public License (GPL) version 2
  8. * Platform machine definition.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/mm.h>
  13. #include <linux/sched.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/ioport.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/io.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/mtd/mtd.h>
  20. #include <linux/mtd/partitions.h>
  21. #include <linux/device.h>
  22. #include <linux/spi/flash.h>
  23. #include <linux/delay.h>
  24. #include <asm/mach-types.h>
  25. #include <asm/mach/arch.h>
  26. #include <asm/setup.h>
  27. #include <asm/memory.h>
  28. #include <asm/mach/map.h>
  29. #include <plat/platform.h>
  30. #include <plat/lm.h>
  31. #include <mach/power_gate.h>
  32. #include <mach/memory.h>
  33. #include <mach/hardware.h>
  34. #include <mach/clock.h>
  35. #include <mach/pinmux.h>
  36. #include <mach/clk_set.h>
  37. #include <mach/gpio.h>
  38. #ifdef CONFIG_AM_UART
  39. #include <linux/uart-aml.h>
  40. #endif
  41. #ifdef CONFIG_AM_ETHERNET
  42. #include <plat/eth.h>
  43. #include <mach/am_regs.h>
  44. #include <mach/am_eth_reg.h>
  45. #include <mach/am_eth_pinmux.h>
  46. #endif
  47. #ifdef CONFIG_AM_REMOTE
  48. #include <plat/remote.h>
  49. #endif
  50. #include "board-8626m-refc02.h"
  51. #ifdef CONFIG_AM_UART
  52. static pinmux_item_t uart_pins[] = {
  53. {
  54. .reg = PINMUX_REG(2),
  55. .clrmask = 0,
  56. .setmask = (1 << 11) | (1 << 15),
  57. },
  58. PINMUX_END_ITEM
  59. };
  60. static pinmux_set_t aml_uart_a = {
  61. .chip_select = NULL,
  62. .pinmux = &uart_pins[0],
  63. };
  64. static struct aml_uart_platform aml_uart_plat = {
  65. .uart_line[0] = UART_A,
  66. .uart_line[1] = UART_B,
  67. .pinmux_uart[0] = (void *)&aml_uart_a,
  68. .pinmux_uart[1] = NULL,
  69. };
  70. static struct platform_device aml_uart_device = {
  71. .name = "mesonuart",
  72. .id = -1,
  73. .num_resources = 0,
  74. .resource = NULL,
  75. .dev = {
  76. .platform_data = &aml_uart_plat,
  77. },
  78. };
  79. #endif
  80. #ifdef CONFIG_AM_ETHERNET
  81. static void aml_eth_reset(void)
  82. {
  83. #define DELAY_TIME 500
  84. int i;
  85. //eth_set_pinmux(ETH_BANK2_GPIOD15_D23, ETH_CLK_OUT_GPIOD24_REG5_1, 0);
  86. CLEAR_CBUS_REG_MASK(PREG_ETHERNET_ADDR0, 1);
  87. SET_CBUS_REG_MASK(PREG_ETHERNET_ADDR0, (1 << 1));
  88. SET_CBUS_REG_MASK(PREG_ETHERNET_ADDR0, 1);
  89. for (i = 0; i < DELAY_TIME; i++)
  90. udelay(100);
  91. /*reset*/
  92. ///GPIOC19/NA nRst;
  93. set_gpio_mode(PREG_GGPIO,12,GPIO_OUTPUT_MODE);
  94. set_gpio_val(PREG_GGPIO,12,0);
  95. udelay(100); //waiting reset end;
  96. set_gpio_val(PREG_GGPIO,12,1);
  97. udelay(10); //waiting reset end;
  98. }
  99. static void aml_eth_clock_enable(void)
  100. {
  101. printk(KERN_INFO "****** aml_eth_clock_enable() ******\n");
  102. eth_clk_set(ETH_CLKSRC_APLL_CLK, 400*CLK_1M, 50*CLK_1M);
  103. }
  104. static void aml_eth_clock_disable(void)
  105. {
  106. printk(KERN_INFO "****** aml_eth_clock_disable() ******\n");
  107. eth_clk_set(ETH_CLKSRC_APLL_CLK, 0, 0);
  108. }
  109. static pinmux_item_t aml_eth_pins[] = {
  110. /* RMII pin-mux */
  111. {
  112. .reg = PINMUX_REG(ETH_BANK2_REG1),
  113. .clrmask = 0,
  114. .setmask = ETH_BANK2_REG1_VAL,
  115. },
  116. /* RMII CLK50 in-out */
  117. {
  118. .reg = PINMUX_REG(5),
  119. .clrmask = 0,
  120. .setmask = 1 << 1,
  121. },
  122. PINMUX_END_ITEM
  123. };
  124. static struct aml_eth_platdata aml_eth_pdata __initdata = {
  125. .pinmux_items = aml_eth_pins,
  126. .clock_enable = aml_eth_clock_enable,
  127. .clock_disable = aml_eth_clock_disable,
  128. .reset = aml_eth_reset,
  129. };
  130. static void __init setup_eth_device(void)
  131. {
  132. meson_eth_set_platdata(&aml_eth_pdata);
  133. }
  134. #endif
  135. #ifdef CONFIG_AM_REMOTE
  136. static pinmux_item_t aml_remote_pins[] = {
  137. {
  138. .reg = PINMUX_REG(1),
  139. .clrmask = 0,
  140. .setmask = 1 << 31,
  141. },
  142. PINMUX_END_ITEM
  143. };
  144. static struct aml_remote_platdata aml_remote_pdata __initdata = {
  145. .pinmux_items = aml_remote_pins,
  146. .ao_baseaddr = P_IR_DEC_LDR_ACTIVE,
  147. };
  148. static void __init setup_remote_device(void)
  149. {
  150. meson_remote_set_platdata(&aml_remote_pdata);
  151. }
  152. #endif
  153. static void __init device_clk_setting(void)
  154. {
  155. /*Demod CLK for eth and sata*/
  156. //demod_apll_setting(0, 1200*CLK_1M);
  157. /*eth clk*/
  158. //eth_clk_set(ETH_CLKSRC_SYS_D3,900*CLK_1M/3,50*CLK_1M);
  159. //eth_clk_set(ETH_CLKSRC_APLL_CLK, 400*CLK_1M, 50*CLK_1M);
  160. }
  161. static void disable_unused_model(void)
  162. {
  163. }
  164. static struct platform_device __initdata *platform_devs[] = {
  165. #ifdef CONFIG_AM_UART
  166. &aml_uart_device,
  167. #endif
  168. #ifdef CONFIG_AM_ETHERNET
  169. &meson_device_eth,
  170. #endif
  171. #ifdef CONFIG_AM_REMOTE
  172. &meson_device_remote,
  173. #endif
  174. };
  175. static __init void m1_init_machine(void)
  176. {
  177. //meson_cache_init();
  178. device_clk_setting();
  179. #ifdef CONFIG_AM_ETHERNET
  180. setup_eth_device();
  181. #endif
  182. #ifdef CONFIG_AM_REMOTE
  183. setup_remote_device();
  184. #endif
  185. platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
  186. disable_unused_model();
  187. }
  188. /***********************************************************************
  189. * IO Mapping
  190. **********************************************************************/
  191. static __initdata struct map_desc meson_io_desc[] = {
  192. {
  193. .virtual = IO_CBUS_BASE,
  194. .pfn = __phys_to_pfn(IO_CBUS_PHY_BASE),
  195. .length = SZ_2M,
  196. .type = MT_DEVICE,
  197. } , {
  198. .virtual = IO_AXI_BUS_BASE,
  199. .pfn = __phys_to_pfn(IO_AXI_BUS_PHY_BASE),
  200. .length = SZ_1M,
  201. .type = MT_DEVICE,
  202. } , {
  203. .virtual = IO_PL310_BASE,
  204. .pfn = __phys_to_pfn(IO_PL310_PHY_BASE),
  205. .length = SZ_4K,
  206. .type = MT_DEVICE,
  207. } , {
  208. .virtual = IO_AHB_BUS_BASE,
  209. .pfn = __phys_to_pfn(IO_AHB_BUS_PHY_BASE),
  210. .length = SZ_16M,
  211. .type = MT_DEVICE,
  212. } , {
  213. .virtual = IO_APB_BUS_BASE,
  214. .pfn = __phys_to_pfn(IO_APB_BUS_PHY_BASE),
  215. .length = SZ_512K,
  216. .type = MT_DEVICE,
  217. }
  218. };
  219. /*VIDEO MEMORY MAPING*/
  220. static __initdata struct map_desc meson_video_mem_desc[] = {
  221. {
  222. .virtual = PAGE_ALIGN(__phys_to_virt(RESERVED_MEM_START)),
  223. .pfn = __phys_to_pfn(RESERVED_MEM_START),
  224. .length = RESERVED_MEM_END-RESERVED_MEM_START+1,
  225. .type = MT_DEVICE,
  226. },
  227. };
  228. static __init void m1_map_io(void)
  229. {
  230. iotable_init(meson_io_desc, ARRAY_SIZE(meson_io_desc));
  231. iotable_init(meson_video_mem_desc, ARRAY_SIZE(meson_video_mem_desc));
  232. }
  233. static __init void m1_irq_init(void)
  234. {
  235. meson_init_irq();
  236. }
  237. static __init void m1_fixup(struct machine_desc *mach, struct tag *tag, char **cmdline, struct meminfo *m)
  238. {
  239. struct membank *pbank;
  240. m->nr_banks = 0;
  241. pbank=&m->bank[m->nr_banks];
  242. pbank->start = PAGE_ALIGN(PHYS_MEM_START);
  243. pbank->size = SZ_64M & PAGE_MASK;
  244. m->nr_banks++;
  245. pbank=&m->bank[m->nr_banks];
  246. pbank->start = PAGE_ALIGN(RESERVED_MEM_END+1);
  247. pbank->size = (PHYS_MEM_END-RESERVED_MEM_END) & PAGE_MASK;
  248. m->nr_banks++;
  249. }
  250. MACHINE_START(MESON_8626M, "AMLOGIC MESON-M1 8626M SZ")
  251. .boot_params = BOOT_PARAMS_OFFSET,
  252. .map_io = m1_map_io,
  253. .init_irq = m1_irq_init,
  254. .timer = &meson_sys_timer,
  255. .init_machine = m1_init_machine,
  256. .fixup = m1_fixup,
  257. .video_start = RESERVED_MEM_START,
  258. .video_end = RESERVED_MEM_END,
  259. MACHINE_END