DMA-API.txt 26 KB

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  1. Dynamic DMA mapping using the generic device
  2. ============================================
  3. James E.J. Bottomley <James.Bottomley@HansenPartnership.com>
  4. This document describes the DMA API. For a more gentle introduction
  5. of the API (and actual examples) see
  6. Documentation/DMA-API-HOWTO.txt.
  7. This API is split into two pieces. Part I describes the API. Part II
  8. describes the extensions to the API for supporting non-consistent
  9. memory machines. Unless you know that your driver absolutely has to
  10. support non-consistent platforms (this is usually only legacy
  11. platforms) you should only use the API described in part I.
  12. Part I - dma_ API
  13. -------------------------------------
  14. To get the dma_ API, you must #include <linux/dma-mapping.h>
  15. Part Ia - Using large dma-coherent buffers
  16. ------------------------------------------
  17. void *
  18. dma_alloc_coherent(struct device *dev, size_t size,
  19. dma_addr_t *dma_handle, gfp_t flag)
  20. Consistent memory is memory for which a write by either the device or
  21. the processor can immediately be read by the processor or device
  22. without having to worry about caching effects. (You may however need
  23. to make sure to flush the processor's write buffers before telling
  24. devices to read that memory.)
  25. This routine allocates a region of <size> bytes of consistent memory.
  26. It also returns a <dma_handle> which may be cast to an unsigned
  27. integer the same width as the bus and used as the physical address
  28. base of the region.
  29. Returns: a pointer to the allocated region (in the processor's virtual
  30. address space) or NULL if the allocation failed.
  31. Note: consistent memory can be expensive on some platforms, and the
  32. minimum allocation length may be as big as a page, so you should
  33. consolidate your requests for consistent memory as much as possible.
  34. The simplest way to do that is to use the dma_pool calls (see below).
  35. The flag parameter (dma_alloc_coherent only) allows the caller to
  36. specify the GFP_ flags (see kmalloc) for the allocation (the
  37. implementation may choose to ignore flags that affect the location of
  38. the returned memory, like GFP_DMA).
  39. void
  40. dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
  41. dma_addr_t dma_handle)
  42. Free the region of consistent memory you previously allocated. dev,
  43. size and dma_handle must all be the same as those passed into the
  44. consistent allocate. cpu_addr must be the virtual address returned by
  45. the consistent allocate.
  46. Note that unlike their sibling allocation calls, these routines
  47. may only be called with IRQs enabled.
  48. Part Ib - Using small dma-coherent buffers
  49. ------------------------------------------
  50. To get this part of the dma_ API, you must #include <linux/dmapool.h>
  51. Many drivers need lots of small dma-coherent memory regions for DMA
  52. descriptors or I/O buffers. Rather than allocating in units of a page
  53. or more using dma_alloc_coherent(), you can use DMA pools. These work
  54. much like a struct kmem_cache, except that they use the dma-coherent allocator,
  55. not __get_free_pages(). Also, they understand common hardware constraints
  56. for alignment, like queue heads needing to be aligned on N-byte boundaries.
  57. struct dma_pool *
  58. dma_pool_create(const char *name, struct device *dev,
  59. size_t size, size_t align, size_t alloc);
  60. The pool create() routines initialize a pool of dma-coherent buffers
  61. for use with a given device. It must be called in a context which
  62. can sleep.
  63. The "name" is for diagnostics (like a struct kmem_cache name); dev and size
  64. are like what you'd pass to dma_alloc_coherent(). The device's hardware
  65. alignment requirement for this type of data is "align" (which is expressed
  66. in bytes, and must be a power of two). If your device has no boundary
  67. crossing restrictions, pass 0 for alloc; passing 4096 says memory allocated
  68. from this pool must not cross 4KByte boundaries.
  69. void *dma_pool_alloc(struct dma_pool *pool, gfp_t gfp_flags,
  70. dma_addr_t *dma_handle);
  71. This allocates memory from the pool; the returned memory will meet the size
  72. and alignment requirements specified at creation time. Pass GFP_ATOMIC to
  73. prevent blocking, or if it's permitted (not in_interrupt, not holding SMP locks),
  74. pass GFP_KERNEL to allow blocking. Like dma_alloc_coherent(), this returns
  75. two values: an address usable by the cpu, and the dma address usable by the
  76. pool's device.
  77. void dma_pool_free(struct dma_pool *pool, void *vaddr,
  78. dma_addr_t addr);
  79. This puts memory back into the pool. The pool is what was passed to
  80. the pool allocation routine; the cpu (vaddr) and dma addresses are what
  81. were returned when that routine allocated the memory being freed.
  82. void dma_pool_destroy(struct dma_pool *pool);
  83. The pool destroy() routines free the resources of the pool. They must be
  84. called in a context which can sleep. Make sure you've freed all allocated
  85. memory back to the pool before you destroy it.
  86. Part Ic - DMA addressing limitations
  87. ------------------------------------
  88. int
  89. dma_supported(struct device *dev, u64 mask)
  90. Checks to see if the device can support DMA to the memory described by
  91. mask.
  92. Returns: 1 if it can and 0 if it can't.
  93. Notes: This routine merely tests to see if the mask is possible. It
  94. won't change the current mask settings. It is more intended as an
  95. internal API for use by the platform than an external API for use by
  96. driver writers.
  97. int
  98. dma_set_mask(struct device *dev, u64 mask)
  99. Checks to see if the mask is possible and updates the device
  100. parameters if it is.
  101. Returns: 0 if successful and a negative error if not.
  102. int
  103. dma_set_coherent_mask(struct device *dev, u64 mask)
  104. Checks to see if the mask is possible and updates the device
  105. parameters if it is.
  106. Returns: 0 if successful and a negative error if not.
  107. u64
  108. dma_get_required_mask(struct device *dev)
  109. This API returns the mask that the platform requires to
  110. operate efficiently. Usually this means the returned mask
  111. is the minimum required to cover all of memory. Examining the
  112. required mask gives drivers with variable descriptor sizes the
  113. opportunity to use smaller descriptors as necessary.
  114. Requesting the required mask does not alter the current mask. If you
  115. wish to take advantage of it, you should issue a dma_set_mask()
  116. call to set the mask to the value returned.
  117. Part Id - Streaming DMA mappings
  118. --------------------------------
  119. dma_addr_t
  120. dma_map_single(struct device *dev, void *cpu_addr, size_t size,
  121. enum dma_data_direction direction)
  122. Maps a piece of processor virtual memory so it can be accessed by the
  123. device and returns the physical handle of the memory.
  124. The direction for both api's may be converted freely by casting.
  125. However the dma_ API uses a strongly typed enumerator for its
  126. direction:
  127. DMA_NONE no direction (used for debugging)
  128. DMA_TO_DEVICE data is going from the memory to the device
  129. DMA_FROM_DEVICE data is coming from the device to the memory
  130. DMA_BIDIRECTIONAL direction isn't known
  131. Notes: Not all memory regions in a machine can be mapped by this
  132. API. Further, regions that appear to be physically contiguous in
  133. kernel virtual space may not be contiguous as physical memory. Since
  134. this API does not provide any scatter/gather capability, it will fail
  135. if the user tries to map a non-physically contiguous piece of memory.
  136. For this reason, it is recommended that memory mapped by this API be
  137. obtained only from sources which guarantee it to be physically contiguous
  138. (like kmalloc).
  139. Further, the physical address of the memory must be within the
  140. dma_mask of the device (the dma_mask represents a bit mask of the
  141. addressable region for the device. I.e., if the physical address of
  142. the memory anded with the dma_mask is still equal to the physical
  143. address, then the device can perform DMA to the memory). In order to
  144. ensure that the memory allocated by kmalloc is within the dma_mask,
  145. the driver may specify various platform-dependent flags to restrict
  146. the physical memory range of the allocation (e.g. on x86, GFP_DMA
  147. guarantees to be within the first 16Mb of available physical memory,
  148. as required by ISA devices).
  149. Note also that the above constraints on physical contiguity and
  150. dma_mask may not apply if the platform has an IOMMU (a device which
  151. supplies a physical to virtual mapping between the I/O memory bus and
  152. the device). However, to be portable, device driver writers may *not*
  153. assume that such an IOMMU exists.
  154. Warnings: Memory coherency operates at a granularity called the cache
  155. line width. In order for memory mapped by this API to operate
  156. correctly, the mapped region must begin exactly on a cache line
  157. boundary and end exactly on one (to prevent two separately mapped
  158. regions from sharing a single cache line). Since the cache line size
  159. may not be known at compile time, the API will not enforce this
  160. requirement. Therefore, it is recommended that driver writers who
  161. don't take special care to determine the cache line size at run time
  162. only map virtual regions that begin and end on page boundaries (which
  163. are guaranteed also to be cache line boundaries).
  164. DMA_TO_DEVICE synchronisation must be done after the last modification
  165. of the memory region by the software and before it is handed off to
  166. the driver. Once this primitive is used, memory covered by this
  167. primitive should be treated as read-only by the device. If the device
  168. may write to it at any point, it should be DMA_BIDIRECTIONAL (see
  169. below).
  170. DMA_FROM_DEVICE synchronisation must be done before the driver
  171. accesses data that may be changed by the device. This memory should
  172. be treated as read-only by the driver. If the driver needs to write
  173. to it at any point, it should be DMA_BIDIRECTIONAL (see below).
  174. DMA_BIDIRECTIONAL requires special handling: it means that the driver
  175. isn't sure if the memory was modified before being handed off to the
  176. device and also isn't sure if the device will also modify it. Thus,
  177. you must always sync bidirectional memory twice: once before the
  178. memory is handed off to the device (to make sure all memory changes
  179. are flushed from the processor) and once before the data may be
  180. accessed after being used by the device (to make sure any processor
  181. cache lines are updated with data that the device may have changed).
  182. void
  183. dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
  184. enum dma_data_direction direction)
  185. Unmaps the region previously mapped. All the parameters passed in
  186. must be identical to those passed in (and returned) by the mapping
  187. API.
  188. dma_addr_t
  189. dma_map_page(struct device *dev, struct page *page,
  190. unsigned long offset, size_t size,
  191. enum dma_data_direction direction)
  192. void
  193. dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
  194. enum dma_data_direction direction)
  195. API for mapping and unmapping for pages. All the notes and warnings
  196. for the other mapping APIs apply here. Also, although the <offset>
  197. and <size> parameters are provided to do partial page mapping, it is
  198. recommended that you never use these unless you really know what the
  199. cache width is.
  200. int
  201. dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  202. In some circumstances dma_map_single and dma_map_page will fail to create
  203. a mapping. A driver can check for these errors by testing the returned
  204. dma address with dma_mapping_error(). A non-zero return value means the mapping
  205. could not be created and the driver should take appropriate action (e.g.
  206. reduce current DMA mapping usage or delay and try again later).
  207. int
  208. dma_map_sg(struct device *dev, struct scatterlist *sg,
  209. int nents, enum dma_data_direction direction)
  210. Returns: the number of physical segments mapped (this may be shorter
  211. than <nents> passed in if some elements of the scatter/gather list are
  212. physically or virtually adjacent and an IOMMU maps them with a single
  213. entry).
  214. Please note that the sg cannot be mapped again if it has been mapped once.
  215. The mapping process is allowed to destroy information in the sg.
  216. As with the other mapping interfaces, dma_map_sg can fail. When it
  217. does, 0 is returned and a driver must take appropriate action. It is
  218. critical that the driver do something, in the case of a block driver
  219. aborting the request or even oopsing is better than doing nothing and
  220. corrupting the filesystem.
  221. With scatterlists, you use the resulting mapping like this:
  222. int i, count = dma_map_sg(dev, sglist, nents, direction);
  223. struct scatterlist *sg;
  224. for_each_sg(sglist, sg, count, i) {
  225. hw_address[i] = sg_dma_address(sg);
  226. hw_len[i] = sg_dma_len(sg);
  227. }
  228. where nents is the number of entries in the sglist.
  229. The implementation is free to merge several consecutive sglist entries
  230. into one (e.g. with an IOMMU, or if several pages just happen to be
  231. physically contiguous) and returns the actual number of sg entries it
  232. mapped them to. On failure 0, is returned.
  233. Then you should loop count times (note: this can be less than nents times)
  234. and use sg_dma_address() and sg_dma_len() macros where you previously
  235. accessed sg->address and sg->length as shown above.
  236. void
  237. dma_unmap_sg(struct device *dev, struct scatterlist *sg,
  238. int nhwentries, enum dma_data_direction direction)
  239. Unmap the previously mapped scatter/gather list. All the parameters
  240. must be the same as those and passed in to the scatter/gather mapping
  241. API.
  242. Note: <nents> must be the number you passed in, *not* the number of
  243. physical entries returned.
  244. void
  245. dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
  246. enum dma_data_direction direction)
  247. void
  248. dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
  249. enum dma_data_direction direction)
  250. void
  251. dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
  252. enum dma_data_direction direction)
  253. void
  254. dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
  255. enum dma_data_direction direction)
  256. Synchronise a single contiguous or scatter/gather mapping for the cpu
  257. and device. With the sync_sg API, all the parameters must be the same
  258. as those passed into the single mapping API. With the sync_single API,
  259. you can use dma_handle and size parameters that aren't identical to
  260. those passed into the single mapping API to do a partial sync.
  261. Notes: You must do this:
  262. - Before reading values that have been written by DMA from the device
  263. (use the DMA_FROM_DEVICE direction)
  264. - After writing values that will be written to the device using DMA
  265. (use the DMA_TO_DEVICE) direction
  266. - before *and* after handing memory to the device if the memory is
  267. DMA_BIDIRECTIONAL
  268. See also dma_map_single().
  269. dma_addr_t
  270. dma_map_single_attrs(struct device *dev, void *cpu_addr, size_t size,
  271. enum dma_data_direction dir,
  272. struct dma_attrs *attrs)
  273. void
  274. dma_unmap_single_attrs(struct device *dev, dma_addr_t dma_addr,
  275. size_t size, enum dma_data_direction dir,
  276. struct dma_attrs *attrs)
  277. int
  278. dma_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
  279. int nents, enum dma_data_direction dir,
  280. struct dma_attrs *attrs)
  281. void
  282. dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sgl,
  283. int nents, enum dma_data_direction dir,
  284. struct dma_attrs *attrs)
  285. The four functions above are just like the counterpart functions
  286. without the _attrs suffixes, except that they pass an optional
  287. struct dma_attrs*.
  288. struct dma_attrs encapsulates a set of "dma attributes". For the
  289. definition of struct dma_attrs see linux/dma-attrs.h.
  290. The interpretation of dma attributes is architecture-specific, and
  291. each attribute should be documented in Documentation/DMA-attributes.txt.
  292. If struct dma_attrs* is NULL, the semantics of each of these
  293. functions is identical to those of the corresponding function
  294. without the _attrs suffix. As a result dma_map_single_attrs()
  295. can generally replace dma_map_single(), etc.
  296. As an example of the use of the *_attrs functions, here's how
  297. you could pass an attribute DMA_ATTR_FOO when mapping memory
  298. for DMA:
  299. #include <linux/dma-attrs.h>
  300. /* DMA_ATTR_FOO should be defined in linux/dma-attrs.h and
  301. * documented in Documentation/DMA-attributes.txt */
  302. ...
  303. DEFINE_DMA_ATTRS(attrs);
  304. dma_set_attr(DMA_ATTR_FOO, &attrs);
  305. ....
  306. n = dma_map_sg_attrs(dev, sg, nents, DMA_TO_DEVICE, &attr);
  307. ....
  308. Architectures that care about DMA_ATTR_FOO would check for its
  309. presence in their implementations of the mapping and unmapping
  310. routines, e.g.:
  311. void whizco_dma_map_sg_attrs(struct device *dev, dma_addr_t dma_addr,
  312. size_t size, enum dma_data_direction dir,
  313. struct dma_attrs *attrs)
  314. {
  315. ....
  316. int foo = dma_get_attr(DMA_ATTR_FOO, attrs);
  317. ....
  318. if (foo)
  319. /* twizzle the frobnozzle */
  320. ....
  321. Part II - Advanced dma_ usage
  322. -----------------------------
  323. Warning: These pieces of the DMA API should not be used in the
  324. majority of cases, since they cater for unlikely corner cases that
  325. don't belong in usual drivers.
  326. If you don't understand how cache line coherency works between a
  327. processor and an I/O device, you should not be using this part of the
  328. API at all.
  329. void *
  330. dma_alloc_noncoherent(struct device *dev, size_t size,
  331. dma_addr_t *dma_handle, gfp_t flag)
  332. Identical to dma_alloc_coherent() except that the platform will
  333. choose to return either consistent or non-consistent memory as it sees
  334. fit. By using this API, you are guaranteeing to the platform that you
  335. have all the correct and necessary sync points for this memory in the
  336. driver should it choose to return non-consistent memory.
  337. Note: where the platform can return consistent memory, it will
  338. guarantee that the sync points become nops.
  339. Warning: Handling non-consistent memory is a real pain. You should
  340. only ever use this API if you positively know your driver will be
  341. required to work on one of the rare (usually non-PCI) architectures
  342. that simply cannot make consistent memory.
  343. void
  344. dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
  345. dma_addr_t dma_handle)
  346. Free memory allocated by the nonconsistent API. All parameters must
  347. be identical to those passed in (and returned by
  348. dma_alloc_noncoherent()).
  349. int
  350. dma_get_cache_alignment(void)
  351. Returns the processor cache alignment. This is the absolute minimum
  352. alignment *and* width that you must observe when either mapping
  353. memory or doing partial flushes.
  354. Notes: This API may return a number *larger* than the actual cache
  355. line, but it will guarantee that one or more cache lines fit exactly
  356. into the width returned by this call. It will also always be a power
  357. of two for easy alignment.
  358. void
  359. dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  360. enum dma_data_direction direction)
  361. Do a partial sync of memory that was allocated by
  362. dma_alloc_noncoherent(), starting at virtual address vaddr and
  363. continuing on for size. Again, you *must* observe the cache line
  364. boundaries when doing this.
  365. int
  366. dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
  367. dma_addr_t device_addr, size_t size, int
  368. flags)
  369. Declare region of memory to be handed out by dma_alloc_coherent when
  370. it's asked for coherent memory for this device.
  371. bus_addr is the physical address to which the memory is currently
  372. assigned in the bus responding region (this will be used by the
  373. platform to perform the mapping).
  374. device_addr is the physical address the device needs to be programmed
  375. with actually to address this memory (this will be handed out as the
  376. dma_addr_t in dma_alloc_coherent()).
  377. size is the size of the area (must be multiples of PAGE_SIZE).
  378. flags can be or'd together and are:
  379. DMA_MEMORY_MAP - request that the memory returned from
  380. dma_alloc_coherent() be directly writable.
  381. DMA_MEMORY_IO - request that the memory returned from
  382. dma_alloc_coherent() be addressable using read/write/memcpy_toio etc.
  383. One or both of these flags must be present.
  384. DMA_MEMORY_INCLUDES_CHILDREN - make the declared memory be allocated by
  385. dma_alloc_coherent of any child devices of this one (for memory residing
  386. on a bridge).
  387. DMA_MEMORY_EXCLUSIVE - only allocate memory from the declared regions.
  388. Do not allow dma_alloc_coherent() to fall back to system memory when
  389. it's out of memory in the declared region.
  390. The return value will be either DMA_MEMORY_MAP or DMA_MEMORY_IO and
  391. must correspond to a passed in flag (i.e. no returning DMA_MEMORY_IO
  392. if only DMA_MEMORY_MAP were passed in) for success or zero for
  393. failure.
  394. Note, for DMA_MEMORY_IO returns, all subsequent memory returned by
  395. dma_alloc_coherent() may no longer be accessed directly, but instead
  396. must be accessed using the correct bus functions. If your driver
  397. isn't prepared to handle this contingency, it should not specify
  398. DMA_MEMORY_IO in the input flags.
  399. As a simplification for the platforms, only *one* such region of
  400. memory may be declared per device.
  401. For reasons of efficiency, most platforms choose to track the declared
  402. region only at the granularity of a page. For smaller allocations,
  403. you should use the dma_pool() API.
  404. void
  405. dma_release_declared_memory(struct device *dev)
  406. Remove the memory region previously declared from the system. This
  407. API performs *no* in-use checking for this region and will return
  408. unconditionally having removed all the required structures. It is the
  409. driver's job to ensure that no parts of this memory region are
  410. currently in use.
  411. void *
  412. dma_mark_declared_memory_occupied(struct device *dev,
  413. dma_addr_t device_addr, size_t size)
  414. This is used to occupy specific regions of the declared space
  415. (dma_alloc_coherent() will hand out the first free region it finds).
  416. device_addr is the *device* address of the region requested.
  417. size is the size (and should be a page-sized multiple).
  418. The return value will be either a pointer to the processor virtual
  419. address of the memory, or an error (via PTR_ERR()) if any part of the
  420. region is occupied.
  421. Part III - Debug drivers use of the DMA-API
  422. -------------------------------------------
  423. The DMA-API as described above as some constraints. DMA addresses must be
  424. released with the corresponding function with the same size for example. With
  425. the advent of hardware IOMMUs it becomes more and more important that drivers
  426. do not violate those constraints. In the worst case such a violation can
  427. result in data corruption up to destroyed filesystems.
  428. To debug drivers and find bugs in the usage of the DMA-API checking code can
  429. be compiled into the kernel which will tell the developer about those
  430. violations. If your architecture supports it you can select the "Enable
  431. debugging of DMA-API usage" option in your kernel configuration. Enabling this
  432. option has a performance impact. Do not enable it in production kernels.
  433. If you boot the resulting kernel will contain code which does some bookkeeping
  434. about what DMA memory was allocated for which device. If this code detects an
  435. error it prints a warning message with some details into your kernel log. An
  436. example warning message may look like this:
  437. ------------[ cut here ]------------
  438. WARNING: at /data2/repos/linux-2.6-iommu/lib/dma-debug.c:448
  439. check_unmap+0x203/0x490()
  440. Hardware name:
  441. forcedeth 0000:00:08.0: DMA-API: device driver frees DMA memory with wrong
  442. function [device address=0x00000000640444be] [size=66 bytes] [mapped as
  443. single] [unmapped as page]
  444. Modules linked in: nfsd exportfs bridge stp llc r8169
  445. Pid: 0, comm: swapper Tainted: G W 2.6.28-dmatest-09289-g8bb99c0 #1
  446. Call Trace:
  447. <IRQ> [<ffffffff80240b22>] warn_slowpath+0xf2/0x130
  448. [<ffffffff80647b70>] _spin_unlock+0x10/0x30
  449. [<ffffffff80537e75>] usb_hcd_link_urb_to_ep+0x75/0xc0
  450. [<ffffffff80647c22>] _spin_unlock_irqrestore+0x12/0x40
  451. [<ffffffff8055347f>] ohci_urb_enqueue+0x19f/0x7c0
  452. [<ffffffff80252f96>] queue_work+0x56/0x60
  453. [<ffffffff80237e10>] enqueue_task_fair+0x20/0x50
  454. [<ffffffff80539279>] usb_hcd_submit_urb+0x379/0xbc0
  455. [<ffffffff803b78c3>] cpumask_next_and+0x23/0x40
  456. [<ffffffff80235177>] find_busiest_group+0x207/0x8a0
  457. [<ffffffff8064784f>] _spin_lock_irqsave+0x1f/0x50
  458. [<ffffffff803c7ea3>] check_unmap+0x203/0x490
  459. [<ffffffff803c8259>] debug_dma_unmap_page+0x49/0x50
  460. [<ffffffff80485f26>] nv_tx_done_optimized+0xc6/0x2c0
  461. [<ffffffff80486c13>] nv_nic_irq_optimized+0x73/0x2b0
  462. [<ffffffff8026df84>] handle_IRQ_event+0x34/0x70
  463. [<ffffffff8026ffe9>] handle_edge_irq+0xc9/0x150
  464. [<ffffffff8020e3ab>] do_IRQ+0xcb/0x1c0
  465. [<ffffffff8020c093>] ret_from_intr+0x0/0xa
  466. <EOI> <4>---[ end trace f6435a98e2a38c0e ]---
  467. The driver developer can find the driver and the device including a stacktrace
  468. of the DMA-API call which caused this warning.
  469. Per default only the first error will result in a warning message. All other
  470. errors will only silently counted. This limitation exist to prevent the code
  471. from flooding your kernel log. To support debugging a device driver this can
  472. be disabled via debugfs. See the debugfs interface documentation below for
  473. details.
  474. The debugfs directory for the DMA-API debugging code is called dma-api/. In
  475. this directory the following files can currently be found:
  476. dma-api/all_errors This file contains a numeric value. If this
  477. value is not equal to zero the debugging code
  478. will print a warning for every error it finds
  479. into the kernel log. Be careful with this
  480. option, as it can easily flood your logs.
  481. dma-api/disabled This read-only file contains the character 'Y'
  482. if the debugging code is disabled. This can
  483. happen when it runs out of memory or if it was
  484. disabled at boot time
  485. dma-api/error_count This file is read-only and shows the total
  486. numbers of errors found.
  487. dma-api/num_errors The number in this file shows how many
  488. warnings will be printed to the kernel log
  489. before it stops. This number is initialized to
  490. one at system boot and be set by writing into
  491. this file
  492. dma-api/min_free_entries
  493. This read-only file can be read to get the
  494. minimum number of free dma_debug_entries the
  495. allocator has ever seen. If this value goes
  496. down to zero the code will disable itself
  497. because it is not longer reliable.
  498. dma-api/num_free_entries
  499. The current number of free dma_debug_entries
  500. in the allocator.
  501. dma-api/driver-filter
  502. You can write a name of a driver into this file
  503. to limit the debug output to requests from that
  504. particular driver. Write an empty string to
  505. that file to disable the filter and see
  506. all errors again.
  507. If you have this code compiled into your kernel it will be enabled by default.
  508. If you want to boot without the bookkeeping anyway you can provide
  509. 'dma_debug=off' as a boot parameter. This will disable DMA-API debugging.
  510. Notice that you can not enable it again at runtime. You have to reboot to do
  511. so.
  512. If you want to see debug messages only for a special device driver you can
  513. specify the dma_debug_driver=<drivername> parameter. This will enable the
  514. driver filter at boot time. The debug code will only print errors for that
  515. driver afterwards. This filter can be disabled or changed later using debugfs.
  516. When the code disables itself at runtime this is most likely because it ran
  517. out of dma_debug_entries. These entries are preallocated at boot. The number
  518. of preallocated entries is defined per architecture. If it is too low for you
  519. boot with 'dma_debug_entries=<your_desired_number>' to overwrite the
  520. architectural default.