davinci-pcm.c 25 KB

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  1. /*
  2. * ALSA PCM interface for the TI DAVINCI processor
  3. *
  4. * Author: Vladimir Barinov, <vbarinov@embeddedalley.com>
  5. * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>
  6. * added SRAM ping/pong (C) 2008 Troy Kisky <troy.kisky@boundarydevices.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/slab.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/kernel.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/soc.h>
  22. #include <asm/dma.h>
  23. #include <mach/edma.h>
  24. #include <mach/sram.h>
  25. #include "davinci-pcm.h"
  26. #ifdef DEBUG
  27. static void print_buf_info(int slot, char *name)
  28. {
  29. struct edmacc_param p;
  30. if (slot < 0)
  31. return;
  32. edma_read_slot(slot, &p);
  33. printk(KERN_DEBUG "%s: 0x%x, opt=%x, src=%x, a_b_cnt=%x dst=%x\n",
  34. name, slot, p.opt, p.src, p.a_b_cnt, p.dst);
  35. printk(KERN_DEBUG " src_dst_bidx=%x link_bcntrld=%x src_dst_cidx=%x ccnt=%x\n",
  36. p.src_dst_bidx, p.link_bcntrld, p.src_dst_cidx, p.ccnt);
  37. }
  38. #else
  39. static void print_buf_info(int slot, char *name)
  40. {
  41. }
  42. #endif
  43. static struct snd_pcm_hardware pcm_hardware_playback = {
  44. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  45. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  46. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
  47. .formats = (SNDRV_PCM_FMTBIT_S16_LE),
  48. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
  49. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
  50. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
  51. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
  52. SNDRV_PCM_RATE_KNOT),
  53. .rate_min = 8000,
  54. .rate_max = 96000,
  55. .channels_min = 2,
  56. .channels_max = 2,
  57. .buffer_bytes_max = 128 * 1024,
  58. .period_bytes_min = 32,
  59. .period_bytes_max = 8 * 1024,
  60. .periods_min = 16,
  61. .periods_max = 255,
  62. .fifo_size = 0,
  63. };
  64. static struct snd_pcm_hardware pcm_hardware_capture = {
  65. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  66. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  67. SNDRV_PCM_INFO_PAUSE),
  68. .formats = (SNDRV_PCM_FMTBIT_S16_LE),
  69. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
  70. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
  71. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
  72. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
  73. SNDRV_PCM_RATE_KNOT),
  74. .rate_min = 8000,
  75. .rate_max = 96000,
  76. .channels_min = 2,
  77. .channels_max = 2,
  78. .buffer_bytes_max = 128 * 1024,
  79. .period_bytes_min = 32,
  80. .period_bytes_max = 8 * 1024,
  81. .periods_min = 16,
  82. .periods_max = 255,
  83. .fifo_size = 0,
  84. };
  85. /*
  86. * How ping/pong works....
  87. *
  88. * Playback:
  89. * ram_params - copys 2*ping_size from start of SDRAM to iram,
  90. * links to ram_link2
  91. * ram_link2 - copys rest of SDRAM to iram in ping_size units,
  92. * links to ram_link
  93. * ram_link - copys entire SDRAM to iram in ping_size uints,
  94. * links to self
  95. *
  96. * asp_params - same as asp_link[0]
  97. * asp_link[0] - copys from lower half of iram to asp port
  98. * links to asp_link[1], triggers iram copy event on completion
  99. * asp_link[1] - copys from upper half of iram to asp port
  100. * links to asp_link[0], triggers iram copy event on completion
  101. * triggers interrupt only needed to let upper SOC levels update position
  102. * in stream on completion
  103. *
  104. * When playback is started:
  105. * ram_params started
  106. * asp_params started
  107. *
  108. * Capture:
  109. * ram_params - same as ram_link,
  110. * links to ram_link
  111. * ram_link - same as playback
  112. * links to self
  113. *
  114. * asp_params - same as playback
  115. * asp_link[0] - same as playback
  116. * asp_link[1] - same as playback
  117. *
  118. * When capture is started:
  119. * asp_params started
  120. */
  121. struct davinci_runtime_data {
  122. spinlock_t lock;
  123. int period; /* current DMA period */
  124. int asp_channel; /* Master DMA channel */
  125. int asp_link[2]; /* asp parameter link channel, ping/pong */
  126. struct davinci_pcm_dma_params *params; /* DMA params */
  127. int ram_channel;
  128. int ram_link;
  129. int ram_link2;
  130. struct edmacc_param asp_params;
  131. struct edmacc_param ram_params;
  132. };
  133. /*
  134. * Not used with ping/pong
  135. */
  136. static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
  137. {
  138. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  139. struct snd_pcm_runtime *runtime = substream->runtime;
  140. int link = prtd->asp_link[0];
  141. unsigned int period_size;
  142. unsigned int dma_offset;
  143. dma_addr_t dma_pos;
  144. dma_addr_t src, dst;
  145. unsigned short src_bidx, dst_bidx;
  146. unsigned short src_cidx, dst_cidx;
  147. unsigned int data_type;
  148. unsigned short acnt;
  149. unsigned int count;
  150. unsigned int fifo_level;
  151. period_size = snd_pcm_lib_period_bytes(substream);
  152. dma_offset = prtd->period * period_size;
  153. dma_pos = runtime->dma_addr + dma_offset;
  154. fifo_level = prtd->params->fifo_level;
  155. pr_debug("davinci_pcm: audio_set_dma_params_play channel = %d "
  156. "dma_ptr = %x period_size=%x\n", link, dma_pos, period_size);
  157. data_type = prtd->params->data_type;
  158. count = period_size / data_type;
  159. if (fifo_level)
  160. count /= fifo_level;
  161. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  162. src = dma_pos;
  163. dst = prtd->params->dma_addr;
  164. src_bidx = data_type;
  165. dst_bidx = 0;
  166. src_cidx = data_type * fifo_level;
  167. dst_cidx = 0;
  168. } else {
  169. src = prtd->params->dma_addr;
  170. dst = dma_pos;
  171. src_bidx = 0;
  172. dst_bidx = data_type;
  173. src_cidx = 0;
  174. dst_cidx = data_type * fifo_level;
  175. }
  176. acnt = prtd->params->acnt;
  177. edma_set_src(link, src, INCR, W8BIT);
  178. edma_set_dest(link, dst, INCR, W8BIT);
  179. edma_set_src_index(link, src_bidx, src_cidx);
  180. edma_set_dest_index(link, dst_bidx, dst_cidx);
  181. if (!fifo_level)
  182. edma_set_transfer_params(link, acnt, count, 1, 0, ASYNC);
  183. else
  184. edma_set_transfer_params(link, acnt, fifo_level, count,
  185. fifo_level, ABSYNC);
  186. prtd->period++;
  187. if (unlikely(prtd->period >= runtime->periods))
  188. prtd->period = 0;
  189. }
  190. static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
  191. {
  192. struct snd_pcm_substream *substream = data;
  193. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  194. print_buf_info(prtd->ram_channel, "i ram_channel");
  195. pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
  196. if (unlikely(ch_status != DMA_COMPLETE))
  197. return;
  198. if (snd_pcm_running(substream)) {
  199. if (prtd->ram_channel < 0) {
  200. /* No ping/pong must fix up link dma data*/
  201. spin_lock(&prtd->lock);
  202. davinci_pcm_enqueue_dma(substream);
  203. spin_unlock(&prtd->lock);
  204. }
  205. snd_pcm_period_elapsed(substream);
  206. }
  207. }
  208. static int allocate_sram(struct snd_pcm_substream *substream, unsigned size,
  209. struct snd_pcm_hardware *ppcm)
  210. {
  211. struct snd_dma_buffer *buf = &substream->dma_buffer;
  212. struct snd_dma_buffer *iram_dma = NULL;
  213. dma_addr_t iram_phys = 0;
  214. void *iram_virt = NULL;
  215. if (buf->private_data || !size)
  216. return 0;
  217. ppcm->period_bytes_max = size;
  218. iram_virt = sram_alloc(size, &iram_phys);
  219. if (!iram_virt)
  220. goto exit1;
  221. iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
  222. if (!iram_dma)
  223. goto exit2;
  224. iram_dma->area = iram_virt;
  225. iram_dma->addr = iram_phys;
  226. memset(iram_dma->area, 0, size);
  227. iram_dma->bytes = size;
  228. buf->private_data = iram_dma;
  229. return 0;
  230. exit2:
  231. if (iram_virt)
  232. sram_free(iram_virt, size);
  233. exit1:
  234. return -ENOMEM;
  235. }
  236. /*
  237. * Only used with ping/pong.
  238. * This is called after runtime->dma_addr, period_bytes and data_type are valid
  239. */
  240. static int ping_pong_dma_setup(struct snd_pcm_substream *substream)
  241. {
  242. unsigned short ram_src_cidx, ram_dst_cidx;
  243. struct snd_pcm_runtime *runtime = substream->runtime;
  244. struct davinci_runtime_data *prtd = runtime->private_data;
  245. struct snd_dma_buffer *iram_dma =
  246. (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  247. struct davinci_pcm_dma_params *params = prtd->params;
  248. unsigned int data_type = params->data_type;
  249. unsigned int acnt = params->acnt;
  250. /* divide by 2 for ping/pong */
  251. unsigned int ping_size = snd_pcm_lib_period_bytes(substream) >> 1;
  252. int link = prtd->asp_link[1];
  253. unsigned int fifo_level = prtd->params->fifo_level;
  254. unsigned int count;
  255. if ((data_type == 0) || (data_type > 4)) {
  256. printk(KERN_ERR "%s: data_type=%i\n", __func__, data_type);
  257. return -EINVAL;
  258. }
  259. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  260. dma_addr_t asp_src_pong = iram_dma->addr + ping_size;
  261. ram_src_cidx = ping_size;
  262. ram_dst_cidx = -ping_size;
  263. edma_set_src(link, asp_src_pong, INCR, W8BIT);
  264. link = prtd->asp_link[0];
  265. edma_set_src_index(link, data_type, data_type * fifo_level);
  266. link = prtd->asp_link[1];
  267. edma_set_src_index(link, data_type, data_type * fifo_level);
  268. link = prtd->ram_link;
  269. edma_set_src(link, runtime->dma_addr, INCR, W32BIT);
  270. } else {
  271. dma_addr_t asp_dst_pong = iram_dma->addr + ping_size;
  272. ram_src_cidx = -ping_size;
  273. ram_dst_cidx = ping_size;
  274. edma_set_dest(link, asp_dst_pong, INCR, W8BIT);
  275. link = prtd->asp_link[0];
  276. edma_set_dest_index(link, data_type, data_type * fifo_level);
  277. link = prtd->asp_link[1];
  278. edma_set_dest_index(link, data_type, data_type * fifo_level);
  279. link = prtd->ram_link;
  280. edma_set_dest(link, runtime->dma_addr, INCR, W32BIT);
  281. }
  282. if (!fifo_level) {
  283. count = ping_size / data_type;
  284. edma_set_transfer_params(prtd->asp_link[0], acnt, count,
  285. 1, 0, ASYNC);
  286. edma_set_transfer_params(prtd->asp_link[1], acnt, count,
  287. 1, 0, ASYNC);
  288. } else {
  289. count = ping_size / (data_type * fifo_level);
  290. edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
  291. count, fifo_level, ABSYNC);
  292. edma_set_transfer_params(prtd->asp_link[1], acnt, fifo_level,
  293. count, fifo_level, ABSYNC);
  294. }
  295. link = prtd->ram_link;
  296. edma_set_src_index(link, ping_size, ram_src_cidx);
  297. edma_set_dest_index(link, ping_size, ram_dst_cidx);
  298. edma_set_transfer_params(link, ping_size, 2,
  299. runtime->periods, 2, ASYNC);
  300. /* init master params */
  301. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  302. edma_read_slot(prtd->ram_link, &prtd->ram_params);
  303. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  304. struct edmacc_param p_ram;
  305. /* Copy entire iram buffer before playback started */
  306. prtd->ram_params.a_b_cnt = (1 << 16) | (ping_size << 1);
  307. /* 0 dst_bidx */
  308. prtd->ram_params.src_dst_bidx = (ping_size << 1);
  309. /* 0 dst_cidx */
  310. prtd->ram_params.src_dst_cidx = (ping_size << 1);
  311. prtd->ram_params.ccnt = 1;
  312. /* Skip 1st period */
  313. edma_read_slot(prtd->ram_link, &p_ram);
  314. p_ram.src += (ping_size << 1);
  315. p_ram.ccnt -= 1;
  316. edma_write_slot(prtd->ram_link2, &p_ram);
  317. /*
  318. * When 1st started, ram -> iram dma channel will fill the
  319. * entire iram. Then, whenever a ping/pong asp buffer finishes,
  320. * 1/2 iram will be filled.
  321. */
  322. prtd->ram_params.link_bcntrld =
  323. EDMA_CHAN_SLOT(prtd->ram_link2) << 5;
  324. }
  325. return 0;
  326. }
  327. /* 1 asp tx or rx channel using 2 parameter channels
  328. * 1 ram to/from iram channel using 1 parameter channel
  329. *
  330. * Playback
  331. * ram copy channel kicks off first,
  332. * 1st ram copy of entire iram buffer completion kicks off asp channel
  333. * asp tcc always kicks off ram copy of 1/2 iram buffer
  334. *
  335. * Record
  336. * asp channel starts, tcc kicks off ram copy
  337. */
  338. static int request_ping_pong(struct snd_pcm_substream *substream,
  339. struct davinci_runtime_data *prtd,
  340. struct snd_dma_buffer *iram_dma)
  341. {
  342. dma_addr_t asp_src_ping;
  343. dma_addr_t asp_dst_ping;
  344. int link;
  345. struct davinci_pcm_dma_params *params = prtd->params;
  346. /* Request ram master channel */
  347. link = prtd->ram_channel = edma_alloc_channel(EDMA_CHANNEL_ANY,
  348. davinci_pcm_dma_irq, substream,
  349. prtd->params->ram_chan_q);
  350. if (link < 0)
  351. goto exit1;
  352. /* Request ram link channel */
  353. link = prtd->ram_link = edma_alloc_slot(
  354. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  355. if (link < 0)
  356. goto exit2;
  357. link = prtd->asp_link[1] = edma_alloc_slot(
  358. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  359. if (link < 0)
  360. goto exit3;
  361. prtd->ram_link2 = -1;
  362. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  363. link = prtd->ram_link2 = edma_alloc_slot(
  364. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  365. if (link < 0)
  366. goto exit4;
  367. }
  368. /* circle ping-pong buffers */
  369. edma_link(prtd->asp_link[0], prtd->asp_link[1]);
  370. edma_link(prtd->asp_link[1], prtd->asp_link[0]);
  371. /* circle ram buffers */
  372. edma_link(prtd->ram_link, prtd->ram_link);
  373. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  374. asp_src_ping = iram_dma->addr;
  375. asp_dst_ping = params->dma_addr; /* fifo */
  376. } else {
  377. asp_src_ping = params->dma_addr; /* fifo */
  378. asp_dst_ping = iram_dma->addr;
  379. }
  380. /* ping */
  381. link = prtd->asp_link[0];
  382. edma_set_src(link, asp_src_ping, INCR, W16BIT);
  383. edma_set_dest(link, asp_dst_ping, INCR, W16BIT);
  384. edma_set_src_index(link, 0, 0);
  385. edma_set_dest_index(link, 0, 0);
  386. edma_read_slot(link, &prtd->asp_params);
  387. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f) | TCINTEN);
  388. prtd->asp_params.opt |= TCCHEN | EDMA_TCC(prtd->ram_channel & 0x3f);
  389. edma_write_slot(link, &prtd->asp_params);
  390. /* pong */
  391. link = prtd->asp_link[1];
  392. edma_set_src(link, asp_src_ping, INCR, W16BIT);
  393. edma_set_dest(link, asp_dst_ping, INCR, W16BIT);
  394. edma_set_src_index(link, 0, 0);
  395. edma_set_dest_index(link, 0, 0);
  396. edma_read_slot(link, &prtd->asp_params);
  397. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f));
  398. /* interrupt after every pong completion */
  399. prtd->asp_params.opt |= TCINTEN | TCCHEN |
  400. EDMA_TCC(EDMA_CHAN_SLOT(prtd->ram_channel));
  401. edma_write_slot(link, &prtd->asp_params);
  402. /* ram */
  403. link = prtd->ram_link;
  404. edma_set_src(link, iram_dma->addr, INCR, W32BIT);
  405. edma_set_dest(link, iram_dma->addr, INCR, W32BIT);
  406. pr_debug("%s: audio dma channels/slots in use for ram:%u %u %u,"
  407. "for asp:%u %u %u\n", __func__,
  408. prtd->ram_channel, prtd->ram_link, prtd->ram_link2,
  409. prtd->asp_channel, prtd->asp_link[0],
  410. prtd->asp_link[1]);
  411. return 0;
  412. exit4:
  413. edma_free_channel(prtd->asp_link[1]);
  414. prtd->asp_link[1] = -1;
  415. exit3:
  416. edma_free_channel(prtd->ram_link);
  417. prtd->ram_link = -1;
  418. exit2:
  419. edma_free_channel(prtd->ram_channel);
  420. prtd->ram_channel = -1;
  421. exit1:
  422. return link;
  423. }
  424. static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
  425. {
  426. struct snd_dma_buffer *iram_dma;
  427. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  428. struct davinci_pcm_dma_params *params = prtd->params;
  429. int link;
  430. if (!params)
  431. return -ENODEV;
  432. /* Request asp master DMA channel */
  433. link = prtd->asp_channel = edma_alloc_channel(params->channel,
  434. davinci_pcm_dma_irq, substream,
  435. prtd->params->asp_chan_q);
  436. if (link < 0)
  437. goto exit1;
  438. /* Request asp link channels */
  439. link = prtd->asp_link[0] = edma_alloc_slot(
  440. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  441. if (link < 0)
  442. goto exit2;
  443. iram_dma = (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  444. if (iram_dma) {
  445. if (request_ping_pong(substream, prtd, iram_dma) == 0)
  446. return 0;
  447. printk(KERN_WARNING "%s: dma channel allocation failed,"
  448. "not using sram\n", __func__);
  449. }
  450. /* Issue transfer completion IRQ when the channel completes a
  451. * transfer, then always reload from the same slot (by a kind
  452. * of loopback link). The completion IRQ handler will update
  453. * the reload slot with a new buffer.
  454. *
  455. * REVISIT save p_ram here after setting up everything except
  456. * the buffer and its length (ccnt) ... use it as a template
  457. * so davinci_pcm_enqueue_dma() takes less time in IRQ.
  458. */
  459. edma_read_slot(link, &prtd->asp_params);
  460. prtd->asp_params.opt |= TCINTEN |
  461. EDMA_TCC(EDMA_CHAN_SLOT(prtd->asp_channel));
  462. prtd->asp_params.link_bcntrld = EDMA_CHAN_SLOT(link) << 5;
  463. edma_write_slot(link, &prtd->asp_params);
  464. return 0;
  465. exit2:
  466. edma_free_channel(prtd->asp_channel);
  467. prtd->asp_channel = -1;
  468. exit1:
  469. return link;
  470. }
  471. static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  472. {
  473. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  474. int ret = 0;
  475. spin_lock(&prtd->lock);
  476. switch (cmd) {
  477. case SNDRV_PCM_TRIGGER_START:
  478. case SNDRV_PCM_TRIGGER_RESUME:
  479. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  480. edma_resume(prtd->asp_channel);
  481. break;
  482. case SNDRV_PCM_TRIGGER_STOP:
  483. case SNDRV_PCM_TRIGGER_SUSPEND:
  484. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  485. edma_pause(prtd->asp_channel);
  486. break;
  487. default:
  488. ret = -EINVAL;
  489. break;
  490. }
  491. spin_unlock(&prtd->lock);
  492. return ret;
  493. }
  494. static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
  495. {
  496. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  497. if (prtd->ram_channel >= 0) {
  498. int ret = ping_pong_dma_setup(substream);
  499. if (ret < 0)
  500. return ret;
  501. edma_write_slot(prtd->ram_channel, &prtd->ram_params);
  502. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  503. print_buf_info(prtd->ram_channel, "ram_channel");
  504. print_buf_info(prtd->ram_link, "ram_link");
  505. print_buf_info(prtd->ram_link2, "ram_link2");
  506. print_buf_info(prtd->asp_channel, "asp_channel");
  507. print_buf_info(prtd->asp_link[0], "asp_link[0]");
  508. print_buf_info(prtd->asp_link[1], "asp_link[1]");
  509. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  510. /* copy 1st iram buffer */
  511. edma_start(prtd->ram_channel);
  512. }
  513. edma_start(prtd->asp_channel);
  514. return 0;
  515. }
  516. prtd->period = 0;
  517. davinci_pcm_enqueue_dma(substream);
  518. /* Copy self-linked parameter RAM entry into master channel */
  519. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  520. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  521. davinci_pcm_enqueue_dma(substream);
  522. edma_start(prtd->asp_channel);
  523. return 0;
  524. }
  525. static snd_pcm_uframes_t
  526. davinci_pcm_pointer(struct snd_pcm_substream *substream)
  527. {
  528. struct snd_pcm_runtime *runtime = substream->runtime;
  529. struct davinci_runtime_data *prtd = runtime->private_data;
  530. unsigned int offset;
  531. int asp_count;
  532. dma_addr_t asp_src, asp_dst;
  533. spin_lock(&prtd->lock);
  534. if (prtd->ram_channel >= 0) {
  535. int ram_count;
  536. int mod_ram;
  537. dma_addr_t ram_src, ram_dst;
  538. unsigned int period_size = snd_pcm_lib_period_bytes(substream);
  539. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  540. /* reading ram before asp should be safe
  541. * as long as the asp transfers less than a ping size
  542. * of bytes between the 2 reads
  543. */
  544. edma_get_position(prtd->ram_channel,
  545. &ram_src, &ram_dst);
  546. edma_get_position(prtd->asp_channel,
  547. &asp_src, &asp_dst);
  548. asp_count = asp_src - prtd->asp_params.src;
  549. ram_count = ram_src - prtd->ram_params.src;
  550. mod_ram = ram_count % period_size;
  551. mod_ram -= asp_count;
  552. if (mod_ram < 0)
  553. mod_ram += period_size;
  554. else if (mod_ram == 0) {
  555. if (snd_pcm_running(substream))
  556. mod_ram += period_size;
  557. }
  558. ram_count -= mod_ram;
  559. if (ram_count < 0)
  560. ram_count += period_size * runtime->periods;
  561. } else {
  562. edma_get_position(prtd->ram_channel,
  563. &ram_src, &ram_dst);
  564. ram_count = ram_dst - prtd->ram_params.dst;
  565. }
  566. asp_count = ram_count;
  567. } else {
  568. edma_get_position(prtd->asp_channel, &asp_src, &asp_dst);
  569. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  570. asp_count = asp_src - runtime->dma_addr;
  571. else
  572. asp_count = asp_dst - runtime->dma_addr;
  573. }
  574. spin_unlock(&prtd->lock);
  575. offset = bytes_to_frames(runtime, asp_count);
  576. if (offset >= runtime->buffer_size)
  577. offset = 0;
  578. return offset;
  579. }
  580. static int davinci_pcm_open(struct snd_pcm_substream *substream)
  581. {
  582. struct snd_pcm_runtime *runtime = substream->runtime;
  583. struct davinci_runtime_data *prtd;
  584. struct snd_pcm_hardware *ppcm;
  585. int ret = 0;
  586. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  587. struct davinci_pcm_dma_params *pa;
  588. struct davinci_pcm_dma_params *params;
  589. pa = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  590. if (!pa)
  591. return -ENODEV;
  592. params = &pa[substream->stream];
  593. ppcm = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
  594. &pcm_hardware_playback : &pcm_hardware_capture;
  595. allocate_sram(substream, params->sram_size, ppcm);
  596. snd_soc_set_runtime_hwparams(substream, ppcm);
  597. /* ensure that buffer size is a multiple of period size */
  598. ret = snd_pcm_hw_constraint_integer(runtime,
  599. SNDRV_PCM_HW_PARAM_PERIODS);
  600. if (ret < 0)
  601. return ret;
  602. prtd = kzalloc(sizeof(struct davinci_runtime_data), GFP_KERNEL);
  603. if (prtd == NULL)
  604. return -ENOMEM;
  605. spin_lock_init(&prtd->lock);
  606. prtd->params = params;
  607. prtd->asp_channel = -1;
  608. prtd->asp_link[0] = prtd->asp_link[1] = -1;
  609. prtd->ram_channel = -1;
  610. prtd->ram_link = -1;
  611. prtd->ram_link2 = -1;
  612. runtime->private_data = prtd;
  613. ret = davinci_pcm_dma_request(substream);
  614. if (ret) {
  615. printk(KERN_ERR "davinci_pcm: Failed to get dma channels\n");
  616. kfree(prtd);
  617. }
  618. return ret;
  619. }
  620. static int davinci_pcm_close(struct snd_pcm_substream *substream)
  621. {
  622. struct snd_pcm_runtime *runtime = substream->runtime;
  623. struct davinci_runtime_data *prtd = runtime->private_data;
  624. if (prtd->ram_channel >= 0)
  625. edma_stop(prtd->ram_channel);
  626. if (prtd->asp_channel >= 0)
  627. edma_stop(prtd->asp_channel);
  628. if (prtd->asp_link[0] >= 0)
  629. edma_unlink(prtd->asp_link[0]);
  630. if (prtd->asp_link[1] >= 0)
  631. edma_unlink(prtd->asp_link[1]);
  632. if (prtd->ram_link >= 0)
  633. edma_unlink(prtd->ram_link);
  634. if (prtd->asp_link[0] >= 0)
  635. edma_free_slot(prtd->asp_link[0]);
  636. if (prtd->asp_link[1] >= 0)
  637. edma_free_slot(prtd->asp_link[1]);
  638. if (prtd->asp_channel >= 0)
  639. edma_free_channel(prtd->asp_channel);
  640. if (prtd->ram_link >= 0)
  641. edma_free_slot(prtd->ram_link);
  642. if (prtd->ram_link2 >= 0)
  643. edma_free_slot(prtd->ram_link2);
  644. if (prtd->ram_channel >= 0)
  645. edma_free_channel(prtd->ram_channel);
  646. kfree(prtd);
  647. return 0;
  648. }
  649. static int davinci_pcm_hw_params(struct snd_pcm_substream *substream,
  650. struct snd_pcm_hw_params *hw_params)
  651. {
  652. return snd_pcm_lib_malloc_pages(substream,
  653. params_buffer_bytes(hw_params));
  654. }
  655. static int davinci_pcm_hw_free(struct snd_pcm_substream *substream)
  656. {
  657. return snd_pcm_lib_free_pages(substream);
  658. }
  659. static int davinci_pcm_mmap(struct snd_pcm_substream *substream,
  660. struct vm_area_struct *vma)
  661. {
  662. struct snd_pcm_runtime *runtime = substream->runtime;
  663. return dma_mmap_writecombine(substream->pcm->card->dev, vma,
  664. runtime->dma_area,
  665. runtime->dma_addr,
  666. runtime->dma_bytes);
  667. }
  668. static struct snd_pcm_ops davinci_pcm_ops = {
  669. .open = davinci_pcm_open,
  670. .close = davinci_pcm_close,
  671. .ioctl = snd_pcm_lib_ioctl,
  672. .hw_params = davinci_pcm_hw_params,
  673. .hw_free = davinci_pcm_hw_free,
  674. .prepare = davinci_pcm_prepare,
  675. .trigger = davinci_pcm_trigger,
  676. .pointer = davinci_pcm_pointer,
  677. .mmap = davinci_pcm_mmap,
  678. };
  679. static int davinci_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
  680. size_t size)
  681. {
  682. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  683. struct snd_dma_buffer *buf = &substream->dma_buffer;
  684. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  685. buf->dev.dev = pcm->card->dev;
  686. buf->private_data = NULL;
  687. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  688. &buf->addr, GFP_KERNEL);
  689. pr_debug("davinci_pcm: preallocate_dma_buffer: area=%p, addr=%p, "
  690. "size=%d\n", (void *) buf->area, (void *) buf->addr, size);
  691. if (!buf->area)
  692. return -ENOMEM;
  693. buf->bytes = size;
  694. return 0;
  695. }
  696. static void davinci_pcm_free(struct snd_pcm *pcm)
  697. {
  698. struct snd_pcm_substream *substream;
  699. struct snd_dma_buffer *buf;
  700. int stream;
  701. for (stream = 0; stream < 2; stream++) {
  702. struct snd_dma_buffer *iram_dma;
  703. substream = pcm->streams[stream].substream;
  704. if (!substream)
  705. continue;
  706. buf = &substream->dma_buffer;
  707. if (!buf->area)
  708. continue;
  709. dma_free_writecombine(pcm->card->dev, buf->bytes,
  710. buf->area, buf->addr);
  711. buf->area = NULL;
  712. iram_dma = buf->private_data;
  713. if (iram_dma) {
  714. sram_free(iram_dma->area, iram_dma->bytes);
  715. kfree(iram_dma);
  716. }
  717. }
  718. }
  719. static u64 davinci_pcm_dmamask = 0xffffffff;
  720. static int davinci_pcm_new(struct snd_card *card,
  721. struct snd_soc_dai *dai, struct snd_pcm *pcm)
  722. {
  723. int ret;
  724. if (!card->dev->dma_mask)
  725. card->dev->dma_mask = &davinci_pcm_dmamask;
  726. if (!card->dev->coherent_dma_mask)
  727. card->dev->coherent_dma_mask = 0xffffffff;
  728. if (dai->driver->playback.channels_min) {
  729. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  730. SNDRV_PCM_STREAM_PLAYBACK,
  731. pcm_hardware_playback.buffer_bytes_max);
  732. if (ret)
  733. return ret;
  734. }
  735. if (dai->driver->capture.channels_min) {
  736. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  737. SNDRV_PCM_STREAM_CAPTURE,
  738. pcm_hardware_capture.buffer_bytes_max);
  739. if (ret)
  740. return ret;
  741. }
  742. return 0;
  743. }
  744. static struct snd_soc_platform_driver davinci_soc_platform = {
  745. .ops = &davinci_pcm_ops,
  746. .pcm_new = davinci_pcm_new,
  747. .pcm_free = davinci_pcm_free,
  748. };
  749. static int __devinit davinci_soc_platform_probe(struct platform_device *pdev)
  750. {
  751. return snd_soc_register_platform(&pdev->dev, &davinci_soc_platform);
  752. }
  753. static int __devexit davinci_soc_platform_remove(struct platform_device *pdev)
  754. {
  755. snd_soc_unregister_platform(&pdev->dev);
  756. return 0;
  757. }
  758. static struct platform_driver davinci_pcm_driver = {
  759. .driver = {
  760. .name = "davinci-pcm-audio",
  761. .owner = THIS_MODULE,
  762. },
  763. .probe = davinci_soc_platform_probe,
  764. .remove = __devexit_p(davinci_soc_platform_remove),
  765. };
  766. static int __init snd_davinci_pcm_init(void)
  767. {
  768. return platform_driver_register(&davinci_pcm_driver);
  769. }
  770. module_init(snd_davinci_pcm_init);
  771. static void __exit snd_davinci_pcm_exit(void)
  772. {
  773. platform_driver_unregister(&davinci_pcm_driver);
  774. }
  775. module_exit(snd_davinci_pcm_exit);
  776. MODULE_AUTHOR("Vladimir Barinov");
  777. MODULE_DESCRIPTION("TI DAVINCI PCM DMA module");
  778. MODULE_LICENSE("GPL");