qdio_main.c 41 KB

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  1. /*
  2. * linux/drivers/s390/cio/qdio_main.c
  3. *
  4. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  5. *
  6. * Copyright 2000,2008 IBM Corp.
  7. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  8. * Jan Glauber <jang@linux.vnet.ibm.com>
  9. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/timer.h>
  15. #include <linux/delay.h>
  16. #include <linux/gfp.h>
  17. #include <linux/kernel_stat.h>
  18. #include <asm/atomic.h>
  19. #include <asm/debug.h>
  20. #include <asm/qdio.h>
  21. #include "cio.h"
  22. #include "css.h"
  23. #include "device.h"
  24. #include "qdio.h"
  25. #include "qdio_debug.h"
  26. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  27. "Jan Glauber <jang@linux.vnet.ibm.com>");
  28. MODULE_DESCRIPTION("QDIO base support");
  29. MODULE_LICENSE("GPL");
  30. static inline int do_siga_sync(unsigned long schid,
  31. unsigned int out_mask, unsigned int in_mask,
  32. unsigned int fc)
  33. {
  34. register unsigned long __fc asm ("0") = fc;
  35. register unsigned long __schid asm ("1") = schid;
  36. register unsigned long out asm ("2") = out_mask;
  37. register unsigned long in asm ("3") = in_mask;
  38. int cc;
  39. asm volatile(
  40. " siga 0\n"
  41. " ipm %0\n"
  42. " srl %0,28\n"
  43. : "=d" (cc)
  44. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  45. return cc;
  46. }
  47. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  48. unsigned int fc)
  49. {
  50. register unsigned long __fc asm ("0") = fc;
  51. register unsigned long __schid asm ("1") = schid;
  52. register unsigned long __mask asm ("2") = mask;
  53. int cc;
  54. asm volatile(
  55. " siga 0\n"
  56. " ipm %0\n"
  57. " srl %0,28\n"
  58. : "=d" (cc)
  59. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
  60. return cc;
  61. }
  62. /**
  63. * do_siga_output - perform SIGA-w/wt function
  64. * @schid: subchannel id or in case of QEBSM the subchannel token
  65. * @mask: which output queues to process
  66. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  67. * @fc: function code to perform
  68. *
  69. * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
  70. * Note: For IQDC unicast queues only the highest priority queue is processed.
  71. */
  72. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  73. unsigned int *bb, unsigned int fc)
  74. {
  75. register unsigned long __fc asm("0") = fc;
  76. register unsigned long __schid asm("1") = schid;
  77. register unsigned long __mask asm("2") = mask;
  78. int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
  79. asm volatile(
  80. " siga 0\n"
  81. "0: ipm %0\n"
  82. " srl %0,28\n"
  83. "1:\n"
  84. EX_TABLE(0b, 1b)
  85. : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
  86. : : "cc", "memory");
  87. *bb = ((unsigned int) __fc) >> 31;
  88. return cc;
  89. }
  90. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  91. {
  92. /* all done or next buffer state different */
  93. if (ccq == 0 || ccq == 32)
  94. return 0;
  95. /* not all buffers processed */
  96. if (ccq == 96 || ccq == 97)
  97. return 1;
  98. /* notify devices immediately */
  99. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  100. return -EIO;
  101. }
  102. /**
  103. * qdio_do_eqbs - extract buffer states for QEBSM
  104. * @q: queue to manipulate
  105. * @state: state of the extracted buffers
  106. * @start: buffer number to start at
  107. * @count: count of buffers to examine
  108. * @auto_ack: automatically acknowledge buffers
  109. *
  110. * Returns the number of successfully extracted equal buffer states.
  111. * Stops processing if a state is different from the last buffers state.
  112. */
  113. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  114. int start, int count, int auto_ack)
  115. {
  116. unsigned int ccq = 0;
  117. int tmp_count = count, tmp_start = start;
  118. int nr = q->nr;
  119. int rc;
  120. BUG_ON(!q->irq_ptr->sch_token);
  121. qperf_inc(q, eqbs);
  122. if (!q->is_input_q)
  123. nr += q->irq_ptr->nr_input_qs;
  124. again:
  125. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  126. auto_ack);
  127. rc = qdio_check_ccq(q, ccq);
  128. /* At least one buffer was processed, return and extract the remaining
  129. * buffers later.
  130. */
  131. if ((ccq == 96) && (count != tmp_count)) {
  132. qperf_inc(q, eqbs_partial);
  133. return (count - tmp_count);
  134. }
  135. if (rc == 1) {
  136. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  137. goto again;
  138. }
  139. if (rc < 0) {
  140. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  141. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  142. q->handler(q->irq_ptr->cdev,
  143. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  144. 0, -1, -1, q->irq_ptr->int_parm);
  145. return 0;
  146. }
  147. return count - tmp_count;
  148. }
  149. /**
  150. * qdio_do_sqbs - set buffer states for QEBSM
  151. * @q: queue to manipulate
  152. * @state: new state of the buffers
  153. * @start: first buffer number to change
  154. * @count: how many buffers to change
  155. *
  156. * Returns the number of successfully changed buffers.
  157. * Does retrying until the specified count of buffer states is set or an
  158. * error occurs.
  159. */
  160. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  161. int count)
  162. {
  163. unsigned int ccq = 0;
  164. int tmp_count = count, tmp_start = start;
  165. int nr = q->nr;
  166. int rc;
  167. if (!count)
  168. return 0;
  169. BUG_ON(!q->irq_ptr->sch_token);
  170. qperf_inc(q, sqbs);
  171. if (!q->is_input_q)
  172. nr += q->irq_ptr->nr_input_qs;
  173. again:
  174. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  175. rc = qdio_check_ccq(q, ccq);
  176. if (rc == 1) {
  177. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  178. qperf_inc(q, sqbs_partial);
  179. goto again;
  180. }
  181. if (rc < 0) {
  182. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  183. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  184. q->handler(q->irq_ptr->cdev,
  185. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  186. 0, -1, -1, q->irq_ptr->int_parm);
  187. return 0;
  188. }
  189. WARN_ON(tmp_count);
  190. return count - tmp_count;
  191. }
  192. /* returns number of examined buffers and their common state in *state */
  193. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  194. unsigned char *state, unsigned int count,
  195. int auto_ack)
  196. {
  197. unsigned char __state = 0;
  198. int i;
  199. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  200. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  201. if (is_qebsm(q))
  202. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  203. for (i = 0; i < count; i++) {
  204. if (!__state)
  205. __state = q->slsb.val[bufnr];
  206. else if (q->slsb.val[bufnr] != __state)
  207. break;
  208. bufnr = next_buf(bufnr);
  209. }
  210. *state = __state;
  211. return i;
  212. }
  213. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  214. unsigned char *state, int auto_ack)
  215. {
  216. return get_buf_states(q, bufnr, state, 1, auto_ack);
  217. }
  218. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  219. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  220. unsigned char state, int count)
  221. {
  222. int i;
  223. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  224. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  225. if (is_qebsm(q))
  226. return qdio_do_sqbs(q, state, bufnr, count);
  227. for (i = 0; i < count; i++) {
  228. xchg(&q->slsb.val[bufnr], state);
  229. bufnr = next_buf(bufnr);
  230. }
  231. return count;
  232. }
  233. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  234. unsigned char state)
  235. {
  236. return set_buf_states(q, bufnr, state, 1);
  237. }
  238. /* set slsb states to initial state */
  239. void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  240. {
  241. struct qdio_q *q;
  242. int i;
  243. for_each_input_queue(irq_ptr, q, i)
  244. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  245. QDIO_MAX_BUFFERS_PER_Q);
  246. for_each_output_queue(irq_ptr, q, i)
  247. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  248. QDIO_MAX_BUFFERS_PER_Q);
  249. }
  250. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  251. unsigned int input)
  252. {
  253. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  254. unsigned int fc = QDIO_SIGA_SYNC;
  255. int cc;
  256. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  257. qperf_inc(q, siga_sync);
  258. if (is_qebsm(q)) {
  259. schid = q->irq_ptr->sch_token;
  260. fc |= QDIO_SIGA_QEBSM_FLAG;
  261. }
  262. cc = do_siga_sync(schid, output, input, fc);
  263. if (unlikely(cc))
  264. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  265. return cc;
  266. }
  267. static inline int qdio_siga_sync_q(struct qdio_q *q)
  268. {
  269. if (q->is_input_q)
  270. return qdio_siga_sync(q, 0, q->mask);
  271. else
  272. return qdio_siga_sync(q, q->mask, 0);
  273. }
  274. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit)
  275. {
  276. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  277. unsigned int fc = QDIO_SIGA_WRITE;
  278. u64 start_time = 0;
  279. int cc;
  280. if (is_qebsm(q)) {
  281. schid = q->irq_ptr->sch_token;
  282. fc |= QDIO_SIGA_QEBSM_FLAG;
  283. }
  284. again:
  285. cc = do_siga_output(schid, q->mask, busy_bit, fc);
  286. /* hipersocket busy condition */
  287. if (unlikely(*busy_bit)) {
  288. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  289. if (!start_time) {
  290. start_time = get_clock();
  291. goto again;
  292. }
  293. if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  294. goto again;
  295. }
  296. return cc;
  297. }
  298. static inline int qdio_siga_input(struct qdio_q *q)
  299. {
  300. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  301. unsigned int fc = QDIO_SIGA_READ;
  302. int cc;
  303. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  304. qperf_inc(q, siga_read);
  305. if (is_qebsm(q)) {
  306. schid = q->irq_ptr->sch_token;
  307. fc |= QDIO_SIGA_QEBSM_FLAG;
  308. }
  309. cc = do_siga_input(schid, q->mask, fc);
  310. if (unlikely(cc))
  311. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  312. return cc;
  313. }
  314. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  315. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  316. static inline void qdio_sync_queues(struct qdio_q *q)
  317. {
  318. /* PCI capable outbound queues will also be scanned so sync them too */
  319. if (pci_out_supported(q))
  320. qdio_siga_sync_all(q);
  321. else
  322. qdio_siga_sync_q(q);
  323. }
  324. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  325. unsigned char *state)
  326. {
  327. if (need_siga_sync(q))
  328. qdio_siga_sync_q(q);
  329. return get_buf_states(q, bufnr, state, 1, 0);
  330. }
  331. static inline void qdio_stop_polling(struct qdio_q *q)
  332. {
  333. if (!q->u.in.polling)
  334. return;
  335. q->u.in.polling = 0;
  336. qperf_inc(q, stop_polling);
  337. /* show the card that we are not polling anymore */
  338. if (is_qebsm(q)) {
  339. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  340. q->u.in.ack_count);
  341. q->u.in.ack_count = 0;
  342. } else
  343. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  344. }
  345. static inline void account_sbals(struct qdio_q *q, int count)
  346. {
  347. int pos = 0;
  348. q->q_stats.nr_sbal_total += count;
  349. if (count == QDIO_MAX_BUFFERS_MASK) {
  350. q->q_stats.nr_sbals[7]++;
  351. return;
  352. }
  353. while (count >>= 1)
  354. pos++;
  355. q->q_stats.nr_sbals[pos]++;
  356. }
  357. static void process_buffer_error(struct qdio_q *q, int count)
  358. {
  359. unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
  360. SLSB_P_OUTPUT_NOT_INIT;
  361. q->qdio_error |= QDIO_ERROR_SLSB_STATE;
  362. /* special handling for no target buffer empty */
  363. if ((!q->is_input_q &&
  364. (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
  365. qperf_inc(q, target_full);
  366. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  367. q->first_to_check);
  368. return;
  369. }
  370. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  371. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  372. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  373. DBF_ERROR("F14:%2x F15:%2x",
  374. q->sbal[q->first_to_check]->element[14].sflags,
  375. q->sbal[q->first_to_check]->element[15].sflags);
  376. /*
  377. * Interrupts may be avoided as long as the error is present
  378. * so change the buffer state immediately to avoid starvation.
  379. */
  380. set_buf_states(q, q->first_to_check, state, count);
  381. }
  382. static inline void inbound_primed(struct qdio_q *q, int count)
  383. {
  384. int new;
  385. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  386. /* for QEBSM the ACK was already set by EQBS */
  387. if (is_qebsm(q)) {
  388. if (!q->u.in.polling) {
  389. q->u.in.polling = 1;
  390. q->u.in.ack_count = count;
  391. q->u.in.ack_start = q->first_to_check;
  392. return;
  393. }
  394. /* delete the previous ACK's */
  395. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  396. q->u.in.ack_count);
  397. q->u.in.ack_count = count;
  398. q->u.in.ack_start = q->first_to_check;
  399. return;
  400. }
  401. /*
  402. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  403. * or by the next inbound run.
  404. */
  405. new = add_buf(q->first_to_check, count - 1);
  406. if (q->u.in.polling) {
  407. /* reset the previous ACK but first set the new one */
  408. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  409. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  410. } else {
  411. q->u.in.polling = 1;
  412. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  413. }
  414. q->u.in.ack_start = new;
  415. count--;
  416. if (!count)
  417. return;
  418. /* need to change ALL buffers to get more interrupts */
  419. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  420. }
  421. static int get_inbound_buffer_frontier(struct qdio_q *q)
  422. {
  423. int count, stop;
  424. unsigned char state = 0;
  425. /*
  426. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  427. * would return 0.
  428. */
  429. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  430. stop = add_buf(q->first_to_check, count);
  431. if (q->first_to_check == stop)
  432. goto out;
  433. /*
  434. * No siga sync here, as a PCI or we after a thin interrupt
  435. * already sync'ed the queues.
  436. */
  437. count = get_buf_states(q, q->first_to_check, &state, count, 1);
  438. if (!count)
  439. goto out;
  440. switch (state) {
  441. case SLSB_P_INPUT_PRIMED:
  442. inbound_primed(q, count);
  443. q->first_to_check = add_buf(q->first_to_check, count);
  444. if (atomic_sub(count, &q->nr_buf_used) == 0)
  445. qperf_inc(q, inbound_queue_full);
  446. if (q->irq_ptr->perf_stat_enabled)
  447. account_sbals(q, count);
  448. break;
  449. case SLSB_P_INPUT_ERROR:
  450. process_buffer_error(q, count);
  451. q->first_to_check = add_buf(q->first_to_check, count);
  452. atomic_sub(count, &q->nr_buf_used);
  453. if (q->irq_ptr->perf_stat_enabled)
  454. account_sbals_error(q, count);
  455. break;
  456. case SLSB_CU_INPUT_EMPTY:
  457. case SLSB_P_INPUT_NOT_INIT:
  458. case SLSB_P_INPUT_ACK:
  459. if (q->irq_ptr->perf_stat_enabled)
  460. q->q_stats.nr_sbal_nop++;
  461. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  462. break;
  463. default:
  464. BUG();
  465. }
  466. out:
  467. return q->first_to_check;
  468. }
  469. static int qdio_inbound_q_moved(struct qdio_q *q)
  470. {
  471. int bufnr;
  472. bufnr = get_inbound_buffer_frontier(q);
  473. if ((bufnr != q->last_move) || q->qdio_error) {
  474. q->last_move = bufnr;
  475. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  476. q->u.in.timestamp = get_clock();
  477. return 1;
  478. } else
  479. return 0;
  480. }
  481. static inline int qdio_inbound_q_done(struct qdio_q *q)
  482. {
  483. unsigned char state = 0;
  484. if (!atomic_read(&q->nr_buf_used))
  485. return 1;
  486. if (need_siga_sync(q))
  487. qdio_siga_sync_q(q);
  488. get_buf_state(q, q->first_to_check, &state, 0);
  489. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  490. /* more work coming */
  491. return 0;
  492. if (is_thinint_irq(q->irq_ptr))
  493. return 1;
  494. /* don't poll under z/VM */
  495. if (MACHINE_IS_VM)
  496. return 1;
  497. /*
  498. * At this point we know, that inbound first_to_check
  499. * has (probably) not moved (see qdio_inbound_processing).
  500. */
  501. if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  502. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  503. q->first_to_check);
  504. return 1;
  505. } else
  506. return 0;
  507. }
  508. static void qdio_kick_handler(struct qdio_q *q)
  509. {
  510. int start = q->first_to_kick;
  511. int end = q->first_to_check;
  512. int count;
  513. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  514. return;
  515. count = sub_buf(end, start);
  516. if (q->is_input_q) {
  517. qperf_inc(q, inbound_handler);
  518. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  519. } else {
  520. qperf_inc(q, outbound_handler);
  521. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  522. start, count);
  523. }
  524. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  525. q->irq_ptr->int_parm);
  526. /* for the next time */
  527. q->first_to_kick = end;
  528. q->qdio_error = 0;
  529. }
  530. static void __qdio_inbound_processing(struct qdio_q *q)
  531. {
  532. qperf_inc(q, tasklet_inbound);
  533. if (!qdio_inbound_q_moved(q))
  534. return;
  535. qdio_kick_handler(q);
  536. if (!qdio_inbound_q_done(q)) {
  537. /* means poll time is not yet over */
  538. qperf_inc(q, tasklet_inbound_resched);
  539. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  540. tasklet_schedule(&q->tasklet);
  541. return;
  542. }
  543. }
  544. qdio_stop_polling(q);
  545. /*
  546. * We need to check again to not lose initiative after
  547. * resetting the ACK state.
  548. */
  549. if (!qdio_inbound_q_done(q)) {
  550. qperf_inc(q, tasklet_inbound_resched2);
  551. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  552. tasklet_schedule(&q->tasklet);
  553. }
  554. }
  555. void qdio_inbound_processing(unsigned long data)
  556. {
  557. struct qdio_q *q = (struct qdio_q *)data;
  558. __qdio_inbound_processing(q);
  559. }
  560. static int get_outbound_buffer_frontier(struct qdio_q *q)
  561. {
  562. int count, stop;
  563. unsigned char state = 0;
  564. if (need_siga_sync(q))
  565. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  566. !pci_out_supported(q)) ||
  567. (queue_type(q) == QDIO_IQDIO_QFMT &&
  568. multicast_outbound(q)))
  569. qdio_siga_sync_q(q);
  570. /*
  571. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  572. * would return 0.
  573. */
  574. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  575. stop = add_buf(q->first_to_check, count);
  576. if (q->first_to_check == stop)
  577. return q->first_to_check;
  578. count = get_buf_states(q, q->first_to_check, &state, count, 0);
  579. if (!count)
  580. return q->first_to_check;
  581. switch (state) {
  582. case SLSB_P_OUTPUT_EMPTY:
  583. /* the adapter got it */
  584. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out empty:%1d %02x", q->nr, count);
  585. atomic_sub(count, &q->nr_buf_used);
  586. q->first_to_check = add_buf(q->first_to_check, count);
  587. if (q->irq_ptr->perf_stat_enabled)
  588. account_sbals(q, count);
  589. break;
  590. case SLSB_P_OUTPUT_ERROR:
  591. process_buffer_error(q, count);
  592. q->first_to_check = add_buf(q->first_to_check, count);
  593. atomic_sub(count, &q->nr_buf_used);
  594. if (q->irq_ptr->perf_stat_enabled)
  595. account_sbals_error(q, count);
  596. break;
  597. case SLSB_CU_OUTPUT_PRIMED:
  598. /* the adapter has not fetched the output yet */
  599. if (q->irq_ptr->perf_stat_enabled)
  600. q->q_stats.nr_sbal_nop++;
  601. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", q->nr);
  602. break;
  603. case SLSB_P_OUTPUT_NOT_INIT:
  604. case SLSB_P_OUTPUT_HALTED:
  605. break;
  606. default:
  607. BUG();
  608. }
  609. return q->first_to_check;
  610. }
  611. /* all buffers processed? */
  612. static inline int qdio_outbound_q_done(struct qdio_q *q)
  613. {
  614. return atomic_read(&q->nr_buf_used) == 0;
  615. }
  616. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  617. {
  618. int bufnr;
  619. bufnr = get_outbound_buffer_frontier(q);
  620. if ((bufnr != q->last_move) || q->qdio_error) {
  621. q->last_move = bufnr;
  622. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  623. return 1;
  624. } else
  625. return 0;
  626. }
  627. static int qdio_kick_outbound_q(struct qdio_q *q)
  628. {
  629. unsigned int busy_bit;
  630. int cc;
  631. if (!need_siga_out(q))
  632. return 0;
  633. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  634. qperf_inc(q, siga_write);
  635. cc = qdio_siga_output(q, &busy_bit);
  636. switch (cc) {
  637. case 0:
  638. break;
  639. case 2:
  640. if (busy_bit) {
  641. DBF_ERROR("%4x cc2 REP:%1d", SCH_NO(q), q->nr);
  642. cc |= QDIO_ERROR_SIGA_BUSY;
  643. } else
  644. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  645. break;
  646. case 1:
  647. case 3:
  648. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  649. break;
  650. }
  651. return cc;
  652. }
  653. static void __qdio_outbound_processing(struct qdio_q *q)
  654. {
  655. qperf_inc(q, tasklet_outbound);
  656. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  657. if (qdio_outbound_q_moved(q))
  658. qdio_kick_handler(q);
  659. if (queue_type(q) == QDIO_ZFCP_QFMT)
  660. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  661. goto sched;
  662. /* bail out for HiperSockets unicast queues */
  663. if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q))
  664. return;
  665. if ((queue_type(q) == QDIO_IQDIO_QFMT) &&
  666. (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL)
  667. goto sched;
  668. if (q->u.out.pci_out_enabled)
  669. return;
  670. /*
  671. * Now we know that queue type is either qeth without pci enabled
  672. * or HiperSockets multicast. Make sure buffer switch from PRIMED to
  673. * EMPTY is noticed and outbound_handler is called after some time.
  674. */
  675. if (qdio_outbound_q_done(q))
  676. del_timer(&q->u.out.timer);
  677. else
  678. if (!timer_pending(&q->u.out.timer))
  679. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  680. return;
  681. sched:
  682. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  683. return;
  684. tasklet_schedule(&q->tasklet);
  685. }
  686. /* outbound tasklet */
  687. void qdio_outbound_processing(unsigned long data)
  688. {
  689. struct qdio_q *q = (struct qdio_q *)data;
  690. __qdio_outbound_processing(q);
  691. }
  692. void qdio_outbound_timer(unsigned long data)
  693. {
  694. struct qdio_q *q = (struct qdio_q *)data;
  695. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  696. return;
  697. tasklet_schedule(&q->tasklet);
  698. }
  699. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  700. {
  701. struct qdio_q *out;
  702. int i;
  703. if (!pci_out_supported(q))
  704. return;
  705. for_each_output_queue(q->irq_ptr, out, i)
  706. if (!qdio_outbound_q_done(out))
  707. tasklet_schedule(&out->tasklet);
  708. }
  709. static void __tiqdio_inbound_processing(struct qdio_q *q)
  710. {
  711. qperf_inc(q, tasklet_inbound);
  712. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  713. qdio_sync_queues(q);
  714. /*
  715. * The interrupt could be caused by a PCI request. Check the
  716. * PCI capable outbound queues.
  717. */
  718. qdio_check_outbound_after_thinint(q);
  719. if (!qdio_inbound_q_moved(q))
  720. return;
  721. qdio_kick_handler(q);
  722. if (!qdio_inbound_q_done(q)) {
  723. qperf_inc(q, tasklet_inbound_resched);
  724. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  725. tasklet_schedule(&q->tasklet);
  726. return;
  727. }
  728. }
  729. qdio_stop_polling(q);
  730. /*
  731. * We need to check again to not lose initiative after
  732. * resetting the ACK state.
  733. */
  734. if (!qdio_inbound_q_done(q)) {
  735. qperf_inc(q, tasklet_inbound_resched2);
  736. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  737. tasklet_schedule(&q->tasklet);
  738. }
  739. }
  740. void tiqdio_inbound_processing(unsigned long data)
  741. {
  742. struct qdio_q *q = (struct qdio_q *)data;
  743. __tiqdio_inbound_processing(q);
  744. }
  745. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  746. enum qdio_irq_states state)
  747. {
  748. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  749. irq_ptr->state = state;
  750. mb();
  751. }
  752. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  753. {
  754. if (irb->esw.esw0.erw.cons) {
  755. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  756. DBF_ERROR_HEX(irb, 64);
  757. DBF_ERROR_HEX(irb->ecw, 64);
  758. }
  759. }
  760. /* PCI interrupt handler */
  761. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  762. {
  763. int i;
  764. struct qdio_q *q;
  765. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  766. return;
  767. for_each_input_queue(irq_ptr, q, i) {
  768. if (q->u.in.queue_start_poll) {
  769. /* skip if polling is enabled or already in work */
  770. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  771. &q->u.in.queue_irq_state)) {
  772. qperf_inc(q, int_discarded);
  773. continue;
  774. }
  775. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  776. q->irq_ptr->int_parm);
  777. } else
  778. tasklet_schedule(&q->tasklet);
  779. }
  780. if (!pci_out_supported(q))
  781. return;
  782. for_each_output_queue(irq_ptr, q, i) {
  783. if (qdio_outbound_q_done(q))
  784. continue;
  785. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  786. qdio_siga_sync_q(q);
  787. tasklet_schedule(&q->tasklet);
  788. }
  789. }
  790. static void qdio_handle_activate_check(struct ccw_device *cdev,
  791. unsigned long intparm, int cstat, int dstat)
  792. {
  793. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  794. struct qdio_q *q;
  795. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  796. DBF_ERROR("intp :%lx", intparm);
  797. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  798. if (irq_ptr->nr_input_qs) {
  799. q = irq_ptr->input_qs[0];
  800. } else if (irq_ptr->nr_output_qs) {
  801. q = irq_ptr->output_qs[0];
  802. } else {
  803. dump_stack();
  804. goto no_handler;
  805. }
  806. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  807. 0, -1, -1, irq_ptr->int_parm);
  808. no_handler:
  809. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  810. }
  811. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  812. int dstat)
  813. {
  814. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  815. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  816. if (cstat)
  817. goto error;
  818. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  819. goto error;
  820. if (!(dstat & DEV_STAT_DEV_END))
  821. goto error;
  822. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  823. return;
  824. error:
  825. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  826. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  827. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  828. }
  829. /* qdio interrupt handler */
  830. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  831. struct irb *irb)
  832. {
  833. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  834. int cstat, dstat;
  835. if (!intparm || !irq_ptr) {
  836. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  837. return;
  838. }
  839. kstat_cpu(smp_processor_id()).irqs[IOINT_QDI]++;
  840. if (irq_ptr->perf_stat_enabled)
  841. irq_ptr->perf_stat.qdio_int++;
  842. if (IS_ERR(irb)) {
  843. switch (PTR_ERR(irb)) {
  844. case -EIO:
  845. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  846. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  847. wake_up(&cdev->private->wait_q);
  848. return;
  849. default:
  850. WARN_ON(1);
  851. return;
  852. }
  853. }
  854. qdio_irq_check_sense(irq_ptr, irb);
  855. cstat = irb->scsw.cmd.cstat;
  856. dstat = irb->scsw.cmd.dstat;
  857. switch (irq_ptr->state) {
  858. case QDIO_IRQ_STATE_INACTIVE:
  859. qdio_establish_handle_irq(cdev, cstat, dstat);
  860. break;
  861. case QDIO_IRQ_STATE_CLEANUP:
  862. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  863. break;
  864. case QDIO_IRQ_STATE_ESTABLISHED:
  865. case QDIO_IRQ_STATE_ACTIVE:
  866. if (cstat & SCHN_STAT_PCI) {
  867. qdio_int_handler_pci(irq_ptr);
  868. return;
  869. }
  870. if (cstat || dstat)
  871. qdio_handle_activate_check(cdev, intparm, cstat,
  872. dstat);
  873. break;
  874. case QDIO_IRQ_STATE_STOPPED:
  875. break;
  876. default:
  877. WARN_ON(1);
  878. }
  879. wake_up(&cdev->private->wait_q);
  880. }
  881. /**
  882. * qdio_get_ssqd_desc - get qdio subchannel description
  883. * @cdev: ccw device to get description for
  884. * @data: where to store the ssqd
  885. *
  886. * Returns 0 or an error code. The results of the chsc are stored in the
  887. * specified structure.
  888. */
  889. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  890. struct qdio_ssqd_desc *data)
  891. {
  892. if (!cdev || !cdev->private)
  893. return -EINVAL;
  894. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  895. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  896. }
  897. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  898. static void qdio_shutdown_queues(struct ccw_device *cdev)
  899. {
  900. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  901. struct qdio_q *q;
  902. int i;
  903. for_each_input_queue(irq_ptr, q, i)
  904. tasklet_kill(&q->tasklet);
  905. for_each_output_queue(irq_ptr, q, i) {
  906. del_timer(&q->u.out.timer);
  907. tasklet_kill(&q->tasklet);
  908. }
  909. }
  910. /**
  911. * qdio_shutdown - shut down a qdio subchannel
  912. * @cdev: associated ccw device
  913. * @how: use halt or clear to shutdown
  914. */
  915. int qdio_shutdown(struct ccw_device *cdev, int how)
  916. {
  917. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  918. int rc;
  919. unsigned long flags;
  920. if (!irq_ptr)
  921. return -ENODEV;
  922. BUG_ON(irqs_disabled());
  923. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  924. mutex_lock(&irq_ptr->setup_mutex);
  925. /*
  926. * Subchannel was already shot down. We cannot prevent being called
  927. * twice since cio may trigger a shutdown asynchronously.
  928. */
  929. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  930. mutex_unlock(&irq_ptr->setup_mutex);
  931. return 0;
  932. }
  933. /*
  934. * Indicate that the device is going down. Scheduling the queue
  935. * tasklets is forbidden from here on.
  936. */
  937. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  938. tiqdio_remove_input_queues(irq_ptr);
  939. qdio_shutdown_queues(cdev);
  940. qdio_shutdown_debug_entries(irq_ptr, cdev);
  941. /* cleanup subchannel */
  942. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  943. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  944. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  945. else
  946. /* default behaviour is halt */
  947. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  948. if (rc) {
  949. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  950. DBF_ERROR("rc:%4d", rc);
  951. goto no_cleanup;
  952. }
  953. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  954. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  955. wait_event_interruptible_timeout(cdev->private->wait_q,
  956. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  957. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  958. 10 * HZ);
  959. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  960. no_cleanup:
  961. qdio_shutdown_thinint(irq_ptr);
  962. /* restore interrupt handler */
  963. if ((void *)cdev->handler == (void *)qdio_int_handler)
  964. cdev->handler = irq_ptr->orig_handler;
  965. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  966. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  967. mutex_unlock(&irq_ptr->setup_mutex);
  968. if (rc)
  969. return rc;
  970. return 0;
  971. }
  972. EXPORT_SYMBOL_GPL(qdio_shutdown);
  973. /**
  974. * qdio_free - free data structures for a qdio subchannel
  975. * @cdev: associated ccw device
  976. */
  977. int qdio_free(struct ccw_device *cdev)
  978. {
  979. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  980. if (!irq_ptr)
  981. return -ENODEV;
  982. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  983. mutex_lock(&irq_ptr->setup_mutex);
  984. if (irq_ptr->debug_area != NULL) {
  985. debug_unregister(irq_ptr->debug_area);
  986. irq_ptr->debug_area = NULL;
  987. }
  988. cdev->private->qdio_data = NULL;
  989. mutex_unlock(&irq_ptr->setup_mutex);
  990. qdio_release_memory(irq_ptr);
  991. return 0;
  992. }
  993. EXPORT_SYMBOL_GPL(qdio_free);
  994. /**
  995. * qdio_allocate - allocate qdio queues and associated data
  996. * @init_data: initialization data
  997. */
  998. int qdio_allocate(struct qdio_initialize *init_data)
  999. {
  1000. struct qdio_irq *irq_ptr;
  1001. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  1002. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1003. (init_data->no_output_qs && !init_data->output_handler))
  1004. return -EINVAL;
  1005. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1006. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1007. return -EINVAL;
  1008. if ((!init_data->input_sbal_addr_array) ||
  1009. (!init_data->output_sbal_addr_array))
  1010. return -EINVAL;
  1011. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1012. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1013. if (!irq_ptr)
  1014. goto out_err;
  1015. mutex_init(&irq_ptr->setup_mutex);
  1016. qdio_allocate_dbf(init_data, irq_ptr);
  1017. /*
  1018. * Allocate a page for the chsc calls in qdio_establish.
  1019. * Must be pre-allocated since a zfcp recovery will call
  1020. * qdio_establish. In case of low memory and swap on a zfcp disk
  1021. * we may not be able to allocate memory otherwise.
  1022. */
  1023. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1024. if (!irq_ptr->chsc_page)
  1025. goto out_rel;
  1026. /* qdr is used in ccw1.cda which is u32 */
  1027. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1028. if (!irq_ptr->qdr)
  1029. goto out_rel;
  1030. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1031. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1032. init_data->no_output_qs))
  1033. goto out_rel;
  1034. init_data->cdev->private->qdio_data = irq_ptr;
  1035. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1036. return 0;
  1037. out_rel:
  1038. qdio_release_memory(irq_ptr);
  1039. out_err:
  1040. return -ENOMEM;
  1041. }
  1042. EXPORT_SYMBOL_GPL(qdio_allocate);
  1043. /**
  1044. * qdio_establish - establish queues on a qdio subchannel
  1045. * @init_data: initialization data
  1046. */
  1047. int qdio_establish(struct qdio_initialize *init_data)
  1048. {
  1049. struct qdio_irq *irq_ptr;
  1050. struct ccw_device *cdev = init_data->cdev;
  1051. unsigned long saveflags;
  1052. int rc;
  1053. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1054. irq_ptr = cdev->private->qdio_data;
  1055. if (!irq_ptr)
  1056. return -ENODEV;
  1057. if (cdev->private->state != DEV_STATE_ONLINE)
  1058. return -EINVAL;
  1059. mutex_lock(&irq_ptr->setup_mutex);
  1060. qdio_setup_irq(init_data);
  1061. rc = qdio_establish_thinint(irq_ptr);
  1062. if (rc) {
  1063. mutex_unlock(&irq_ptr->setup_mutex);
  1064. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1065. return rc;
  1066. }
  1067. /* establish q */
  1068. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1069. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1070. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1071. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1072. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1073. ccw_device_set_options_mask(cdev, 0);
  1074. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1075. if (rc) {
  1076. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1077. DBF_ERROR("rc:%4x", rc);
  1078. }
  1079. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1080. if (rc) {
  1081. mutex_unlock(&irq_ptr->setup_mutex);
  1082. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1083. return rc;
  1084. }
  1085. wait_event_interruptible_timeout(cdev->private->wait_q,
  1086. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1087. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1088. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1089. mutex_unlock(&irq_ptr->setup_mutex);
  1090. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1091. return -EIO;
  1092. }
  1093. qdio_setup_ssqd_info(irq_ptr);
  1094. DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
  1095. /* qebsm is now setup if available, initialize buffer states */
  1096. qdio_init_buf_states(irq_ptr);
  1097. mutex_unlock(&irq_ptr->setup_mutex);
  1098. qdio_print_subchannel_info(irq_ptr, cdev);
  1099. qdio_setup_debug_entries(irq_ptr, cdev);
  1100. return 0;
  1101. }
  1102. EXPORT_SYMBOL_GPL(qdio_establish);
  1103. /**
  1104. * qdio_activate - activate queues on a qdio subchannel
  1105. * @cdev: associated cdev
  1106. */
  1107. int qdio_activate(struct ccw_device *cdev)
  1108. {
  1109. struct qdio_irq *irq_ptr;
  1110. int rc;
  1111. unsigned long saveflags;
  1112. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1113. irq_ptr = cdev->private->qdio_data;
  1114. if (!irq_ptr)
  1115. return -ENODEV;
  1116. if (cdev->private->state != DEV_STATE_ONLINE)
  1117. return -EINVAL;
  1118. mutex_lock(&irq_ptr->setup_mutex);
  1119. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1120. rc = -EBUSY;
  1121. goto out;
  1122. }
  1123. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1124. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1125. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1126. irq_ptr->ccw.cda = 0;
  1127. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1128. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1129. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1130. 0, DOIO_DENY_PREFETCH);
  1131. if (rc) {
  1132. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1133. DBF_ERROR("rc:%4x", rc);
  1134. }
  1135. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1136. if (rc)
  1137. goto out;
  1138. if (is_thinint_irq(irq_ptr))
  1139. tiqdio_add_input_queues(irq_ptr);
  1140. /* wait for subchannel to become active */
  1141. msleep(5);
  1142. switch (irq_ptr->state) {
  1143. case QDIO_IRQ_STATE_STOPPED:
  1144. case QDIO_IRQ_STATE_ERR:
  1145. rc = -EIO;
  1146. break;
  1147. default:
  1148. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1149. rc = 0;
  1150. }
  1151. out:
  1152. mutex_unlock(&irq_ptr->setup_mutex);
  1153. return rc;
  1154. }
  1155. EXPORT_SYMBOL_GPL(qdio_activate);
  1156. static inline int buf_in_between(int bufnr, int start, int count)
  1157. {
  1158. int end = add_buf(start, count);
  1159. if (end > start) {
  1160. if (bufnr >= start && bufnr < end)
  1161. return 1;
  1162. else
  1163. return 0;
  1164. }
  1165. /* wrap-around case */
  1166. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1167. (bufnr < end))
  1168. return 1;
  1169. else
  1170. return 0;
  1171. }
  1172. /**
  1173. * handle_inbound - reset processed input buffers
  1174. * @q: queue containing the buffers
  1175. * @callflags: flags
  1176. * @bufnr: first buffer to process
  1177. * @count: how many buffers are emptied
  1178. */
  1179. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1180. int bufnr, int count)
  1181. {
  1182. int used, diff;
  1183. qperf_inc(q, inbound_call);
  1184. if (!q->u.in.polling)
  1185. goto set;
  1186. /* protect against stop polling setting an ACK for an emptied slsb */
  1187. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1188. /* overwriting everything, just delete polling status */
  1189. q->u.in.polling = 0;
  1190. q->u.in.ack_count = 0;
  1191. goto set;
  1192. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1193. if (is_qebsm(q)) {
  1194. /* partial overwrite, just update ack_start */
  1195. diff = add_buf(bufnr, count);
  1196. diff = sub_buf(diff, q->u.in.ack_start);
  1197. q->u.in.ack_count -= diff;
  1198. if (q->u.in.ack_count <= 0) {
  1199. q->u.in.polling = 0;
  1200. q->u.in.ack_count = 0;
  1201. goto set;
  1202. }
  1203. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1204. }
  1205. else
  1206. /* the only ACK will be deleted, so stop polling */
  1207. q->u.in.polling = 0;
  1208. }
  1209. set:
  1210. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1211. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1212. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1213. /* no need to signal as long as the adapter had free buffers */
  1214. if (used)
  1215. return 0;
  1216. if (need_siga_in(q))
  1217. return qdio_siga_input(q);
  1218. return 0;
  1219. }
  1220. /**
  1221. * handle_outbound - process filled outbound buffers
  1222. * @q: queue containing the buffers
  1223. * @callflags: flags
  1224. * @bufnr: first buffer to process
  1225. * @count: how many buffers are filled
  1226. */
  1227. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1228. int bufnr, int count)
  1229. {
  1230. unsigned char state = 0;
  1231. int used, rc = 0;
  1232. qperf_inc(q, outbound_call);
  1233. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1234. used = atomic_add_return(count, &q->nr_buf_used);
  1235. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1236. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1237. qperf_inc(q, outbound_queue_full);
  1238. if (callflags & QDIO_FLAG_PCI_OUT) {
  1239. q->u.out.pci_out_enabled = 1;
  1240. qperf_inc(q, pci_request_int);
  1241. } else
  1242. q->u.out.pci_out_enabled = 0;
  1243. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1244. /* One SIGA-W per buffer required for unicast HiperSockets. */
  1245. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1246. rc = qdio_kick_outbound_q(q);
  1247. } else if (need_siga_sync(q)) {
  1248. rc = qdio_siga_sync_q(q);
  1249. } else {
  1250. /* try to fast requeue buffers */
  1251. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1252. if (state != SLSB_CU_OUTPUT_PRIMED)
  1253. rc = qdio_kick_outbound_q(q);
  1254. else
  1255. qperf_inc(q, fast_requeue);
  1256. }
  1257. /* in case of SIGA errors we must process the error immediately */
  1258. if (used >= q->u.out.scan_threshold || rc)
  1259. tasklet_schedule(&q->tasklet);
  1260. else
  1261. /* free the SBALs in case of no further traffic */
  1262. if (!timer_pending(&q->u.out.timer))
  1263. mod_timer(&q->u.out.timer, jiffies + HZ);
  1264. return rc;
  1265. }
  1266. /**
  1267. * do_QDIO - process input or output buffers
  1268. * @cdev: associated ccw_device for the qdio subchannel
  1269. * @callflags: input or output and special flags from the program
  1270. * @q_nr: queue number
  1271. * @bufnr: buffer number
  1272. * @count: how many buffers to process
  1273. */
  1274. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1275. int q_nr, unsigned int bufnr, unsigned int count)
  1276. {
  1277. struct qdio_irq *irq_ptr;
  1278. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1279. return -EINVAL;
  1280. irq_ptr = cdev->private->qdio_data;
  1281. if (!irq_ptr)
  1282. return -ENODEV;
  1283. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1284. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1285. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1286. return -EBUSY;
  1287. if (!count)
  1288. return 0;
  1289. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1290. return handle_inbound(irq_ptr->input_qs[q_nr],
  1291. callflags, bufnr, count);
  1292. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1293. return handle_outbound(irq_ptr->output_qs[q_nr],
  1294. callflags, bufnr, count);
  1295. return -EINVAL;
  1296. }
  1297. EXPORT_SYMBOL_GPL(do_QDIO);
  1298. /**
  1299. * qdio_start_irq - process input buffers
  1300. * @cdev: associated ccw_device for the qdio subchannel
  1301. * @nr: input queue number
  1302. *
  1303. * Return codes
  1304. * 0 - success
  1305. * 1 - irqs not started since new data is available
  1306. */
  1307. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1308. {
  1309. struct qdio_q *q;
  1310. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1311. if (!irq_ptr)
  1312. return -ENODEV;
  1313. q = irq_ptr->input_qs[nr];
  1314. WARN_ON(queue_irqs_enabled(q));
  1315. if (!shared_ind(q->irq_ptr->dsci))
  1316. xchg(q->irq_ptr->dsci, 0);
  1317. qdio_stop_polling(q);
  1318. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1319. /*
  1320. * We need to check again to not lose initiative after
  1321. * resetting the ACK state.
  1322. */
  1323. if (!shared_ind(q->irq_ptr->dsci) && *q->irq_ptr->dsci)
  1324. goto rescan;
  1325. if (!qdio_inbound_q_done(q))
  1326. goto rescan;
  1327. return 0;
  1328. rescan:
  1329. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1330. &q->u.in.queue_irq_state))
  1331. return 0;
  1332. else
  1333. return 1;
  1334. }
  1335. EXPORT_SYMBOL(qdio_start_irq);
  1336. /**
  1337. * qdio_get_next_buffers - process input buffers
  1338. * @cdev: associated ccw_device for the qdio subchannel
  1339. * @nr: input queue number
  1340. * @bufnr: first filled buffer number
  1341. * @error: buffers are in error state
  1342. *
  1343. * Return codes
  1344. * < 0 - error
  1345. * = 0 - no new buffers found
  1346. * > 0 - number of processed buffers
  1347. */
  1348. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1349. int *error)
  1350. {
  1351. struct qdio_q *q;
  1352. int start, end;
  1353. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1354. if (!irq_ptr)
  1355. return -ENODEV;
  1356. q = irq_ptr->input_qs[nr];
  1357. WARN_ON(queue_irqs_enabled(q));
  1358. /*
  1359. * Cannot rely on automatic sync after interrupt since queues may
  1360. * also be examined without interrupt.
  1361. */
  1362. if (need_siga_sync(q))
  1363. qdio_sync_queues(q);
  1364. /* check the PCI capable outbound queues. */
  1365. qdio_check_outbound_after_thinint(q);
  1366. if (!qdio_inbound_q_moved(q))
  1367. return 0;
  1368. /* Note: upper-layer MUST stop processing immediately here ... */
  1369. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1370. return -EIO;
  1371. start = q->first_to_kick;
  1372. end = q->first_to_check;
  1373. *bufnr = start;
  1374. *error = q->qdio_error;
  1375. /* for the next time */
  1376. q->first_to_kick = end;
  1377. q->qdio_error = 0;
  1378. return sub_buf(end, start);
  1379. }
  1380. EXPORT_SYMBOL(qdio_get_next_buffers);
  1381. /**
  1382. * qdio_stop_irq - disable interrupt processing for the device
  1383. * @cdev: associated ccw_device for the qdio subchannel
  1384. * @nr: input queue number
  1385. *
  1386. * Return codes
  1387. * 0 - interrupts were already disabled
  1388. * 1 - interrupts successfully disabled
  1389. */
  1390. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1391. {
  1392. struct qdio_q *q;
  1393. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1394. if (!irq_ptr)
  1395. return -ENODEV;
  1396. q = irq_ptr->input_qs[nr];
  1397. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1398. &q->u.in.queue_irq_state))
  1399. return 0;
  1400. else
  1401. return 1;
  1402. }
  1403. EXPORT_SYMBOL(qdio_stop_irq);
  1404. static int __init init_QDIO(void)
  1405. {
  1406. int rc;
  1407. rc = qdio_debug_init();
  1408. if (rc)
  1409. return rc;
  1410. rc = qdio_setup_init();
  1411. if (rc)
  1412. goto out_debug;
  1413. rc = tiqdio_allocate_memory();
  1414. if (rc)
  1415. goto out_cache;
  1416. rc = tiqdio_register_thinints();
  1417. if (rc)
  1418. goto out_ti;
  1419. return 0;
  1420. out_ti:
  1421. tiqdio_free_memory();
  1422. out_cache:
  1423. qdio_setup_exit();
  1424. out_debug:
  1425. qdio_debug_exit();
  1426. return rc;
  1427. }
  1428. static void __exit exit_QDIO(void)
  1429. {
  1430. tiqdio_unregister_thinints();
  1431. tiqdio_free_memory();
  1432. qdio_setup_exit();
  1433. qdio_debug_exit();
  1434. }
  1435. module_init(init_QDIO);
  1436. module_exit(exit_QDIO);