time.c 46 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/kernel_stat.h>
  17. #include <linux/errno.h>
  18. #include <linux/module.h>
  19. #include <linux/sched.h>
  20. #include <linux/kernel.h>
  21. #include <linux/param.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/cpu.h>
  26. #include <linux/stop_machine.h>
  27. #include <linux/time.h>
  28. #include <linux/sysdev.h>
  29. #include <linux/delay.h>
  30. #include <linux/init.h>
  31. #include <linux/smp.h>
  32. #include <linux/types.h>
  33. #include <linux/profile.h>
  34. #include <linux/timex.h>
  35. #include <linux/notifier.h>
  36. #include <linux/clocksource.h>
  37. #include <linux/clockchips.h>
  38. #include <linux/gfp.h>
  39. #include <linux/kprobes.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/delay.h>
  42. #include <asm/div64.h>
  43. #include <asm/vdso.h>
  44. #include <asm/irq.h>
  45. #include <asm/irq_regs.h>
  46. #include <asm/timer.h>
  47. #include <asm/etr.h>
  48. #include <asm/cio.h>
  49. /* change this if you have some constant time drift */
  50. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  51. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  52. u64 sched_clock_base_cc = -1; /* Force to data section. */
  53. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  54. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  55. /*
  56. * Scheduler clock - returns current time in nanosec units.
  57. */
  58. unsigned long long notrace __kprobes sched_clock(void)
  59. {
  60. return (get_clock_monotonic() * 125) >> 9;
  61. }
  62. /*
  63. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  64. */
  65. unsigned long long monotonic_clock(void)
  66. {
  67. return sched_clock();
  68. }
  69. EXPORT_SYMBOL(monotonic_clock);
  70. void tod_to_timeval(__u64 todval, struct timespec *xt)
  71. {
  72. unsigned long long sec;
  73. sec = todval >> 12;
  74. do_div(sec, 1000000);
  75. xt->tv_sec = sec;
  76. todval -= (sec * 1000000) << 12;
  77. xt->tv_nsec = ((todval * 1000) >> 12);
  78. }
  79. EXPORT_SYMBOL(tod_to_timeval);
  80. void clock_comparator_work(void)
  81. {
  82. struct clock_event_device *cd;
  83. S390_lowcore.clock_comparator = -1ULL;
  84. set_clock_comparator(S390_lowcore.clock_comparator);
  85. cd = &__get_cpu_var(comparators);
  86. cd->event_handler(cd);
  87. }
  88. /*
  89. * Fixup the clock comparator.
  90. */
  91. static void fixup_clock_comparator(unsigned long long delta)
  92. {
  93. /* If nobody is waiting there's nothing to fix. */
  94. if (S390_lowcore.clock_comparator == -1ULL)
  95. return;
  96. S390_lowcore.clock_comparator += delta;
  97. set_clock_comparator(S390_lowcore.clock_comparator);
  98. }
  99. static int s390_next_event(unsigned long delta,
  100. struct clock_event_device *evt)
  101. {
  102. S390_lowcore.clock_comparator = get_clock() + delta;
  103. set_clock_comparator(S390_lowcore.clock_comparator);
  104. return 0;
  105. }
  106. static void s390_set_mode(enum clock_event_mode mode,
  107. struct clock_event_device *evt)
  108. {
  109. }
  110. /*
  111. * Set up lowcore and control register of the current cpu to
  112. * enable TOD clock and clock comparator interrupts.
  113. */
  114. void init_cpu_timer(void)
  115. {
  116. struct clock_event_device *cd;
  117. int cpu;
  118. S390_lowcore.clock_comparator = -1ULL;
  119. set_clock_comparator(S390_lowcore.clock_comparator);
  120. cpu = smp_processor_id();
  121. cd = &per_cpu(comparators, cpu);
  122. cd->name = "comparator";
  123. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  124. cd->mult = 16777;
  125. cd->shift = 12;
  126. cd->min_delta_ns = 1;
  127. cd->max_delta_ns = LONG_MAX;
  128. cd->rating = 400;
  129. cd->cpumask = cpumask_of(cpu);
  130. cd->set_next_event = s390_next_event;
  131. cd->set_mode = s390_set_mode;
  132. clockevents_register_device(cd);
  133. /* Enable clock comparator timer interrupt. */
  134. __ctl_set_bit(0,11);
  135. /* Always allow the timing alert external interrupt. */
  136. __ctl_set_bit(0, 4);
  137. }
  138. static void clock_comparator_interrupt(unsigned int ext_int_code,
  139. unsigned int param32,
  140. unsigned long param64)
  141. {
  142. kstat_cpu(smp_processor_id()).irqs[EXTINT_CLK]++;
  143. if (S390_lowcore.clock_comparator == -1ULL)
  144. set_clock_comparator(S390_lowcore.clock_comparator);
  145. }
  146. static void etr_timing_alert(struct etr_irq_parm *);
  147. static void stp_timing_alert(struct stp_irq_parm *);
  148. static void timing_alert_interrupt(unsigned int ext_int_code,
  149. unsigned int param32, unsigned long param64)
  150. {
  151. kstat_cpu(smp_processor_id()).irqs[EXTINT_TLA]++;
  152. if (param32 & 0x00c40000)
  153. etr_timing_alert((struct etr_irq_parm *) &param32);
  154. if (param32 & 0x00038000)
  155. stp_timing_alert((struct stp_irq_parm *) &param32);
  156. }
  157. static void etr_reset(void);
  158. static void stp_reset(void);
  159. void read_persistent_clock(struct timespec *ts)
  160. {
  161. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  162. }
  163. void read_boot_clock(struct timespec *ts)
  164. {
  165. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  166. }
  167. static cycle_t read_tod_clock(struct clocksource *cs)
  168. {
  169. return get_clock();
  170. }
  171. static struct clocksource clocksource_tod = {
  172. .name = "tod",
  173. .rating = 400,
  174. .read = read_tod_clock,
  175. .mask = -1ULL,
  176. .mult = 1000,
  177. .shift = 12,
  178. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  179. };
  180. struct clocksource * __init clocksource_default_clock(void)
  181. {
  182. return &clocksource_tod;
  183. }
  184. void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
  185. struct clocksource *clock, u32 mult)
  186. {
  187. if (clock != &clocksource_tod)
  188. return;
  189. /* Make userspace gettimeofday spin until we're done. */
  190. ++vdso_data->tb_update_count;
  191. smp_wmb();
  192. vdso_data->xtime_tod_stamp = clock->cycle_last;
  193. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  194. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  195. vdso_data->wtom_clock_sec = wtm->tv_sec;
  196. vdso_data->wtom_clock_nsec = wtm->tv_nsec;
  197. vdso_data->ntp_mult = mult;
  198. smp_wmb();
  199. ++vdso_data->tb_update_count;
  200. }
  201. extern struct timezone sys_tz;
  202. void update_vsyscall_tz(void)
  203. {
  204. /* Make userspace gettimeofday spin until we're done. */
  205. ++vdso_data->tb_update_count;
  206. smp_wmb();
  207. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  208. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  209. smp_wmb();
  210. ++vdso_data->tb_update_count;
  211. }
  212. /*
  213. * Initialize the TOD clock and the CPU timer of
  214. * the boot cpu.
  215. */
  216. void __init time_init(void)
  217. {
  218. /* Reset time synchronization interfaces. */
  219. etr_reset();
  220. stp_reset();
  221. /* request the clock comparator external interrupt */
  222. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  223. panic("Couldn't request external interrupt 0x1004");
  224. /* request the timing alert external interrupt */
  225. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  226. panic("Couldn't request external interrupt 0x1406");
  227. if (clocksource_register(&clocksource_tod) != 0)
  228. panic("Could not register TOD clock source");
  229. /* Enable TOD clock interrupts on the boot cpu. */
  230. init_cpu_timer();
  231. /* Enable cpu timer interrupts on the boot cpu. */
  232. vtime_init();
  233. }
  234. /*
  235. * The time is "clock". old is what we think the time is.
  236. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  237. * "delay" is an approximation how long the synchronization took. If
  238. * the time correction is positive, then "delay" is subtracted from
  239. * the time difference and only the remaining part is passed to ntp.
  240. */
  241. static unsigned long long adjust_time(unsigned long long old,
  242. unsigned long long clock,
  243. unsigned long long delay)
  244. {
  245. unsigned long long delta, ticks;
  246. struct timex adjust;
  247. if (clock > old) {
  248. /* It is later than we thought. */
  249. delta = ticks = clock - old;
  250. delta = ticks = (delta < delay) ? 0 : delta - delay;
  251. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  252. adjust.offset = ticks * (1000000 / HZ);
  253. } else {
  254. /* It is earlier than we thought. */
  255. delta = ticks = old - clock;
  256. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  257. delta = -delta;
  258. adjust.offset = -ticks * (1000000 / HZ);
  259. }
  260. sched_clock_base_cc += delta;
  261. if (adjust.offset != 0) {
  262. pr_notice("The ETR interface has adjusted the clock "
  263. "by %li microseconds\n", adjust.offset);
  264. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  265. do_adjtimex(&adjust);
  266. }
  267. return delta;
  268. }
  269. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  270. static DEFINE_MUTEX(clock_sync_mutex);
  271. static unsigned long clock_sync_flags;
  272. #define CLOCK_SYNC_HAS_ETR 0
  273. #define CLOCK_SYNC_HAS_STP 1
  274. #define CLOCK_SYNC_ETR 2
  275. #define CLOCK_SYNC_STP 3
  276. /*
  277. * The synchronous get_clock function. It will write the current clock
  278. * value to the clock pointer and return 0 if the clock is in sync with
  279. * the external time source. If the clock mode is local it will return
  280. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  281. * reference.
  282. */
  283. int get_sync_clock(unsigned long long *clock)
  284. {
  285. atomic_t *sw_ptr;
  286. unsigned int sw0, sw1;
  287. sw_ptr = &get_cpu_var(clock_sync_word);
  288. sw0 = atomic_read(sw_ptr);
  289. *clock = get_clock();
  290. sw1 = atomic_read(sw_ptr);
  291. put_cpu_var(clock_sync_word);
  292. if (sw0 == sw1 && (sw0 & 0x80000000U))
  293. /* Success: time is in sync. */
  294. return 0;
  295. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  296. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  297. return -ENOSYS;
  298. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  299. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  300. return -EACCES;
  301. return -EAGAIN;
  302. }
  303. EXPORT_SYMBOL(get_sync_clock);
  304. /*
  305. * Make get_sync_clock return -EAGAIN.
  306. */
  307. static void disable_sync_clock(void *dummy)
  308. {
  309. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  310. /*
  311. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  312. * fail until the sync bit is turned back on. In addition
  313. * increase the "sequence" counter to avoid the race of an
  314. * etr event and the complete recovery against get_sync_clock.
  315. */
  316. atomic_clear_mask(0x80000000, sw_ptr);
  317. atomic_inc(sw_ptr);
  318. }
  319. /*
  320. * Make get_sync_clock return 0 again.
  321. * Needs to be called from a context disabled for preemption.
  322. */
  323. static void enable_sync_clock(void)
  324. {
  325. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  326. atomic_set_mask(0x80000000, sw_ptr);
  327. }
  328. /*
  329. * Function to check if the clock is in sync.
  330. */
  331. static inline int check_sync_clock(void)
  332. {
  333. atomic_t *sw_ptr;
  334. int rc;
  335. sw_ptr = &get_cpu_var(clock_sync_word);
  336. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  337. put_cpu_var(clock_sync_word);
  338. return rc;
  339. }
  340. /* Single threaded workqueue used for etr and stp sync events */
  341. static struct workqueue_struct *time_sync_wq;
  342. static void __init time_init_wq(void)
  343. {
  344. if (time_sync_wq)
  345. return;
  346. time_sync_wq = create_singlethread_workqueue("timesync");
  347. }
  348. /*
  349. * External Time Reference (ETR) code.
  350. */
  351. static int etr_port0_online;
  352. static int etr_port1_online;
  353. static int etr_steai_available;
  354. static int __init early_parse_etr(char *p)
  355. {
  356. if (strncmp(p, "off", 3) == 0)
  357. etr_port0_online = etr_port1_online = 0;
  358. else if (strncmp(p, "port0", 5) == 0)
  359. etr_port0_online = 1;
  360. else if (strncmp(p, "port1", 5) == 0)
  361. etr_port1_online = 1;
  362. else if (strncmp(p, "on", 2) == 0)
  363. etr_port0_online = etr_port1_online = 1;
  364. return 0;
  365. }
  366. early_param("etr", early_parse_etr);
  367. enum etr_event {
  368. ETR_EVENT_PORT0_CHANGE,
  369. ETR_EVENT_PORT1_CHANGE,
  370. ETR_EVENT_PORT_ALERT,
  371. ETR_EVENT_SYNC_CHECK,
  372. ETR_EVENT_SWITCH_LOCAL,
  373. ETR_EVENT_UPDATE,
  374. };
  375. /*
  376. * Valid bit combinations of the eacr register are (x = don't care):
  377. * e0 e1 dp p0 p1 ea es sl
  378. * 0 0 x 0 0 0 0 0 initial, disabled state
  379. * 0 0 x 0 1 1 0 0 port 1 online
  380. * 0 0 x 1 0 1 0 0 port 0 online
  381. * 0 0 x 1 1 1 0 0 both ports online
  382. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  383. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  384. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  385. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  386. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  387. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  388. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  389. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  390. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  391. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  392. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  393. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  394. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  395. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  396. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  397. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  398. */
  399. static struct etr_eacr etr_eacr;
  400. static u64 etr_tolec; /* time of last eacr update */
  401. static struct etr_aib etr_port0;
  402. static int etr_port0_uptodate;
  403. static struct etr_aib etr_port1;
  404. static int etr_port1_uptodate;
  405. static unsigned long etr_events;
  406. static struct timer_list etr_timer;
  407. static void etr_timeout(unsigned long dummy);
  408. static void etr_work_fn(struct work_struct *work);
  409. static DEFINE_MUTEX(etr_work_mutex);
  410. static DECLARE_WORK(etr_work, etr_work_fn);
  411. /*
  412. * Reset ETR attachment.
  413. */
  414. static void etr_reset(void)
  415. {
  416. etr_eacr = (struct etr_eacr) {
  417. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  418. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  419. .es = 0, .sl = 0 };
  420. if (etr_setr(&etr_eacr) == 0) {
  421. etr_tolec = get_clock();
  422. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  423. if (etr_port0_online && etr_port1_online)
  424. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  425. } else if (etr_port0_online || etr_port1_online) {
  426. pr_warning("The real or virtual hardware system does "
  427. "not provide an ETR interface\n");
  428. etr_port0_online = etr_port1_online = 0;
  429. }
  430. }
  431. static int __init etr_init(void)
  432. {
  433. struct etr_aib aib;
  434. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  435. return 0;
  436. time_init_wq();
  437. /* Check if this machine has the steai instruction. */
  438. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  439. etr_steai_available = 1;
  440. setup_timer(&etr_timer, etr_timeout, 0UL);
  441. if (etr_port0_online) {
  442. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  443. queue_work(time_sync_wq, &etr_work);
  444. }
  445. if (etr_port1_online) {
  446. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  447. queue_work(time_sync_wq, &etr_work);
  448. }
  449. return 0;
  450. }
  451. arch_initcall(etr_init);
  452. /*
  453. * Two sorts of ETR machine checks. The architecture reads:
  454. * "When a machine-check niterruption occurs and if a switch-to-local or
  455. * ETR-sync-check interrupt request is pending but disabled, this pending
  456. * disabled interruption request is indicated and is cleared".
  457. * Which means that we can get etr_switch_to_local events from the machine
  458. * check handler although the interruption condition is disabled. Lovely..
  459. */
  460. /*
  461. * Switch to local machine check. This is called when the last usable
  462. * ETR port goes inactive. After switch to local the clock is not in sync.
  463. */
  464. void etr_switch_to_local(void)
  465. {
  466. if (!etr_eacr.sl)
  467. return;
  468. disable_sync_clock(NULL);
  469. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  470. etr_eacr.es = etr_eacr.sl = 0;
  471. etr_setr(&etr_eacr);
  472. queue_work(time_sync_wq, &etr_work);
  473. }
  474. }
  475. /*
  476. * ETR sync check machine check. This is called when the ETR OTE and the
  477. * local clock OTE are farther apart than the ETR sync check tolerance.
  478. * After a ETR sync check the clock is not in sync. The machine check
  479. * is broadcasted to all cpus at the same time.
  480. */
  481. void etr_sync_check(void)
  482. {
  483. if (!etr_eacr.es)
  484. return;
  485. disable_sync_clock(NULL);
  486. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  487. etr_eacr.es = 0;
  488. etr_setr(&etr_eacr);
  489. queue_work(time_sync_wq, &etr_work);
  490. }
  491. }
  492. /*
  493. * ETR timing alert. There are two causes:
  494. * 1) port state change, check the usability of the port
  495. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  496. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  497. * or ETR-data word 4 (edf4) has changed.
  498. */
  499. static void etr_timing_alert(struct etr_irq_parm *intparm)
  500. {
  501. if (intparm->pc0)
  502. /* ETR port 0 state change. */
  503. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  504. if (intparm->pc1)
  505. /* ETR port 1 state change. */
  506. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  507. if (intparm->eai)
  508. /*
  509. * ETR port alert on either port 0, 1 or both.
  510. * Both ports are not up-to-date now.
  511. */
  512. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  513. queue_work(time_sync_wq, &etr_work);
  514. }
  515. static void etr_timeout(unsigned long dummy)
  516. {
  517. set_bit(ETR_EVENT_UPDATE, &etr_events);
  518. queue_work(time_sync_wq, &etr_work);
  519. }
  520. /*
  521. * Check if the etr mode is pss.
  522. */
  523. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  524. {
  525. return eacr.es && !eacr.sl;
  526. }
  527. /*
  528. * Check if the etr mode is etr.
  529. */
  530. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  531. {
  532. return eacr.es && eacr.sl;
  533. }
  534. /*
  535. * Check if the port can be used for TOD synchronization.
  536. * For PPS mode the port has to receive OTEs. For ETR mode
  537. * the port has to receive OTEs, the ETR stepping bit has to
  538. * be zero and the validity bits for data frame 1, 2, and 3
  539. * have to be 1.
  540. */
  541. static int etr_port_valid(struct etr_aib *aib, int port)
  542. {
  543. unsigned int psc;
  544. /* Check that this port is receiving OTEs. */
  545. if (aib->tsp == 0)
  546. return 0;
  547. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  548. if (psc == etr_lpsc_pps_mode)
  549. return 1;
  550. if (psc == etr_lpsc_operational_step)
  551. return !aib->esw.y && aib->slsw.v1 &&
  552. aib->slsw.v2 && aib->slsw.v3;
  553. return 0;
  554. }
  555. /*
  556. * Check if two ports are on the same network.
  557. */
  558. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  559. {
  560. // FIXME: any other fields we have to compare?
  561. return aib1->edf1.net_id == aib2->edf1.net_id;
  562. }
  563. /*
  564. * Wrapper for etr_stei that converts physical port states
  565. * to logical port states to be consistent with the output
  566. * of stetr (see etr_psc vs. etr_lpsc).
  567. */
  568. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  569. {
  570. BUG_ON(etr_steai(aib, func) != 0);
  571. /* Convert port state to logical port state. */
  572. if (aib->esw.psc0 == 1)
  573. aib->esw.psc0 = 2;
  574. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  575. aib->esw.psc0 = 1;
  576. if (aib->esw.psc1 == 1)
  577. aib->esw.psc1 = 2;
  578. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  579. aib->esw.psc1 = 1;
  580. }
  581. /*
  582. * Check if the aib a2 is still connected to the same attachment as
  583. * aib a1, the etv values differ by one and a2 is valid.
  584. */
  585. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  586. {
  587. int state_a1, state_a2;
  588. /* Paranoia check: e0/e1 should better be the same. */
  589. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  590. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  591. return 0;
  592. /* Still connected to the same etr ? */
  593. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  594. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  595. if (state_a1 == etr_lpsc_operational_step) {
  596. if (state_a2 != etr_lpsc_operational_step ||
  597. a1->edf1.net_id != a2->edf1.net_id ||
  598. a1->edf1.etr_id != a2->edf1.etr_id ||
  599. a1->edf1.etr_pn != a2->edf1.etr_pn)
  600. return 0;
  601. } else if (state_a2 != etr_lpsc_pps_mode)
  602. return 0;
  603. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  604. if (a1->edf2.etv + 1 != a2->edf2.etv)
  605. return 0;
  606. if (!etr_port_valid(a2, p))
  607. return 0;
  608. return 1;
  609. }
  610. struct clock_sync_data {
  611. atomic_t cpus;
  612. int in_sync;
  613. unsigned long long fixup_cc;
  614. int etr_port;
  615. struct etr_aib *etr_aib;
  616. };
  617. static void clock_sync_cpu(struct clock_sync_data *sync)
  618. {
  619. atomic_dec(&sync->cpus);
  620. enable_sync_clock();
  621. /*
  622. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  623. * is called on all other cpus while the TOD clocks is stopped.
  624. * __udelay will stop the cpu on an enabled wait psw until the
  625. * TOD is running again.
  626. */
  627. while (sync->in_sync == 0) {
  628. __udelay(1);
  629. /*
  630. * A different cpu changes *in_sync. Therefore use
  631. * barrier() to force memory access.
  632. */
  633. barrier();
  634. }
  635. if (sync->in_sync != 1)
  636. /* Didn't work. Clear per-cpu in sync bit again. */
  637. disable_sync_clock(NULL);
  638. /*
  639. * This round of TOD syncing is done. Set the clock comparator
  640. * to the next tick and let the processor continue.
  641. */
  642. fixup_clock_comparator(sync->fixup_cc);
  643. }
  644. /*
  645. * Sync the TOD clock using the port referred to by aibp. This port
  646. * has to be enabled and the other port has to be disabled. The
  647. * last eacr update has to be more than 1.6 seconds in the past.
  648. */
  649. static int etr_sync_clock(void *data)
  650. {
  651. static int first;
  652. unsigned long long clock, old_clock, delay, delta;
  653. struct clock_sync_data *etr_sync;
  654. struct etr_aib *sync_port, *aib;
  655. int port;
  656. int rc;
  657. etr_sync = data;
  658. if (xchg(&first, 1) == 1) {
  659. /* Slave */
  660. clock_sync_cpu(etr_sync);
  661. return 0;
  662. }
  663. /* Wait until all other cpus entered the sync function. */
  664. while (atomic_read(&etr_sync->cpus) != 0)
  665. cpu_relax();
  666. port = etr_sync->etr_port;
  667. aib = etr_sync->etr_aib;
  668. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  669. enable_sync_clock();
  670. /* Set clock to next OTE. */
  671. __ctl_set_bit(14, 21);
  672. __ctl_set_bit(0, 29);
  673. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  674. old_clock = get_clock();
  675. if (set_clock(clock) == 0) {
  676. __udelay(1); /* Wait for the clock to start. */
  677. __ctl_clear_bit(0, 29);
  678. __ctl_clear_bit(14, 21);
  679. etr_stetr(aib);
  680. /* Adjust Linux timing variables. */
  681. delay = (unsigned long long)
  682. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  683. delta = adjust_time(old_clock, clock, delay);
  684. etr_sync->fixup_cc = delta;
  685. fixup_clock_comparator(delta);
  686. /* Verify that the clock is properly set. */
  687. if (!etr_aib_follows(sync_port, aib, port)) {
  688. /* Didn't work. */
  689. disable_sync_clock(NULL);
  690. etr_sync->in_sync = -EAGAIN;
  691. rc = -EAGAIN;
  692. } else {
  693. etr_sync->in_sync = 1;
  694. rc = 0;
  695. }
  696. } else {
  697. /* Could not set the clock ?!? */
  698. __ctl_clear_bit(0, 29);
  699. __ctl_clear_bit(14, 21);
  700. disable_sync_clock(NULL);
  701. etr_sync->in_sync = -EAGAIN;
  702. rc = -EAGAIN;
  703. }
  704. xchg(&first, 0);
  705. return rc;
  706. }
  707. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  708. {
  709. struct clock_sync_data etr_sync;
  710. struct etr_aib *sync_port;
  711. int follows;
  712. int rc;
  713. /* Check if the current aib is adjacent to the sync port aib. */
  714. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  715. follows = etr_aib_follows(sync_port, aib, port);
  716. memcpy(sync_port, aib, sizeof(*aib));
  717. if (!follows)
  718. return -EAGAIN;
  719. memset(&etr_sync, 0, sizeof(etr_sync));
  720. etr_sync.etr_aib = aib;
  721. etr_sync.etr_port = port;
  722. get_online_cpus();
  723. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  724. rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
  725. put_online_cpus();
  726. return rc;
  727. }
  728. /*
  729. * Handle the immediate effects of the different events.
  730. * The port change event is used for online/offline changes.
  731. */
  732. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  733. {
  734. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  735. eacr.es = 0;
  736. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  737. eacr.es = eacr.sl = 0;
  738. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  739. etr_port0_uptodate = etr_port1_uptodate = 0;
  740. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  741. if (eacr.e0)
  742. /*
  743. * Port change of an enabled port. We have to
  744. * assume that this can have caused an stepping
  745. * port switch.
  746. */
  747. etr_tolec = get_clock();
  748. eacr.p0 = etr_port0_online;
  749. if (!eacr.p0)
  750. eacr.e0 = 0;
  751. etr_port0_uptodate = 0;
  752. }
  753. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  754. if (eacr.e1)
  755. /*
  756. * Port change of an enabled port. We have to
  757. * assume that this can have caused an stepping
  758. * port switch.
  759. */
  760. etr_tolec = get_clock();
  761. eacr.p1 = etr_port1_online;
  762. if (!eacr.p1)
  763. eacr.e1 = 0;
  764. etr_port1_uptodate = 0;
  765. }
  766. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  767. return eacr;
  768. }
  769. /*
  770. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  771. * one of the ports needs an update.
  772. */
  773. static void etr_set_tolec_timeout(unsigned long long now)
  774. {
  775. unsigned long micros;
  776. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  777. (!etr_eacr.p1 || etr_port1_uptodate))
  778. return;
  779. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  780. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  781. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  782. }
  783. /*
  784. * Set up a time that expires after 1/2 second.
  785. */
  786. static void etr_set_sync_timeout(void)
  787. {
  788. mod_timer(&etr_timer, jiffies + HZ/2);
  789. }
  790. /*
  791. * Update the aib information for one or both ports.
  792. */
  793. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  794. struct etr_eacr eacr)
  795. {
  796. /* With both ports disabled the aib information is useless. */
  797. if (!eacr.e0 && !eacr.e1)
  798. return eacr;
  799. /* Update port0 or port1 with aib stored in etr_work_fn. */
  800. if (aib->esw.q == 0) {
  801. /* Information for port 0 stored. */
  802. if (eacr.p0 && !etr_port0_uptodate) {
  803. etr_port0 = *aib;
  804. if (etr_port0_online)
  805. etr_port0_uptodate = 1;
  806. }
  807. } else {
  808. /* Information for port 1 stored. */
  809. if (eacr.p1 && !etr_port1_uptodate) {
  810. etr_port1 = *aib;
  811. if (etr_port0_online)
  812. etr_port1_uptodate = 1;
  813. }
  814. }
  815. /*
  816. * Do not try to get the alternate port aib if the clock
  817. * is not in sync yet.
  818. */
  819. if (!eacr.es || !check_sync_clock())
  820. return eacr;
  821. /*
  822. * If steai is available we can get the information about
  823. * the other port immediately. If only stetr is available the
  824. * data-port bit toggle has to be used.
  825. */
  826. if (etr_steai_available) {
  827. if (eacr.p0 && !etr_port0_uptodate) {
  828. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  829. etr_port0_uptodate = 1;
  830. }
  831. if (eacr.p1 && !etr_port1_uptodate) {
  832. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  833. etr_port1_uptodate = 1;
  834. }
  835. } else {
  836. /*
  837. * One port was updated above, if the other
  838. * port is not uptodate toggle dp bit.
  839. */
  840. if ((eacr.p0 && !etr_port0_uptodate) ||
  841. (eacr.p1 && !etr_port1_uptodate))
  842. eacr.dp ^= 1;
  843. else
  844. eacr.dp = 0;
  845. }
  846. return eacr;
  847. }
  848. /*
  849. * Write new etr control register if it differs from the current one.
  850. * Return 1 if etr_tolec has been updated as well.
  851. */
  852. static void etr_update_eacr(struct etr_eacr eacr)
  853. {
  854. int dp_changed;
  855. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  856. /* No change, return. */
  857. return;
  858. /*
  859. * The disable of an active port of the change of the data port
  860. * bit can/will cause a change in the data port.
  861. */
  862. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  863. (etr_eacr.dp ^ eacr.dp) != 0;
  864. etr_eacr = eacr;
  865. etr_setr(&etr_eacr);
  866. if (dp_changed)
  867. etr_tolec = get_clock();
  868. }
  869. /*
  870. * ETR work. In this function you'll find the main logic. In
  871. * particular this is the only function that calls etr_update_eacr(),
  872. * it "controls" the etr control register.
  873. */
  874. static void etr_work_fn(struct work_struct *work)
  875. {
  876. unsigned long long now;
  877. struct etr_eacr eacr;
  878. struct etr_aib aib;
  879. int sync_port;
  880. /* prevent multiple execution. */
  881. mutex_lock(&etr_work_mutex);
  882. /* Create working copy of etr_eacr. */
  883. eacr = etr_eacr;
  884. /* Check for the different events and their immediate effects. */
  885. eacr = etr_handle_events(eacr);
  886. /* Check if ETR is supposed to be active. */
  887. eacr.ea = eacr.p0 || eacr.p1;
  888. if (!eacr.ea) {
  889. /* Both ports offline. Reset everything. */
  890. eacr.dp = eacr.es = eacr.sl = 0;
  891. on_each_cpu(disable_sync_clock, NULL, 1);
  892. del_timer_sync(&etr_timer);
  893. etr_update_eacr(eacr);
  894. goto out_unlock;
  895. }
  896. /* Store aib to get the current ETR status word. */
  897. BUG_ON(etr_stetr(&aib) != 0);
  898. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  899. now = get_clock();
  900. /*
  901. * Update the port information if the last stepping port change
  902. * or data port change is older than 1.6 seconds.
  903. */
  904. if (now >= etr_tolec + (1600000 << 12))
  905. eacr = etr_handle_update(&aib, eacr);
  906. /*
  907. * Select ports to enable. The preferred synchronization mode is PPS.
  908. * If a port can be enabled depends on a number of things:
  909. * 1) The port needs to be online and uptodate. A port is not
  910. * disabled just because it is not uptodate, but it is only
  911. * enabled if it is uptodate.
  912. * 2) The port needs to have the same mode (pps / etr).
  913. * 3) The port needs to be usable -> etr_port_valid() == 1
  914. * 4) To enable the second port the clock needs to be in sync.
  915. * 5) If both ports are useable and are ETR ports, the network id
  916. * has to be the same.
  917. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  918. */
  919. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  920. eacr.sl = 0;
  921. eacr.e0 = 1;
  922. if (!etr_mode_is_pps(etr_eacr))
  923. eacr.es = 0;
  924. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  925. eacr.e1 = 0;
  926. // FIXME: uptodate checks ?
  927. else if (etr_port0_uptodate && etr_port1_uptodate)
  928. eacr.e1 = 1;
  929. sync_port = (etr_port0_uptodate &&
  930. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  931. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  932. eacr.sl = 0;
  933. eacr.e0 = 0;
  934. eacr.e1 = 1;
  935. if (!etr_mode_is_pps(etr_eacr))
  936. eacr.es = 0;
  937. sync_port = (etr_port1_uptodate &&
  938. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  939. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  940. eacr.sl = 1;
  941. eacr.e0 = 1;
  942. if (!etr_mode_is_etr(etr_eacr))
  943. eacr.es = 0;
  944. if (!eacr.es || !eacr.p1 ||
  945. aib.esw.psc1 != etr_lpsc_operational_alt)
  946. eacr.e1 = 0;
  947. else if (etr_port0_uptodate && etr_port1_uptodate &&
  948. etr_compare_network(&etr_port0, &etr_port1))
  949. eacr.e1 = 1;
  950. sync_port = (etr_port0_uptodate &&
  951. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  952. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  953. eacr.sl = 1;
  954. eacr.e0 = 0;
  955. eacr.e1 = 1;
  956. if (!etr_mode_is_etr(etr_eacr))
  957. eacr.es = 0;
  958. sync_port = (etr_port1_uptodate &&
  959. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  960. } else {
  961. /* Both ports not usable. */
  962. eacr.es = eacr.sl = 0;
  963. sync_port = -1;
  964. }
  965. /*
  966. * If the clock is in sync just update the eacr and return.
  967. * If there is no valid sync port wait for a port update.
  968. */
  969. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  970. etr_update_eacr(eacr);
  971. etr_set_tolec_timeout(now);
  972. goto out_unlock;
  973. }
  974. /*
  975. * Prepare control register for clock syncing
  976. * (reset data port bit, set sync check control.
  977. */
  978. eacr.dp = 0;
  979. eacr.es = 1;
  980. /*
  981. * Update eacr and try to synchronize the clock. If the update
  982. * of eacr caused a stepping port switch (or if we have to
  983. * assume that a stepping port switch has occurred) or the
  984. * clock syncing failed, reset the sync check control bit
  985. * and set up a timer to try again after 0.5 seconds
  986. */
  987. etr_update_eacr(eacr);
  988. if (now < etr_tolec + (1600000 << 12) ||
  989. etr_sync_clock_stop(&aib, sync_port) != 0) {
  990. /* Sync failed. Try again in 1/2 second. */
  991. eacr.es = 0;
  992. etr_update_eacr(eacr);
  993. etr_set_sync_timeout();
  994. } else
  995. etr_set_tolec_timeout(now);
  996. out_unlock:
  997. mutex_unlock(&etr_work_mutex);
  998. }
  999. /*
  1000. * Sysfs interface functions
  1001. */
  1002. static struct sysdev_class etr_sysclass = {
  1003. .name = "etr",
  1004. };
  1005. static struct sys_device etr_port0_dev = {
  1006. .id = 0,
  1007. .cls = &etr_sysclass,
  1008. };
  1009. static struct sys_device etr_port1_dev = {
  1010. .id = 1,
  1011. .cls = &etr_sysclass,
  1012. };
  1013. /*
  1014. * ETR class attributes
  1015. */
  1016. static ssize_t etr_stepping_port_show(struct sysdev_class *class,
  1017. struct sysdev_class_attribute *attr,
  1018. char *buf)
  1019. {
  1020. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1021. }
  1022. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1023. static ssize_t etr_stepping_mode_show(struct sysdev_class *class,
  1024. struct sysdev_class_attribute *attr,
  1025. char *buf)
  1026. {
  1027. char *mode_str;
  1028. if (etr_mode_is_pps(etr_eacr))
  1029. mode_str = "pps";
  1030. else if (etr_mode_is_etr(etr_eacr))
  1031. mode_str = "etr";
  1032. else
  1033. mode_str = "local";
  1034. return sprintf(buf, "%s\n", mode_str);
  1035. }
  1036. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1037. /*
  1038. * ETR port attributes
  1039. */
  1040. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1041. {
  1042. if (dev == &etr_port0_dev)
  1043. return etr_port0_online ? &etr_port0 : NULL;
  1044. else
  1045. return etr_port1_online ? &etr_port1 : NULL;
  1046. }
  1047. static ssize_t etr_online_show(struct sys_device *dev,
  1048. struct sysdev_attribute *attr,
  1049. char *buf)
  1050. {
  1051. unsigned int online;
  1052. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1053. return sprintf(buf, "%i\n", online);
  1054. }
  1055. static ssize_t etr_online_store(struct sys_device *dev,
  1056. struct sysdev_attribute *attr,
  1057. const char *buf, size_t count)
  1058. {
  1059. unsigned int value;
  1060. value = simple_strtoul(buf, NULL, 0);
  1061. if (value != 0 && value != 1)
  1062. return -EINVAL;
  1063. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1064. return -EOPNOTSUPP;
  1065. mutex_lock(&clock_sync_mutex);
  1066. if (dev == &etr_port0_dev) {
  1067. if (etr_port0_online == value)
  1068. goto out; /* Nothing to do. */
  1069. etr_port0_online = value;
  1070. if (etr_port0_online && etr_port1_online)
  1071. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1072. else
  1073. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1074. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1075. queue_work(time_sync_wq, &etr_work);
  1076. } else {
  1077. if (etr_port1_online == value)
  1078. goto out; /* Nothing to do. */
  1079. etr_port1_online = value;
  1080. if (etr_port0_online && etr_port1_online)
  1081. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1082. else
  1083. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1084. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1085. queue_work(time_sync_wq, &etr_work);
  1086. }
  1087. out:
  1088. mutex_unlock(&clock_sync_mutex);
  1089. return count;
  1090. }
  1091. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1092. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1093. struct sysdev_attribute *attr,
  1094. char *buf)
  1095. {
  1096. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1097. etr_eacr.e0 : etr_eacr.e1);
  1098. }
  1099. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1100. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1101. struct sysdev_attribute *attr, char *buf)
  1102. {
  1103. if (!etr_port0_online && !etr_port1_online)
  1104. /* Status word is not uptodate if both ports are offline. */
  1105. return -ENODATA;
  1106. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1107. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1108. }
  1109. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1110. static ssize_t etr_untuned_show(struct sys_device *dev,
  1111. struct sysdev_attribute *attr, char *buf)
  1112. {
  1113. struct etr_aib *aib = etr_aib_from_dev(dev);
  1114. if (!aib || !aib->slsw.v1)
  1115. return -ENODATA;
  1116. return sprintf(buf, "%i\n", aib->edf1.u);
  1117. }
  1118. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1119. static ssize_t etr_network_id_show(struct sys_device *dev,
  1120. struct sysdev_attribute *attr, char *buf)
  1121. {
  1122. struct etr_aib *aib = etr_aib_from_dev(dev);
  1123. if (!aib || !aib->slsw.v1)
  1124. return -ENODATA;
  1125. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1126. }
  1127. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1128. static ssize_t etr_id_show(struct sys_device *dev,
  1129. struct sysdev_attribute *attr, char *buf)
  1130. {
  1131. struct etr_aib *aib = etr_aib_from_dev(dev);
  1132. if (!aib || !aib->slsw.v1)
  1133. return -ENODATA;
  1134. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1135. }
  1136. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1137. static ssize_t etr_port_number_show(struct sys_device *dev,
  1138. struct sysdev_attribute *attr, char *buf)
  1139. {
  1140. struct etr_aib *aib = etr_aib_from_dev(dev);
  1141. if (!aib || !aib->slsw.v1)
  1142. return -ENODATA;
  1143. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1144. }
  1145. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1146. static ssize_t etr_coupled_show(struct sys_device *dev,
  1147. struct sysdev_attribute *attr, char *buf)
  1148. {
  1149. struct etr_aib *aib = etr_aib_from_dev(dev);
  1150. if (!aib || !aib->slsw.v3)
  1151. return -ENODATA;
  1152. return sprintf(buf, "%i\n", aib->edf3.c);
  1153. }
  1154. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1155. static ssize_t etr_local_time_show(struct sys_device *dev,
  1156. struct sysdev_attribute *attr, char *buf)
  1157. {
  1158. struct etr_aib *aib = etr_aib_from_dev(dev);
  1159. if (!aib || !aib->slsw.v3)
  1160. return -ENODATA;
  1161. return sprintf(buf, "%i\n", aib->edf3.blto);
  1162. }
  1163. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1164. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1165. struct sysdev_attribute *attr, char *buf)
  1166. {
  1167. struct etr_aib *aib = etr_aib_from_dev(dev);
  1168. if (!aib || !aib->slsw.v3)
  1169. return -ENODATA;
  1170. return sprintf(buf, "%i\n", aib->edf3.buo);
  1171. }
  1172. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1173. static struct sysdev_attribute *etr_port_attributes[] = {
  1174. &attr_online,
  1175. &attr_stepping_control,
  1176. &attr_state_code,
  1177. &attr_untuned,
  1178. &attr_network,
  1179. &attr_id,
  1180. &attr_port,
  1181. &attr_coupled,
  1182. &attr_local_time,
  1183. &attr_utc_offset,
  1184. NULL
  1185. };
  1186. static int __init etr_register_port(struct sys_device *dev)
  1187. {
  1188. struct sysdev_attribute **attr;
  1189. int rc;
  1190. rc = sysdev_register(dev);
  1191. if (rc)
  1192. goto out;
  1193. for (attr = etr_port_attributes; *attr; attr++) {
  1194. rc = sysdev_create_file(dev, *attr);
  1195. if (rc)
  1196. goto out_unreg;
  1197. }
  1198. return 0;
  1199. out_unreg:
  1200. for (; attr >= etr_port_attributes; attr--)
  1201. sysdev_remove_file(dev, *attr);
  1202. sysdev_unregister(dev);
  1203. out:
  1204. return rc;
  1205. }
  1206. static void __init etr_unregister_port(struct sys_device *dev)
  1207. {
  1208. struct sysdev_attribute **attr;
  1209. for (attr = etr_port_attributes; *attr; attr++)
  1210. sysdev_remove_file(dev, *attr);
  1211. sysdev_unregister(dev);
  1212. }
  1213. static int __init etr_init_sysfs(void)
  1214. {
  1215. int rc;
  1216. rc = sysdev_class_register(&etr_sysclass);
  1217. if (rc)
  1218. goto out;
  1219. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1220. if (rc)
  1221. goto out_unreg_class;
  1222. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1223. if (rc)
  1224. goto out_remove_stepping_port;
  1225. rc = etr_register_port(&etr_port0_dev);
  1226. if (rc)
  1227. goto out_remove_stepping_mode;
  1228. rc = etr_register_port(&etr_port1_dev);
  1229. if (rc)
  1230. goto out_remove_port0;
  1231. return 0;
  1232. out_remove_port0:
  1233. etr_unregister_port(&etr_port0_dev);
  1234. out_remove_stepping_mode:
  1235. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1236. out_remove_stepping_port:
  1237. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1238. out_unreg_class:
  1239. sysdev_class_unregister(&etr_sysclass);
  1240. out:
  1241. return rc;
  1242. }
  1243. device_initcall(etr_init_sysfs);
  1244. /*
  1245. * Server Time Protocol (STP) code.
  1246. */
  1247. static int stp_online;
  1248. static struct stp_sstpi stp_info;
  1249. static void *stp_page;
  1250. static void stp_work_fn(struct work_struct *work);
  1251. static DEFINE_MUTEX(stp_work_mutex);
  1252. static DECLARE_WORK(stp_work, stp_work_fn);
  1253. static struct timer_list stp_timer;
  1254. static int __init early_parse_stp(char *p)
  1255. {
  1256. if (strncmp(p, "off", 3) == 0)
  1257. stp_online = 0;
  1258. else if (strncmp(p, "on", 2) == 0)
  1259. stp_online = 1;
  1260. return 0;
  1261. }
  1262. early_param("stp", early_parse_stp);
  1263. /*
  1264. * Reset STP attachment.
  1265. */
  1266. static void __init stp_reset(void)
  1267. {
  1268. int rc;
  1269. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1270. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1271. if (rc == 0)
  1272. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1273. else if (stp_online) {
  1274. pr_warning("The real or virtual hardware system does "
  1275. "not provide an STP interface\n");
  1276. free_page((unsigned long) stp_page);
  1277. stp_page = NULL;
  1278. stp_online = 0;
  1279. }
  1280. }
  1281. static void stp_timeout(unsigned long dummy)
  1282. {
  1283. queue_work(time_sync_wq, &stp_work);
  1284. }
  1285. static int __init stp_init(void)
  1286. {
  1287. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1288. return 0;
  1289. setup_timer(&stp_timer, stp_timeout, 0UL);
  1290. time_init_wq();
  1291. if (!stp_online)
  1292. return 0;
  1293. queue_work(time_sync_wq, &stp_work);
  1294. return 0;
  1295. }
  1296. arch_initcall(stp_init);
  1297. /*
  1298. * STP timing alert. There are three causes:
  1299. * 1) timing status change
  1300. * 2) link availability change
  1301. * 3) time control parameter change
  1302. * In all three cases we are only interested in the clock source state.
  1303. * If a STP clock source is now available use it.
  1304. */
  1305. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1306. {
  1307. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1308. queue_work(time_sync_wq, &stp_work);
  1309. }
  1310. /*
  1311. * STP sync check machine check. This is called when the timing state
  1312. * changes from the synchronized state to the unsynchronized state.
  1313. * After a STP sync check the clock is not in sync. The machine check
  1314. * is broadcasted to all cpus at the same time.
  1315. */
  1316. void stp_sync_check(void)
  1317. {
  1318. disable_sync_clock(NULL);
  1319. queue_work(time_sync_wq, &stp_work);
  1320. }
  1321. /*
  1322. * STP island condition machine check. This is called when an attached
  1323. * server attempts to communicate over an STP link and the servers
  1324. * have matching CTN ids and have a valid stratum-1 configuration
  1325. * but the configurations do not match.
  1326. */
  1327. void stp_island_check(void)
  1328. {
  1329. disable_sync_clock(NULL);
  1330. queue_work(time_sync_wq, &stp_work);
  1331. }
  1332. static int stp_sync_clock(void *data)
  1333. {
  1334. static int first;
  1335. unsigned long long old_clock, delta;
  1336. struct clock_sync_data *stp_sync;
  1337. int rc;
  1338. stp_sync = data;
  1339. if (xchg(&first, 1) == 1) {
  1340. /* Slave */
  1341. clock_sync_cpu(stp_sync);
  1342. return 0;
  1343. }
  1344. /* Wait until all other cpus entered the sync function. */
  1345. while (atomic_read(&stp_sync->cpus) != 0)
  1346. cpu_relax();
  1347. enable_sync_clock();
  1348. rc = 0;
  1349. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1350. stp_info.todoff[2] || stp_info.todoff[3] ||
  1351. stp_info.tmd != 2) {
  1352. old_clock = get_clock();
  1353. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1354. if (rc == 0) {
  1355. delta = adjust_time(old_clock, get_clock(), 0);
  1356. fixup_clock_comparator(delta);
  1357. rc = chsc_sstpi(stp_page, &stp_info,
  1358. sizeof(struct stp_sstpi));
  1359. if (rc == 0 && stp_info.tmd != 2)
  1360. rc = -EAGAIN;
  1361. }
  1362. }
  1363. if (rc) {
  1364. disable_sync_clock(NULL);
  1365. stp_sync->in_sync = -EAGAIN;
  1366. } else
  1367. stp_sync->in_sync = 1;
  1368. xchg(&first, 0);
  1369. return 0;
  1370. }
  1371. /*
  1372. * STP work. Check for the STP state and take over the clock
  1373. * synchronization if the STP clock source is usable.
  1374. */
  1375. static void stp_work_fn(struct work_struct *work)
  1376. {
  1377. struct clock_sync_data stp_sync;
  1378. int rc;
  1379. /* prevent multiple execution. */
  1380. mutex_lock(&stp_work_mutex);
  1381. if (!stp_online) {
  1382. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1383. del_timer_sync(&stp_timer);
  1384. goto out_unlock;
  1385. }
  1386. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1387. if (rc)
  1388. goto out_unlock;
  1389. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1390. if (rc || stp_info.c == 0)
  1391. goto out_unlock;
  1392. /* Skip synchronization if the clock is already in sync. */
  1393. if (check_sync_clock())
  1394. goto out_unlock;
  1395. memset(&stp_sync, 0, sizeof(stp_sync));
  1396. get_online_cpus();
  1397. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1398. stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
  1399. put_online_cpus();
  1400. if (!check_sync_clock())
  1401. /*
  1402. * There is a usable clock but the synchonization failed.
  1403. * Retry after a second.
  1404. */
  1405. mod_timer(&stp_timer, jiffies + HZ);
  1406. out_unlock:
  1407. mutex_unlock(&stp_work_mutex);
  1408. }
  1409. /*
  1410. * STP class sysfs interface functions
  1411. */
  1412. static struct sysdev_class stp_sysclass = {
  1413. .name = "stp",
  1414. };
  1415. static ssize_t stp_ctn_id_show(struct sysdev_class *class,
  1416. struct sysdev_class_attribute *attr,
  1417. char *buf)
  1418. {
  1419. if (!stp_online)
  1420. return -ENODATA;
  1421. return sprintf(buf, "%016llx\n",
  1422. *(unsigned long long *) stp_info.ctnid);
  1423. }
  1424. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1425. static ssize_t stp_ctn_type_show(struct sysdev_class *class,
  1426. struct sysdev_class_attribute *attr,
  1427. char *buf)
  1428. {
  1429. if (!stp_online)
  1430. return -ENODATA;
  1431. return sprintf(buf, "%i\n", stp_info.ctn);
  1432. }
  1433. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1434. static ssize_t stp_dst_offset_show(struct sysdev_class *class,
  1435. struct sysdev_class_attribute *attr,
  1436. char *buf)
  1437. {
  1438. if (!stp_online || !(stp_info.vbits & 0x2000))
  1439. return -ENODATA;
  1440. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1441. }
  1442. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1443. static ssize_t stp_leap_seconds_show(struct sysdev_class *class,
  1444. struct sysdev_class_attribute *attr,
  1445. char *buf)
  1446. {
  1447. if (!stp_online || !(stp_info.vbits & 0x8000))
  1448. return -ENODATA;
  1449. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1450. }
  1451. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1452. static ssize_t stp_stratum_show(struct sysdev_class *class,
  1453. struct sysdev_class_attribute *attr,
  1454. char *buf)
  1455. {
  1456. if (!stp_online)
  1457. return -ENODATA;
  1458. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1459. }
  1460. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1461. static ssize_t stp_time_offset_show(struct sysdev_class *class,
  1462. struct sysdev_class_attribute *attr,
  1463. char *buf)
  1464. {
  1465. if (!stp_online || !(stp_info.vbits & 0x0800))
  1466. return -ENODATA;
  1467. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1468. }
  1469. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1470. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class,
  1471. struct sysdev_class_attribute *attr,
  1472. char *buf)
  1473. {
  1474. if (!stp_online || !(stp_info.vbits & 0x4000))
  1475. return -ENODATA;
  1476. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1477. }
  1478. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1479. stp_time_zone_offset_show, NULL);
  1480. static ssize_t stp_timing_mode_show(struct sysdev_class *class,
  1481. struct sysdev_class_attribute *attr,
  1482. char *buf)
  1483. {
  1484. if (!stp_online)
  1485. return -ENODATA;
  1486. return sprintf(buf, "%i\n", stp_info.tmd);
  1487. }
  1488. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1489. static ssize_t stp_timing_state_show(struct sysdev_class *class,
  1490. struct sysdev_class_attribute *attr,
  1491. char *buf)
  1492. {
  1493. if (!stp_online)
  1494. return -ENODATA;
  1495. return sprintf(buf, "%i\n", stp_info.tst);
  1496. }
  1497. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1498. static ssize_t stp_online_show(struct sysdev_class *class,
  1499. struct sysdev_class_attribute *attr,
  1500. char *buf)
  1501. {
  1502. return sprintf(buf, "%i\n", stp_online);
  1503. }
  1504. static ssize_t stp_online_store(struct sysdev_class *class,
  1505. struct sysdev_class_attribute *attr,
  1506. const char *buf, size_t count)
  1507. {
  1508. unsigned int value;
  1509. value = simple_strtoul(buf, NULL, 0);
  1510. if (value != 0 && value != 1)
  1511. return -EINVAL;
  1512. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1513. return -EOPNOTSUPP;
  1514. mutex_lock(&clock_sync_mutex);
  1515. stp_online = value;
  1516. if (stp_online)
  1517. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1518. else
  1519. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1520. queue_work(time_sync_wq, &stp_work);
  1521. mutex_unlock(&clock_sync_mutex);
  1522. return count;
  1523. }
  1524. /*
  1525. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1526. * stp/online but attr_online already exists in this file ..
  1527. */
  1528. static struct sysdev_class_attribute attr_stp_online = {
  1529. .attr = { .name = "online", .mode = 0600 },
  1530. .show = stp_online_show,
  1531. .store = stp_online_store,
  1532. };
  1533. static struct sysdev_class_attribute *stp_attributes[] = {
  1534. &attr_ctn_id,
  1535. &attr_ctn_type,
  1536. &attr_dst_offset,
  1537. &attr_leap_seconds,
  1538. &attr_stp_online,
  1539. &attr_stratum,
  1540. &attr_time_offset,
  1541. &attr_time_zone_offset,
  1542. &attr_timing_mode,
  1543. &attr_timing_state,
  1544. NULL
  1545. };
  1546. static int __init stp_init_sysfs(void)
  1547. {
  1548. struct sysdev_class_attribute **attr;
  1549. int rc;
  1550. rc = sysdev_class_register(&stp_sysclass);
  1551. if (rc)
  1552. goto out;
  1553. for (attr = stp_attributes; *attr; attr++) {
  1554. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1555. if (rc)
  1556. goto out_unreg;
  1557. }
  1558. return 0;
  1559. out_unreg:
  1560. for (; attr >= stp_attributes; attr--)
  1561. sysdev_class_remove_file(&stp_sysclass, *attr);
  1562. sysdev_class_unregister(&stp_sysclass);
  1563. out:
  1564. return rc;
  1565. }
  1566. device_initcall(stp_init_sysfs);