reboot.c 2.5 KB

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  1. /*
  2. * arch/blackfin/kernel/reboot.c - handle shutdown/reboot
  3. *
  4. * Copyright 2004-2007 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/interrupt.h>
  9. #include <asm/bfin-global.h>
  10. #include <asm/reboot.h>
  11. #include <asm/system.h>
  12. #include <asm/bfrom.h>
  13. /* A system soft reset makes external memory unusable so force
  14. * this function into L1. We use the compiler ssync here rather
  15. * than SSYNC() because it's safe (no interrupts and such) and
  16. * we save some L1. We do not need to force sanity in the SYSCR
  17. * register as the BMODE selection bit is cleared by the soft
  18. * reset while the Core B bit (on dual core parts) is cleared by
  19. * the core reset.
  20. */
  21. __attribute__ ((__l1_text__, __noreturn__))
  22. static void bfin_reset(void)
  23. {
  24. if (!ANOMALY_05000353 && !ANOMALY_05000386)
  25. bfrom_SoftReset((void *)(L1_SCRATCH_START + L1_SCRATCH_LENGTH - 20));
  26. /* Wait for completion of "system" events such as cache line
  27. * line fills so that we avoid infinite stalls later on as
  28. * much as possible. This code is in L1, so it won't trigger
  29. * any such event after this point in time.
  30. */
  31. __builtin_bfin_ssync();
  32. /* Initiate System software reset. */
  33. bfin_write_SWRST(0x7);
  34. /* Due to the way reset is handled in the hardware, we need
  35. * to delay for 10 SCLKS. The only reliable way to do this is
  36. * to calculate the CCLK/SCLK ratio and multiply 10. For now,
  37. * we'll assume worse case which is a 1:15 ratio.
  38. */
  39. asm(
  40. "LSETUP (1f, 1f) LC0 = %0\n"
  41. "1: nop;"
  42. :
  43. : "a" (15 * 10)
  44. : "LC0", "LB0", "LT0"
  45. );
  46. /* Clear System software reset */
  47. bfin_write_SWRST(0);
  48. /* The BF526 ROM will crash during reset */
  49. #if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)
  50. bfin_read_SWRST();
  51. #endif
  52. /* Wait for the SWRST write to complete. Cannot rely on SSYNC
  53. * though as the System state is all reset now.
  54. */
  55. asm(
  56. "LSETUP (1f, 1f) LC1 = %0\n"
  57. "1: nop;"
  58. :
  59. : "a" (15 * 1)
  60. : "LC1", "LB1", "LT1"
  61. );
  62. while (1)
  63. /* Issue core reset */
  64. asm("raise 1");
  65. }
  66. __attribute__((weak))
  67. void native_machine_restart(char *cmd)
  68. {
  69. }
  70. void machine_restart(char *cmd)
  71. {
  72. native_machine_restart(cmd);
  73. local_irq_disable();
  74. if (smp_processor_id())
  75. smp_call_function((void *)bfin_reset, 0, 1);
  76. else
  77. bfin_reset();
  78. }
  79. __attribute__((weak))
  80. void native_machine_halt(void)
  81. {
  82. idle_with_irq_disabled();
  83. }
  84. void machine_halt(void)
  85. {
  86. native_machine_halt();
  87. }
  88. __attribute__((weak))
  89. void native_machine_power_off(void)
  90. {
  91. idle_with_irq_disabled();
  92. }
  93. void machine_power_off(void)
  94. {
  95. native_machine_power_off();
  96. }