board-trimslice.c 3.1 KB

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  1. /*
  2. * arch/arm/mach-tegra/board-trimslice.c
  3. *
  4. * Copyright (C) 2011 CompuLab, Ltd.
  5. * Author: Mike Rapoport <mike@compulab.co.il>
  6. *
  7. * Based on board-harmony.c
  8. * Copyright (C) 2010 Google, Inc.
  9. *
  10. * This software is licensed under the terms of the GNU General Public
  11. * License version 2, as published by the Free Software Foundation, and
  12. * may be copied, distributed, and modified under those terms.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/serial_8250.h>
  24. #include <linux/io.h>
  25. #include <asm/mach-types.h>
  26. #include <asm/mach/arch.h>
  27. #include <asm/setup.h>
  28. #include <mach/iomap.h>
  29. #include <mach/sdhci.h>
  30. #include "board.h"
  31. #include "clock.h"
  32. #include "devices.h"
  33. #include "gpio-names.h"
  34. #include "board-trimslice.h"
  35. static struct plat_serial8250_port debug_uart_platform_data[] = {
  36. {
  37. .membase = IO_ADDRESS(TEGRA_UARTA_BASE),
  38. .mapbase = TEGRA_UARTA_BASE,
  39. .irq = INT_UARTA,
  40. .flags = UPF_BOOT_AUTOCONF,
  41. .iotype = UPIO_MEM,
  42. .regshift = 2,
  43. .uartclk = 216000000,
  44. }, {
  45. .flags = 0
  46. }
  47. };
  48. static struct platform_device debug_uart = {
  49. .name = "serial8250",
  50. .id = PLAT8250_DEV_PLATFORM,
  51. .dev = {
  52. .platform_data = debug_uart_platform_data,
  53. },
  54. };
  55. static struct tegra_sdhci_platform_data sdhci_pdata1 = {
  56. .cd_gpio = -1,
  57. .wp_gpio = -1,
  58. .power_gpio = -1,
  59. };
  60. static struct tegra_sdhci_platform_data sdhci_pdata4 = {
  61. .cd_gpio = TRIMSLICE_GPIO_SD4_CD,
  62. .wp_gpio = TRIMSLICE_GPIO_SD4_WP,
  63. .power_gpio = -1,
  64. };
  65. static struct platform_device *trimslice_devices[] __initdata = {
  66. &debug_uart,
  67. &tegra_sdhci_device1,
  68. &tegra_sdhci_device4,
  69. };
  70. static void __init tegra_trimslice_fixup(struct machine_desc *desc,
  71. struct tag *tags, char **cmdline, struct meminfo *mi)
  72. {
  73. mi->nr_banks = 2;
  74. mi->bank[0].start = PHYS_OFFSET;
  75. mi->bank[0].size = 448 * SZ_1M;
  76. mi->bank[1].start = SZ_512M;
  77. mi->bank[1].size = SZ_512M;
  78. }
  79. static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
  80. /* name parent rate enabled */
  81. { "uarta", "pll_p", 216000000, true },
  82. { NULL, NULL, 0, 0},
  83. };
  84. static int __init tegra_trimslice_pci_init(void)
  85. {
  86. if (!machine_is_trimslice())
  87. return 0;
  88. return tegra_pcie_init(true, true);
  89. }
  90. subsys_initcall(tegra_trimslice_pci_init);
  91. static void __init tegra_trimslice_init(void)
  92. {
  93. tegra_clk_init_from_table(trimslice_clk_init_table);
  94. trimslice_pinmux_init();
  95. tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
  96. tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
  97. platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
  98. }
  99. MACHINE_START(TRIMSLICE, "trimslice")
  100. .boot_params = 0x00000100,
  101. .fixup = tegra_trimslice_fixup,
  102. .map_io = tegra_map_common_io,
  103. .init_early = tegra_init_early,
  104. .init_irq = tegra_init_irq,
  105. .timer = &tegra_timer,
  106. .init_machine = tegra_trimslice_init,
  107. MACHINE_END