pm-sh7372.c 2.6 KB

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  1. /*
  2. * sh7372 Power management support
  3. *
  4. * Copyright (C) 2011 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/pm.h>
  11. #include <linux/suspend.h>
  12. #include <linux/cpuidle.h>
  13. #include <linux/module.h>
  14. #include <linux/list.h>
  15. #include <linux/err.h>
  16. #include <linux/slab.h>
  17. #include <asm/system.h>
  18. #include <asm/io.h>
  19. #include <asm/tlbflush.h>
  20. #include <mach/common.h>
  21. #define SMFRAM 0xe6a70000
  22. #define SYSTBCR 0xe6150024
  23. #define SBAR 0xe6180020
  24. #define APARMBAREA 0xe6f10020
  25. static void sh7372_enter_core_standby(void)
  26. {
  27. void __iomem *smfram = (void __iomem *)SMFRAM;
  28. __raw_writel(0, APARMBAREA); /* translate 4k */
  29. __raw_writel(__pa(sh7372_cpu_resume), SBAR); /* set reset vector */
  30. __raw_writel(0x10, SYSTBCR); /* enable core standby */
  31. __raw_writel(0, smfram + 0x3c); /* clear page table address */
  32. sh7372_cpu_suspend();
  33. cpu_init();
  34. /* if page table address is non-NULL then we have been powered down */
  35. if (__raw_readl(smfram + 0x3c)) {
  36. __raw_writel(__raw_readl(smfram + 0x40),
  37. __va(__raw_readl(smfram + 0x3c)));
  38. flush_tlb_all();
  39. set_cr(__raw_readl(smfram + 0x38));
  40. }
  41. __raw_writel(0, SYSTBCR); /* disable core standby */
  42. __raw_writel(0, SBAR); /* disable reset vector translation */
  43. }
  44. #ifdef CONFIG_CPU_IDLE
  45. static void sh7372_cpuidle_setup(struct cpuidle_device *dev)
  46. {
  47. struct cpuidle_state *state;
  48. int i = dev->state_count;
  49. state = &dev->states[i];
  50. snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
  51. strncpy(state->desc, "Core Standby Mode", CPUIDLE_DESC_LEN);
  52. state->exit_latency = 10;
  53. state->target_residency = 20 + 10;
  54. state->power_usage = 1; /* perhaps not */
  55. state->flags = 0;
  56. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  57. shmobile_cpuidle_modes[i] = sh7372_enter_core_standby;
  58. dev->state_count = i + 1;
  59. }
  60. static void sh7372_cpuidle_init(void)
  61. {
  62. shmobile_cpuidle_setup = sh7372_cpuidle_setup;
  63. }
  64. #else
  65. static void sh7372_cpuidle_init(void) {}
  66. #endif
  67. #ifdef CONFIG_SUSPEND
  68. static int sh7372_enter_suspend(suspend_state_t suspend_state)
  69. {
  70. sh7372_enter_core_standby();
  71. return 0;
  72. }
  73. static void sh7372_suspend_init(void)
  74. {
  75. shmobile_suspend_ops.enter = sh7372_enter_suspend;
  76. }
  77. #else
  78. static void sh7372_suspend_init(void) {}
  79. #endif
  80. #define DBGREG1 0xe6100020
  81. #define DBGREG9 0xe6100040
  82. void __init sh7372_pm_init(void)
  83. {
  84. /* enable DBG hardware block to kick SYSC */
  85. __raw_writel(0x0000a500, DBGREG9);
  86. __raw_writel(0x0000a501, DBGREG9);
  87. __raw_writel(0x00000000, DBGREG1);
  88. sh7372_suspend_init();
  89. sh7372_cpuidle_init();
  90. }