board-perseus2.c 7.9 KB

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  1. /*
  2. * linux/arch/arm/mach-omap1/board-perseus2.c
  3. *
  4. * Modified from board-generic.c
  5. *
  6. * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
  7. * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/delay.h>
  17. #include <linux/mtd/mtd.h>
  18. #include <linux/mtd/nand.h>
  19. #include <linux/mtd/partitions.h>
  20. #include <linux/mtd/physmap.h>
  21. #include <linux/input.h>
  22. #include <linux/smc91x.h>
  23. #include <mach/hardware.h>
  24. #include <asm/mach-types.h>
  25. #include <asm/mach/arch.h>
  26. #include <asm/mach/map.h>
  27. #include <plat/tc.h>
  28. #include <mach/gpio.h>
  29. #include <plat/mux.h>
  30. #include <plat/fpga.h>
  31. #include <plat/flash.h>
  32. #include <plat/keypad.h>
  33. #include <plat/common.h>
  34. #include <plat/board.h>
  35. static const unsigned int p2_keymap[] = {
  36. KEY(0, 0, KEY_UP),
  37. KEY(1, 0, KEY_RIGHT),
  38. KEY(2, 0, KEY_LEFT),
  39. KEY(3, 0, KEY_DOWN),
  40. KEY(4, 0, KEY_ENTER),
  41. KEY(0, 1, KEY_F10),
  42. KEY(1, 1, KEY_SEND),
  43. KEY(2, 1, KEY_END),
  44. KEY(3, 1, KEY_VOLUMEDOWN),
  45. KEY(4, 1, KEY_VOLUMEUP),
  46. KEY(5, 1, KEY_RECORD),
  47. KEY(0, 2, KEY_F9),
  48. KEY(1, 2, KEY_3),
  49. KEY(2, 2, KEY_6),
  50. KEY(3, 2, KEY_9),
  51. KEY(4, 2, KEY_KPDOT),
  52. KEY(0, 3, KEY_BACK),
  53. KEY(1, 3, KEY_2),
  54. KEY(2, 3, KEY_5),
  55. KEY(3, 3, KEY_8),
  56. KEY(4, 3, KEY_0),
  57. KEY(5, 3, KEY_KPSLASH),
  58. KEY(0, 4, KEY_HOME),
  59. KEY(1, 4, KEY_1),
  60. KEY(2, 4, KEY_4),
  61. KEY(3, 4, KEY_7),
  62. KEY(4, 4, KEY_KPASTERISK),
  63. KEY(5, 4, KEY_POWER),
  64. };
  65. static struct smc91x_platdata smc91x_info = {
  66. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  67. .leda = RPC_LED_100_10,
  68. .ledb = RPC_LED_TX_RX,
  69. };
  70. static struct resource smc91x_resources[] = {
  71. [0] = {
  72. .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
  73. .end = H2P2_DBG_FPGA_ETHR_START + 0xf,
  74. .flags = IORESOURCE_MEM,
  75. },
  76. [1] = {
  77. .start = INT_7XX_MPU_EXT_NIRQ,
  78. .end = 0,
  79. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  80. },
  81. };
  82. static struct mtd_partition nor_partitions[] = {
  83. /* bootloader (U-Boot, etc) in first sector */
  84. {
  85. .name = "bootloader",
  86. .offset = 0,
  87. .size = SZ_128K,
  88. .mask_flags = MTD_WRITEABLE, /* force read-only */
  89. },
  90. /* bootloader params in the next sector */
  91. {
  92. .name = "params",
  93. .offset = MTDPART_OFS_APPEND,
  94. .size = SZ_128K,
  95. .mask_flags = 0,
  96. },
  97. /* kernel */
  98. {
  99. .name = "kernel",
  100. .offset = MTDPART_OFS_APPEND,
  101. .size = SZ_2M,
  102. .mask_flags = 0
  103. },
  104. /* rest of flash is a file system */
  105. {
  106. .name = "rootfs",
  107. .offset = MTDPART_OFS_APPEND,
  108. .size = MTDPART_SIZ_FULL,
  109. .mask_flags = 0
  110. },
  111. };
  112. static struct physmap_flash_data nor_data = {
  113. .width = 2,
  114. .set_vpp = omap1_set_vpp,
  115. .parts = nor_partitions,
  116. .nr_parts = ARRAY_SIZE(nor_partitions),
  117. };
  118. static struct resource nor_resource = {
  119. .start = OMAP_CS0_PHYS,
  120. .end = OMAP_CS0_PHYS + SZ_32M - 1,
  121. .flags = IORESOURCE_MEM,
  122. };
  123. static struct platform_device nor_device = {
  124. .name = "physmap-flash",
  125. .id = 0,
  126. .dev = {
  127. .platform_data = &nor_data,
  128. },
  129. .num_resources = 1,
  130. .resource = &nor_resource,
  131. };
  132. static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  133. {
  134. struct nand_chip *this = mtd->priv;
  135. unsigned long mask;
  136. if (cmd == NAND_CMD_NONE)
  137. return;
  138. mask = (ctrl & NAND_CLE) ? 0x02 : 0;
  139. if (ctrl & NAND_ALE)
  140. mask |= 0x04;
  141. writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
  142. }
  143. #define P2_NAND_RB_GPIO_PIN 62
  144. static int nand_dev_ready(struct mtd_info *mtd)
  145. {
  146. return gpio_get_value(P2_NAND_RB_GPIO_PIN);
  147. }
  148. static const char *part_probes[] = { "cmdlinepart", NULL };
  149. static struct platform_nand_data nand_data = {
  150. .chip = {
  151. .nr_chips = 1,
  152. .chip_offset = 0,
  153. .options = NAND_SAMSUNG_LP_OPTIONS,
  154. .part_probe_types = part_probes,
  155. },
  156. .ctrl = {
  157. .cmd_ctrl = nand_cmd_ctl,
  158. .dev_ready = nand_dev_ready,
  159. },
  160. };
  161. static struct resource nand_resource = {
  162. .start = OMAP_CS3_PHYS,
  163. .end = OMAP_CS3_PHYS + SZ_4K - 1,
  164. .flags = IORESOURCE_MEM,
  165. };
  166. static struct platform_device nand_device = {
  167. .name = "gen_nand",
  168. .id = 0,
  169. .dev = {
  170. .platform_data = &nand_data,
  171. },
  172. .num_resources = 1,
  173. .resource = &nand_resource,
  174. };
  175. static struct platform_device smc91x_device = {
  176. .name = "smc91x",
  177. .id = 0,
  178. .dev = {
  179. .platform_data = &smc91x_info,
  180. },
  181. .num_resources = ARRAY_SIZE(smc91x_resources),
  182. .resource = smc91x_resources,
  183. };
  184. static struct resource kp_resources[] = {
  185. [0] = {
  186. .start = INT_7XX_MPUIO_KEYPAD,
  187. .end = INT_7XX_MPUIO_KEYPAD,
  188. .flags = IORESOURCE_IRQ,
  189. },
  190. };
  191. static const struct matrix_keymap_data p2_keymap_data = {
  192. .keymap = p2_keymap,
  193. .keymap_size = ARRAY_SIZE(p2_keymap),
  194. };
  195. static struct omap_kp_platform_data kp_data = {
  196. .rows = 8,
  197. .cols = 8,
  198. .keymap_data = &p2_keymap_data,
  199. .delay = 4,
  200. .dbounce = true,
  201. };
  202. static struct platform_device kp_device = {
  203. .name = "omap-keypad",
  204. .id = -1,
  205. .dev = {
  206. .platform_data = &kp_data,
  207. },
  208. .num_resources = ARRAY_SIZE(kp_resources),
  209. .resource = kp_resources,
  210. };
  211. static struct platform_device lcd_device = {
  212. .name = "lcd_p2",
  213. .id = -1,
  214. };
  215. static struct platform_device *devices[] __initdata = {
  216. &nor_device,
  217. &nand_device,
  218. &smc91x_device,
  219. &kp_device,
  220. &lcd_device,
  221. };
  222. static struct omap_lcd_config perseus2_lcd_config __initdata = {
  223. .ctrl_name = "internal",
  224. };
  225. static struct omap_board_config_kernel perseus2_config[] __initdata = {
  226. { OMAP_TAG_LCD, &perseus2_lcd_config },
  227. };
  228. static void __init perseus2_init_smc91x(void)
  229. {
  230. fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
  231. mdelay(50);
  232. fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
  233. H2P2_DBG_FPGA_LAN_RESET);
  234. mdelay(50);
  235. }
  236. static void __init omap_perseus2_init(void)
  237. {
  238. perseus2_init_smc91x();
  239. if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
  240. BUG();
  241. gpio_direction_input(P2_NAND_RB_GPIO_PIN);
  242. omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
  243. omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
  244. /* Mux pins for keypad */
  245. omap_cfg_reg(E2_7XX_KBR0);
  246. omap_cfg_reg(J7_7XX_KBR1);
  247. omap_cfg_reg(E1_7XX_KBR2);
  248. omap_cfg_reg(F3_7XX_KBR3);
  249. omap_cfg_reg(D2_7XX_KBR4);
  250. omap_cfg_reg(C2_7XX_KBC0);
  251. omap_cfg_reg(D3_7XX_KBC1);
  252. omap_cfg_reg(E4_7XX_KBC2);
  253. omap_cfg_reg(F4_7XX_KBC3);
  254. omap_cfg_reg(E3_7XX_KBC4);
  255. platform_add_devices(devices, ARRAY_SIZE(devices));
  256. omap_board_config = perseus2_config;
  257. omap_board_config_size = ARRAY_SIZE(perseus2_config);
  258. omap_serial_init();
  259. omap_register_i2c_bus(1, 100, NULL, 0);
  260. }
  261. static void __init omap_perseus2_init_irq(void)
  262. {
  263. omap1_init_common_hw();
  264. omap_init_irq();
  265. }
  266. /* Only FPGA needs to be mapped here. All others are done with ioremap */
  267. static struct map_desc omap_perseus2_io_desc[] __initdata = {
  268. {
  269. .virtual = H2P2_DBG_FPGA_BASE,
  270. .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
  271. .length = H2P2_DBG_FPGA_SIZE,
  272. .type = MT_DEVICE
  273. }
  274. };
  275. static void __init omap_perseus2_map_io(void)
  276. {
  277. omap1_map_common_io();
  278. iotable_init(omap_perseus2_io_desc,
  279. ARRAY_SIZE(omap_perseus2_io_desc));
  280. /* Early, board-dependent init */
  281. /*
  282. * Hold GSM Reset until needed
  283. */
  284. omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
  285. /*
  286. * UARTs -> done automagically by 8250 driver
  287. */
  288. /*
  289. * CSx timings, GPIO Mux ... setup
  290. */
  291. /* Flash: CS0 timings setup */
  292. omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
  293. omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
  294. /*
  295. * Ethernet support through the debug board
  296. * CS1 timings setup
  297. */
  298. omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
  299. omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
  300. /*
  301. * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
  302. * It is used as the Ethernet controller interrupt
  303. */
  304. omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
  305. }
  306. MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
  307. /* Maintainer: Kevin Hilman <kjh@hilman.org> */
  308. .boot_params = 0x10000100,
  309. .map_io = omap_perseus2_map_io,
  310. .reserve = omap_reserve,
  311. .init_irq = omap_perseus2_init_irq,
  312. .init_machine = omap_perseus2_init,
  313. .timer = &omap_timer,
  314. MACHINE_END